World News
09/01/2005
BUSINESS TRENDS
China’s wafer market ramping up
China’s 200mm fab capacity will grow 35% in 2005 and 36% in 2006 to reach 322,000 wafer starts/month, quickly surpassing smaller-diameter substrates to lead domestic wafer output, according to a new report from Semiconductor Equipment and Materials International (Semi). Semi’s “China Capital Equipment and Electronic Materials Outlook” also estimates that China’s installed 200mm and 300mm capacity will top 106 million sq. in. (MSI) of silicon per year at the end of 2004.
Domestic wafer revenues in 2004 totaled $181 million, with ≤125mm silicon substrates coming mostly from domestic suppliers, said Daniel Tracy, Semi’s senior director of industry research and statistics. Domestic suppliers accounted for 40% of 150mm wafers sold in China. With the exception of some test wafers, nearly all of the 200mm and 300mm substrates were sold by international suppliers, Tracy said.
 China’s fab capacity shifts to larger wafers. (Source: Semi) |
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USA
Advanced Micro Devices Inc. (AMD), Sunnyvale, CA, has filed an antitrust complaint against Intel Corp., accusing its chipmaking rival of illegally coercing customers to reject AMD chips to maintain its market dominance of x86 microprocessors. AMD claims to have identified 38 companies worldwide that have been strong-armed by Intel.
In other Intel news, AmberWave Systems Corp., Salem, NH, has filed suit against the company in federal court in Texas, alleging infringement of two techniques to increase semiconductor-device performance, used as part of strained-silicon technology in Intel’s 90nm Pentium line. AmberWave said it targeted the chipmaker after failing to negotiate a “commercially reasonable” licensing deal.
ASIAFOCUS
China
The Science and Technology Bureau of the Municipal Government of Shenyang has announced a 3-5 year, $305 million project with Applied Materials, to introduce IC equipment and build 200mm demo and production lines. The region also is seeking partners for a proposed $183 million project to develop ultrathin TFT-LCD screens, and a $195 million JV to develop wireless communication technologies.
Semiconductor Manufacturing International Co. (SMIC) is mulling plans to turn leftover/scrapped silicon wafers from its chip manufacturing operations into solar cells, according to the Taiwan Economic News. The company is considering bolstering its stockpile of the scrapped wafers (built up since 2000 due to export bans) with an in-house facility in its Fab 10 for turning out crystal silicon ingots,
Japan
The Japan Electronics and Information Technology Industries Association (JEITA) is spearheading a new R&D initiative, involving industry, government, and academia, in a five-year, ¥100 billion (~US$900 million) project to develop and standardize 45nm and 32nm chipmaking technologies, according to the Yomiuri Shimbun. The project, to begin in March 2006, would with the government-funded MIRAI project; both follow the 65nm work of the Asuka project, which was ramped down in October.
Malaysia
On Semiconductor plans to transfer wafer fab operations from its Site 2 in Seremban, Malaysia, to its Phoenix, AZ, fab by the end of next year as part of ongoing manufacturing consolidation. On Semi will maintain its 281,000 sq. ft assembly and test operation at Site 1 in Seremban, and will keep thin-wafer and solderable top metal operations, and potentially future work, in a portion of the Site 2 facility.
Taiwan
Taiwan’s Ministry of Economic Affairs has modified its export rules to include 0.35µm and older chipmaking process technologies, revising the baseline from 0.5µm, but the policy does not apply to mainland China despite pressure from domestic chipmakers, according to the Taiwan Economic News. Taiwan allows exporting of 0.25µm technologies to China under strict guidelines.
EUROFOCUS
IMEC has completed its lineup of front-end-of-line tools for 300mm wafer processing, covering advanced processes up to silicide level for both planar bulk CMOS and multigate devices. Partners include Aixtron, Applied Materials, ASM International, ASML, Axcelis, Dainippon Screen, FEI, KLA-Tencor, Lam Research, SEZ, and TEL. First pathfinder lots on the line include bulk-Si nFET (45nm node) and SOI FinFET (32nm node), with physical gate lengths down to 40nm using TaN and TiN metal gates and high-k dielectrics such as HfO2 for the gate stacks. When completed, the program will focus on integrating next-generation low-k dielectrics for the 32nm node.
French research group CEA-LETI said it has successfully completed its first high-k metal gate transistors on 300mm wafers, demonstrating the possibility of integrating high-k permittivity insulators (HfSiON) and metal gates into advanced MOS structures on 300mm wafers, reducing parasitic leakage current and avoiding gate depletion. The achievement, performed in cooperation with the Crolles2 alliance, follows a year after launching the Nanotec 300 platform for 45nm/32nm research.