A comprehensive control strategy for maximizing process capability
09/01/2005
Advanced process control (APC) has become a central issue in wafer fabs when it comes to quickly introducing new technologies into production or fine-tuning tool performance for maximum yields. A comprehensive control strategy, based on real-time multi-input multioutput (MIMO) APC, can improve utilization of metrology data through sharing between control modules, while optimizing overall process integration by matching needed levels of control to specific process steps. This article describes how process engineers can relax control specifications for one set of tools, such as photolithography, while maximizing APC with closed-loop feedforward and feedback systems for another, such as etch.
Process development often entails a series of analyses and negotiations between engineers involved in specifications for product design, process technologies, and process integration. During these iterations, components of variance (COV) are analyzed, and each process module is assigned a variance budget and process capability requirement. In today’s competitive industry environment - which emphasizes a fast time-to-market - process engineers are forced to seek tools that enable them to meet tight variance budgets quickly. This leaves process engineers with no alternative but to seek narrowly defined APC solutions to meet those requirements. This strategy results in multiple decoupled point solutions in APC, which do not scale, are hard to maintain, and prove costly.
An alternative “comprehensive control strategy” is now possible in fabs, using real-time MIMO APC systems for high-volume manufacturing. This comprehensive control strategy is based on a complete metrology assessment and a process-module control capability assessment. Metrology assessment determines the optimum frequency and quality of metrology data at each process module. Process-module control capability assessment focuses on the control capabilities available at the given process module.
Using these assessment techniques not only allows better utilization of metrology by sharing measurement data between control modules, but also optimizes the overall process integration. Modules with high control capability may assist in relaxing specifications for other modules. This article describes an etch process implemented with a fully closed-loop (feedforward and feedback) control system, which allows process engineers to relax some lithography requirements and still achieve the same patterning process capability. The same reasoning can be applied to chemical mechanical planarization (CMP) and deposition. This approach can increase the longevity of some process tools.
Process control systems
In general, process control systems can be divided into two major components: feedback (FB) and feedforward (FF) systems. It can also be said that the FF component compensates for variations in the incoming material, while the FB component compensates for tool behavior. Almost all process equipment and steps can be controlled with FB systems, but very few can be controlled with FF components. In a FF control system, measurement data of the previous step is fed into the control system so that the tool can compensate for variations in the material. The FF controller modulates the recipe parameter adjustments to eliminate the observed error by adjusting the FF model and/or setting adjusted targets for the process goals.
In FB systems, post-process measurement data are used to compensate for process tool variations. In FB control systems, actual (measured) results are compared with desired (target) results, and control actions are based on the difference between them. This general characteristic is leveraged so that a FB control system simultaneously tackles the problems of tool drift, chamber-to-chamber differences, and device-to-device variations. The difference between measured and expected results is usually referred to as the (current) error.
One of the biggest drawbacks of a FB system is that measurement data have to be processed and filtered so that the real trend can be detected. If the filtering is done too aggressively, the system becomes less responsive, and if the data are not filtered properly, the system is said to go into oscillation. Some of the common filtering algorithms used in FB systems are exponentially weighted moving average, Kalman, and recursive least squares.
To illustrate this point, let’s consider the patterning step, which consists of lithography exposure and the subsequent etch. In this case, the after-develop measurement data (develop-inspect CD, or DICD) can be used to enhance the etch recipe for the particular context. At the same time, DICD can be fed back to the litho cell so the tool can enhance the recipe for the next context. Extending the same system, the post-etch measurement data (final-inspect CD, or FICD) can be used to enhance the recipe for the subsequent contexts. Figure 1 illustrates such a system; the various run-to-run (R2R) control loops are distributed at each step and FF/FB components are designated by different colored arrows.
Control granularity
Granularity of process control is defined as the level at which control is being applied to a run of wafers. Typically, control granularity can be performed at one or more of the following levels: batch-to-batch, where control is applied to a batch of wafers or lots; lot-to-lot (L2L): control is applied on a lot-by-lot basis; wafer-to-wafer (W2W): control is applied at each wafer or sublot; within-wafer (WiW): control is applied to control the uniformity within wafer; and within-field: control is applied to improve uniformity within a reticle field, on a wafer.
A detailed COV analysis must be performed to quantify the variance at each level and determine the level of control required. The COV analysis must be coupled with the metrology sample plan to ensure that adequate sampling exists for the basis of control. Adequate wafer-level measurements must be available to perform a meaningful level of W2W control, for example.
Process control capability
Process control capability (PCC) is defined as the combination of control system components (FF and FB) and control granularity. A process module with fully closed-loop (FF and FB) control capability with granularity down to reticle field has the highest control capability. Control capabilities are further extended as the metrology sample plans increase and as further upstream measurement data are available. In the above case, the etch process step would have a higher level of PCC than the litho cell at the same granularity because the etch step can employ a fully closed-loop control system whereas the litho step can only employ a FB loop.
In the patterning process steps, the PCC can be further improved by providing the film thickness from deposition steps prior to lithography exposures. Furthermore, process steps with higher PCC can take full advantage of MIMO systems to control multiple process goals simultaneously, compared to simple single-input single-output (SISO) systems. Often, FB systems are implemented as SISO systems and can compensate for only one process goal.
PCC considerations are essential at process integration. PCC analyses allow integration engineers to reallocate variance budgets from one process step to another and yet maintain the same overall budget.
Components of variance analyses and budgets
Process integration is responsible for establishing a variance budget and process capability (Cpk) for each manufacturing step to achieve the required performance and yield. Process-step specification limits usually are more demanding than the process capabilities, and this forces engineers to tighten up prior process-step specifications to meet the final goals. This tightening is made regardless of the PCC that exists at each step. Considering the case illustrated in Fig. 2, the specifications limits are tightened indiscriminately to achieve the required yield. The table shows the variance budget analyses to meet the process capability goals.
 Figure 2. The variance budgets get progressively larger. |
Considering the patterning step example, the specifications for lithography and etch are set at ±9nm and ±11nm, respectively. Without process control, a mean of 126nm and 3σ of 2.5nm results in a Cpk of 1.1 for the litho step and similarly, following the etch step, the Cpk is 0.94. By strategically introducing MIMO APC at the etch step with higher PCC, the variance can be reduced from 3.2nm to 2nm. This improvement allows the litho specifications to be increased to ±11nm and the specifications for the etch step to be reduced to ±9nm. This improvement will result in the litho step meeting the process capability goal without any impact on the lithography step. This will not only meet the process goals but also reduce rework rate and improve throughput and cycle time.
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Maximized control capability
PCC analysis enables device manufacturers to truly understand the amount and value of control available at each process step. Armed with this understanding, fab engineers can decide to relax the spec for some steps and tighten the specs for some others, while maintaining the desired overall specifications for yield and performance in products. Upon completion of the PCC analysis, concepts illustrated in Fig. 2 can be represented as seen in Fig. 3. The two major patterning steps - lithography and etch - are circled. The upper and lower spec limits have been widened for the litho step and the limits have been tightened for the subsequent etch step. This has been done with no impact to yield, and, in fact, has been demonstrated to accelerate the yield ramp.
This analysis provides a practical method to maximize control capability with the most effective solutions at the right manufacturing steps. The relaxation of the litho spec would not have been possible with a FB control loop at that process step. Additionally, a simple SISO system cannot provide the adequate level of control needed to simultaneously regulate multiple control targets. Only a comprehensive model, based on a MIMO control system, can be employed at such steps to maximize the control capability.
Case study
For the 90nm process node, Cypress Semiconductor has deployed a comprehensive scalable MIMO APC system using the Intelliproc software from Blue Control Technologies. The control model was initially developed in the Cypress Fab 1 R&D facilities in San Jose and then transferred to Fab 4 in Bloomington, MN, for full-scale volume manufacturing. Upon completion of control capability analyses, it was determined that one significant advantage of FF control was the ability to relax the tolerances on incoming processes. Without FF control and assuming normally distributed process variations, the tolerances for each contributing process must each be tighter than the final output tolerance. (The variances from each input process add up to the total final variance.) In the patterning example, the FICD variance budget is equal to the combined variance budgets for DICD and the etch bias.
Therefore, the final CD tolerance (defined as a given number of standard deviations, i.e., 3σ) is generally given by the root sum of squares of the photo CD and etch bias tolerances. For the example in which both photo CD and etch bias are allowed similar tolerances, the tolerance of each must be ~70% (1/√2) of the final CD tolerance. However, with FF control enabled, the tolerance of the incoming step(s) may be relaxed, as the variance can be absorbed by adjusting the final process step to compensate for these incoming effects.
In the CD example, the litho CD tolerances may be relaxed by implementing a FF controller for the etch process, which then compensates for the measured incoming deviation from target. The incoming process tolerances can be relaxed or widened when more incoming components of variation are fed forward and the controller compensates for them (i.e., variances in L2L, W2W, and WiW levels).
In practice, the process window for the compensating process and its controller can limit this advantage. However, we have demonstrated in manufacturing that FF APC control at etch has allowed photo CD tolerances to be widened from ~70% of the final CD tolerance to >10% larger than the final CD tolerance. This effectively increased the litho CD budget by more than 55%. Obviously, this tolerance relaxation can have significant advantages: increased tool and process lifetimes, improved process capability, reduced rework, and fewer required engineering responses.
Conclusion
Process control has become a mainstream manufacturing practice in the semiconductor industry. The narrowly defined control systems that have been utilized thus far have provided tremendous value and education to the users. The industry has reached a level of maturity that requires more formal practices to be employed in order to further refine utilization rates in fabs and maximize return on investment. Process-control capability analyses yield valuable information in determining the process steps with the highest control-capability levels. Taking full advantage of this methodology, semiconductor manufacturers can strategically deploy model-based MIMO control in fully closed-loop (FF and FB) systems and maximize the return on every dollar spent.
For more information, contact Kamyar Faron at Blue Control Technologies Inc., 875 Mahler Rd., Suite 280, Burlingame, CA 94010; ph 650/259-5865, e-mail [email protected].
Jeremy Warren, Cypress Semiconductor Corp., Bloomington, Minnesota