The urgent need for process collaboration
07/01/2005
Makers of advanced microchips have been doing a magnificent job of bringing 300mm wafer fabs on stream and ramping to even better yields than they had hoped for as they moved from 130nm to 90nm. Toolmakers have been cooperating by designing tools that are easier to hook to gas lines and other utilities while keeping footprints down. Broad industry collaboration has ensured that automated fabs can move FOUPs smoothly from tool to tool and move wafers into chambers through standard ports. There is even progress toward remote maintenance and some sharing of process data. Of course there are still complaints about too much equipment downtime, opaque software instructions driving process steps, and failure to comply with some industry standards, but, in general, great progress has been made.
This is particularly important as the industry expands its base of 300mm fabs because it is estimated by iSuppli that depreciation now represents some 50% of total costs compared to only 20% for a 4-in. fab.
But as the industry moves toward the 65nm node, there are signs of real trouble ahead. At a panel at Europa this spring, it was pointed out that each major chipmaker has set up its own software framework for implementing fab-wide process control, requiring tool vendors to rewrite their software to interface with systems at each wafer processing plant. Furthermore, as areas such as strain engineering are explored, different fabs are finding their own device structures and process tricks to boost performance while reaching design compromises. As Mary Puma, CEO of Axcelis, commented, sometimes the vendors cannot even find out how their tools are being used let alone get process data that would help them make improvements. Since ion implantation is critical in shallow junction formation, and may be adjusted to combine high-performance and low-power devices in the same circuit structure, tool designers can learn much from seeing how their systems perform under varying conditions.
Not only are features getting smaller, many new materials will be moving into CMOS processing as chipmakers move into production with 65nm devices and work on development for the 45nm node. Process integration will become much harder as new process steps and materials must interact with existing materials and the thermal cycling of annealing and activation steps. Only extensive collaboration between tool designers, materials specialists, and process engineers will enable all these changes to be integrated smoothly and effectively into production process flows. Since most tools are now mainly assemblies of critical components, such as vacuum pumps, and RF and microwave plasma sources, the component companies may also need to adjust their designs to meet targets set by different fab process recipes.
An example of how tough the struggle to find the right technology can be is the seemingly endless quest for low-k dielectric materials that can meet tough k values down to ≤2, while maintaining mechanical strength. Interaction with barrier layer materials and subsequent processing steps can raise k values to unacceptable levels even if the initial material meets specs. The road toward high-k gate insulators with high equivalent oxide thickness and low leakage currents may prove even tougher.
If chipmakers expect their suppliers to get together and solve all these problems for them, they are likely to be disappointed. Tough competitors like Applied Materials and Novellus are not going to jointly develop their approaches to copper and low-k dielectric integration. The cooperation will have to be more up and down the chain rather than across individual tool or materials sectors.
The greatest benefits of more open collaboration up and down the supply chain will flow to the chipmakers themselves, since they will add lots of smart technical people among their vendors to their own development teams. This was the major reason given by Bernie Meyerson, VP and chief technologist of IBM’s Systems and Technology Group, in explaining IBM’s numerous alliances with other chipmakers and foundries during a presentation in Singapore at the dedication of Chartered Semiconductor’s Fab 7.
Sometimes secrecy is essential, as for example when a major discovery gives a distinct process advantage. But most steps toward getting new processes running smoothly are not such unique, key steps that the patent attorneys need to start filing claims and the windows blackened. Problems get solved and progress is made bit by bit, step by step, through solid analysis and creative tweaking. We’re going to need all the help we can get. So why not work together?
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Robert Haavind
Editorial Director