Issue



S/D extension formation for sub-65nm transistors


07/01/2005







The increasing demand for high-performance computers and the widespread use of more complex consumer products continue to fuel the scaling of leading-edge logic devices. In particular, CMOS FETs must be scaled laterally as well as vertically to increase the drain saturation current (Idsat), a key parameter of higher switching frequency, and to maintain acceptable leakage current.

The series resistance attributed to the source/drain extension (SDE) must be minimized and the resulting junction has to be optimized in concert with the halo, contact, and poly implants in order to increase Idsat. SDE formation for both nMOS and pMOS requires the fabrication of ultrashallow junctions (USJ) with small junction depth (Xj), low sheet resistance (Rs), and high junction abruptness.

Historical perspective on co-implants

Historically, scaling down the SDE was achieved by decreasing the energy for both the boron and arsenic (or phosphorous) implants. However, to form junctions needed for the 180-150nm technology nodes, preamorphization implant (PAI) steps were introduced to minimize/eliminate channeling, which occurs more readily at lower energies [1]. PAI is generally achieved using Ge or Si, the dose and energy of which have to be optimized to reap the benefits of forming shallower junctions without introducing deleterious effects such as increased junction leakage or enhanced diffusion. PAI optimization has been implemented to form USJs down to about the 110nm node. Below that, however, optimizing the PAI for the 90nm node USJ requirements has encountered significant problems. The boron and arsenic implant doses were increased significantly to form peak concentrations well above the solid solubility limits allowed by the thermal budget, yet Rs and abruptness didn’t meet the device performance needs.


Figure 1. Boron SIMS profiles for as-implanted and annealed co-implants. RTA temperature is 1050°C using ramp-up and ramp-down rates of 250°C/sec and 90°C/sec, respectively, in N2 ambient.
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To overcome this challenge, a third implant has been introduced to control the dopant diffusion during the subsequent activation step. At the 90nm node, a fluorine co-implant is found to suppress boron diffusion, thereby leading to shallower Xj and more abrupt junctions [2, 3]. In addition, boron activation is improved, resulting in lower sheet resistance (see Fig. 1 and table for P-SDE). With the relentless drive to more stringent USJ requirements for the 65nm technology node and beyond, it has been found that even for finely tuned optimal junctions with fluorine, co-implants have fallen short of meeting the International Technology Roadmap for Semiconductors (ITRS) USJ requirements. Carbon co-implants have been explored and found more effective with suppression of boron diffusion [4] (Fig. 1). As a result, shallower junctions can be formed with improved dopant activation and abruptness compared to fluorine co-implants.

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It is important to realize that a crucial part of the junction development process is to optimize the dose and energy of the PAI, and more critically for the fluorine and carbon co-implants. Positioning the fluorine and carbon co-implants in between the boron and the PAI end-of-range damage is found to be crucial to achieve the junction requirements [4]. This is illustrated in Fig. 2a, where the carbon implant energy has been increased by steps of 0.5keV, significantly shifting Xj and Rs. Similarly, varying the Ge implant energy can affect the junction parameters considerably (Fig. 2b).


Figure 2. Boron SIMS profiles for a) annealed co-implants showing the tunability of Xj by varying the carbon co-implant energy, and b) for annealed co-implants showing the effect of PAI implant energy on Xj. RTA temperature is 1050°C using ramp-up and ramp-down rates of 250°C/sec and 90°C/sec, respectively, in N2 ambient.
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Thermal budget considerations

Because USJ formation involves both implantation and thermal activation, it is vital that both aspects of USJ formation are engaged in the course of process development. In particular, Xj and Rs can be tuned to the technology node requirement within the advised thermal budget (Fig. 3a).

Spike RTA processes have to be optimized to minimize diffusion by reducing the residence time at temperatures >1000°C. This is achieved by sharpening the temperature profile using high ramp-up and ramp-down rates of, for example, 250°C/sec and 90°C/sec, respectively. Ultimately, millisecond anneal steps at temperatures >1100°C will be needed to achieve maximum activation at minimal diffusion.


Figure 3. A comparison of boron SIMS profiles for a) co-implants annealed at different peak temperatures, and b) annealed co-implants and simulated profiles using a physics-based model. RTA temperature is 1050°C using ramp-up and ramp-down rates of 250°C/sec and 90°C/sec, respectively, in N2 ambient.
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With junction depths approaching 200Å, special care has to be paid to the metrology tools and characterization techniques, such as Rs and SIMS analyses. For example, D-type probes for four-point probe technique have to be used to avoid punching through the junctions. At the same time, the primary energy of SIMS has to be minimized to avoid profile distortion and loss of resolution. Different tool setups are needed for profiling different elements. Several soft-contact or noncontact (optical) techniques for determining Rs and Xj have recently been developed. Some of these techniques may potentially be adopted to replace four-point probe technique for in-line metrology [5].

Understanding the defect and diffusion suppression mechanisms involved in co-implants is a significant step in developing a model that can be used for process-flow design and integration. Physics-based simulations are performed using TSuprem-4 [6] to account for the impact of carbon-interstitial clusters on boron transient enhanced diffusion (TED). For example, a good fit to the measured data for 2keV carbon is obtained when a small fraction of the implant damage is assumed to be captured by the carbon-interstitial clusters (Fig. 3b).

In contrast, for the case of 5keV carbon, all of the implant damage appears to be captured by carbon, thus eliminating boron TED. Furthermore, boron solubility is apparently increased by ~20% above its thermodynamic equilibrium value. This increase is extremely important in reducing sheet resistance of the junction and is achieved because of the reduced concentration of interstitials around the boron peak. This interstitial concentration reduction is a result of trapping by carbon [7].

For N-SDE, carbon co-implants appear to have an effect similar to boron on phosphorus implants. Adding the carbon co-implant step suppresses the phosphorus diffusion significantly, leading to shallower Xj (<250Å) and a more abrupt junction.

Transferring co-implant steps to production

After process development, transferring the process to a production environment imposes a new layer of requirements on the implanter and RTA tools. For the process to be production-worthy, implanters must perform SDE steps with a reasonable throughput, requiring high beam currents across the entire ion source life.

The implementation of co-implants in process flows is demonstrated to extend utilization of conventional low-energy implantation and spike rapid thermal annealing (RTA), which is an economically attractive option for fabs bringing advanced technologies online. In addition, extending today’s implant and spike anneal technologies helps a fab accelerate the development cycle, by avoiding new tool matching and qualification delays.

To maintain the abruptness of the profile, energy contamination from neutrals in a deceleration mode must be minimized in both percentage and position relative to the main implant peak. Minimal preacceleration to final beam energy (deceleration ratio) must be used. The energy contamination phenomenon is directly correlated to the implanter architecture in terms of beamline pressure and length. Other important aspects are the implanter’s abilities to auto-tune and switch quickly from one low-energy beam to another. Fast auto-tuning is increasingly important for single-wafer implanters because there are increasing types of implant species and the production lot sizes are more likely to vary.


Figure 4. Sheet resistance map of boron and carbon co-implants obtained using a four-point probe. RTA temperature is 1050°C using ramp-up and ramp-down rates of 250°C/sec and 90°C/sec, respectively, in N2 ambient. The mean Rs value is 470Ω/sq., uniformity is 1.1%, and edge exclusion is 3mm.
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Both implanters and RTA tools must produce uniform active dopant distribution on 300mm wafers as shown in the example of Fig. 4. While the introduction of fluorine and carbon co-implants requires process development and associated costs, the benefit of using existing beamline and spike anneal systems to extend to the 65nm node is significant. Fabs can modify installed bases, minimize new tool learning curves and qualification times, and focus solely on process development.

Conclusion

Co-implants of carbon and fluorine are a time- and cost-effective approach to achieve USJ requirements at the 65nm technology node using conventional low-energy implant and spike RTA. Fluorine and carbon conditions are critical to achieving the target specifications for the junction; therefore, careful optimization of dose and energy, with respect to the PAI and dopant implant, is required.

Implant optimization has to be integrated with the RTA activation step and the appropriate metrology techniques to realize robust and production-worthy processes. Promising results have recently been obtained that suggest potential extension of the carbon co-implant process beyond the 65nm node P-SDE to achieve Xj<200Å. It is likely that millisecond anneals will be needed to further benefit from reducing the time at temperatures >1000°C (minimizing diffusion) and improve activation at high peak temperatures.

Acknowledgments

The authors would like to thank Victor Moroz and Dipu Pramanik of Synopsys for developing the carbon co-implant model and performing the TCAD simulation.

References

  1. M.A. Foad, A.J. Murrell, E.J.H. Collart, G. de Cock, D. Jennings, et al., “Practical Aspects of Forming Ultra-shallow Junctions by Sub-keV Boron Implants,” Proc MRS Symp., Vol 568, p. 55, 1999.
  2. H. Graoui, M. Hilkene, B. McComb, M. Castle, S. Felch, et al., “Optimization of Fluorine Co-implantation for PMOS Source and Drain Extension Formation for 65nm Technology Node,” Proc. MRS Symp., Vol. 810, p. 247, 2004.
  3. B.J. Pawlak, R. Lindsay, R. Surdeau, P. Stolk, K. Maex, et al., “Optimizing P-type Ultrashallow Junctions for 65nm CMOS Technology Node,” IEEE, p. 21, 2002.
  4. V. Moroz, M. Foad, H. Graoui, F. Nouri, D. Pramanik, et al., “Ultra-shallow Junctions for the 65nm Node Based on Defect and Stress Engineering,” presented at Spring MRS meeting, April 2005.
  5. P. Borden, L. Bechtler, K. Lingel, R. Nijmeijer, “Carrier Illumination Characterization of Ultrashallow Implants,” in Handbook of Silicon Semiconductor Metrology, A.C. Diebold, ed., Dekker Inc., New York, p. 97, 2001.
  6. TSuprem-4 User’s Guide, Version W-2004.09, Synopsys, 2004.
  7. H. Graoui, M.A Foad, “Source and Drain Extension Formation Using Carbon Co-implantation for PMOS Devices,” presented at USJ Workshop, June 2005.

Majeed Foad is a director of technology in the Front End Products Business Group at Applied Materials, 974 E. Arques Ave., Sunnyvale, CA 94086; e-mail [email protected].

Houda Graoui is a member of the technical staff in the Front End Products Business Group at Applied Materials.