Issue



Technology News


06/01/2005







Cell chip designed for ease of manufacture

While the new IBM-Sony-Toshiba multiprocessor Cell chip takes a radically new approach to design to get its blazing 4GHz, 256 gigaflops performance with relatively low power consumption (around 48W), it opts for some relatively conservative process technology to ramp up as quickly as possible to volume production. For the most bang for the buck from new technologies, developers put their emphasis on design-for-manufacturability (DFM), SOI, and strained silicon.

So the first version will be 90nm, not 65nm, given the issues of getting yields for the large 221mm2 chip, roughly twice the size of the Pentium Prescott. The exotic raised transistor structures and more extreme spun-on low-k dielectrics originally considered were dropped along the way in favor of processes already up and working. Both the 90nm and the 65nm version will use CVD SiOC, with a k value of about 3.

Kenshi Manabe, Sony’s CTO for semiconductors, notes that Sony will use the same production processes for the Cell chip as for its next-generation conventional embedded DRAM graphic chip for the PlayStation 2, at both transistor and interconnect levels, and will make both in the same Nagasaki fab, though the Cell chip is on SOI and the other on bulk silicon.

But much emphasis was put on DFM from the beginning, by designing for the most effective optical proximity correction, and doubling the vias to make sure one of them works. Manabe says pilot production at Sony’s Nagasaki fab seems to be ramping up quickly. “We expect yields to match those of bulk silicon,” he says.

The other major changes to get the most performance improvement for the fewest manufacturing problems consist of using SOI and strained silicon. “If we were going to increase operating frequency, not using SOI was not an option,” said Manabe. He says that after testing both bonded and implanted SOI wafers, they found essentially no difference in either cost or yield. They use a partially depleted SOI because keeping the Si layer completely uniform across the 300mm wafer in the fully depleted version, as required to maintain a stable threshold voltage, turned out to be too costly and complicated.

The Cell chip uses what developers argue is a relatively simple approach to create strained silicon as well, eliminating the epitaxial SiGe some others have used to create localized compressive strain on the pMOS. Instead they use the dual-stress liner system, depositing a highly tensile SiN cap layer over the whole wafer, then patterning and etching it away in pMOS regions, leaving tensile strain in the nMOS areas. Then they repeat the process with a highly compressive SiN cap layer over the wafer, leaving it only on the pMOS regions for compressive strain. That means the Si composition in the SiN cap is different in the pMOS and nMOS areas, so the etching conditions have to be adjusted accordingly. “But adjusting the etching conditions was not a major issue,” claims Yutaka Okamoto, SGM of process development, Sony Semiconductor Solutions Network Co.

With an off-current of 100nA/µm, this dual-stress liner strained silicon improved the nMOS drive current by 11%, the pMOS by 20%. A microprocessor made with the technology and IBM’s Power Architecture design showed a 7% increase in operating frequency compared to other strained silicon technologies, and similar results are expected from the Cell chip.

The only process change planned for the 65nm version is to switch the silicide from CoSi2 to NiSi.

- Pennwell partner Nikkei Microdevices


Bacteria make more stable flexible display material

There’s a new flexible display material that avoids some common problems with other transparent organics by closely matching the heat expansion characteristics of quartz glass. Also unlike other organic substrates, this one is extruded by bacteria.

Researchers from Kyoto U., Mitsubishi Chemical, and Pioneer have made a prototype electroluminescent display from the flexible transparent material, which contains fibers of bacterial cellulose (see figure). The fibers have about the same low coefficient of heat expansion as quartz glass, around 10×10-6/K, or about 1/10 that of other flexible transparent organic materials. This low coefficient eliminates the usual problems with high-temperature processing, thin-film delamination, and electrode positioning.


a) Prototype display uses flexible organic material with heat stability of glass thanks to b) fibers extruded by bacteria. (Source: Kyoto U., Mitsubishi Chemical, Pioneer)
Click here to enlarge image

The 100nm dia. fibers reportedly interfere less with transparency than do the various powders usually added to flexible polymers to reduce heat expansion, maintaining transparency of about 85%. Researchers say commercial production is five to six years out.

- Pennwell partner Nikkei Microdevices


Nikon develops flexible polarization for high-NA 193nm scanners

With immersion lithography and higher numerical-aperture (NA) lenses in the works, Nikon Corp. believes it is time to apply enhanced polarization control in the illumination systems of new 193nm ArF scanners for improved image contrast as pitch sizes shrink in the 65nm and 45nm process nodes. In addition to vertical and horizontal polarization control (available on Nikon’s 193nm 0.85NA dry scanners since 2004), a new customizing feature is being added for higher-NA tools in 2005. This “azimuthal” polarization capability will increase flexibility by providing an angular illumination scheme supporting any orientation on photomasks, explains Chris Sparkes, director of technology at Nikon Precision Inc., Belmont, CA.

Nikon’s Polano polarization control will improve image contrast by 20%, resulting in greater resolution, depth-of-focus (DOF), and CD uniformity, say company managers. Nikon says improved CD uniformity from polarization control will minimize the impact of mask errors, enable lithography processes to operate at a higher effective k1 value, and provide a wider process window by reducing sensitivity to variations in dose and focus with higher contrast levels. A half-generation improvement in resolution for processes is expected with no loss in illumination power or 193nm scanner throughput.

Concerns about polarization of light in lithography have increased as lenses approach >1.0NA. Randomly delivered polarized light in illumination consists of electric field vibrations in two orthogonal orientations: transverse electric (TE) polarization (s-polarized light), and transverse magnetic (TM) polarization (p-polarized light). While s-polarized light’s electric vector field runs perpendicular to the incident angle of light (for high contrast), p-polarized light’s electric vector is parallel to the plane of incidence at the image, which decreases its contrast as pattern pitches decrease. Therefore, controlling the influence of p-polarized light on image contrast becomes increasingly important in next-generation processes.


Simulations show a lower NA lens with polarization control will outperform a higher 1.2NA lens with no polarization.
Click here to enlarge image

“This is a loss-less polarized illumination, using a polarization-maintaining homogenizer [controller],” says Kazuo Ushida, GM of development headquarters at Nikon’s Precision Equipment Co. If polarization filters were used, instead of the proprietary controller technique in Polano, exposure tools would be operating at 50% power, dramatically reducing throughput in production, he adds. Nikon is not publicly disclosing details about how Polano polarizes exposure light for customized enhancements to exposures.

Nikon’s simulations underscore the importance of polarization control. Using the same NA lens, DOF can be improved 25%. When the third-generation Polano polarization control option is used, Nikon expects its first 193nm immersion production scanner, the NSR-S609B with a NA = 1.07 lens, to match the theoretical DOF of a more expensive scanner with a NA = 1.2 lens (see figure). The newest Polano system is to be available on Nikon’s 193nm dry S308F 0.92NA step-and-scan system this spring, followed by availability on the ArF immersion tool in 2H05. Both are targeting 65nm processes; the immersion scanner is expected to serve 45nm development activities.

“We have enhanced and improved the maintenance function to preserve polarization [in the illumination system], and secondly, customized control has been added for linear polarization in any direction,” explains Gene E. Fuller, principal engineer at Nikon Precision. “This allows angular or azimuthal or tangential polarization, which is more useful for random patterns.”

Nikon expects the increased flexibility from azimuthal polarization control to accelerate the use of Polano. “It will take a little bit of time for users to figure out the best ways to match their designs to polarization capabilities,” says Fuller, noting the need to optimize photomasks and features for exposures in next-generation high-NA scanners - both dry and immersion tools. “From a design perspective, users are not going to want to make all of their critical geometries horizontal or vertical or in an x/y grid… Taking existing designs today and adding this azimuthal polarization capability will give you a benefit. The benefit from azimuthal polarization will not be quite as much as from purely linear polarization, but it will be more universal and help more designs sooner.” - J.R.L.


Venture shows high-efficiency backlight made with CVD carbon nanowalls

Dailight Japan is showing an LCD backlight that uses carbon nanowalls to produce an efficient 80lm/W of light, a 60% better conversion rate than conventional cold-cathode technology. The venture, a subsidiary of the Meikyosha Group, uses plasma CVD technology originally developed by Prof. Akio Hiraki at Osaka U. and Kochi U. of Technology to grow masses of flat carbon nanowall platelets at right angles to the substrate. When an electrical field is applied, electrons are emitted from the top of the platelets, hit a phosphor body, and produce light. Compared to a conventional cold-cathode tube light, where the big voltage drop near the plasma cathode consumes much of the applied energy, this direct emission efficiently produces 25% brighter light using 23% less energy. The company is showing a prototype 10cm diagonal flat light with faster reaction speed (100µsec) and similar rated life (>50,000 hr) compared to current backlights.


Japanese venture Dailight uses carbon nano platelets as efficient emitters for a potential display backlight source. (Source: Dailight)
Click here to enlarge image

Previous carbon nanowalls haven’t produced much light, but Dailight says its improved CVD technology grows higher-quality crystals that significantly increase electron emission. The company figures the CVD method should also enable mass production fairly easily, and it hopes to license such production this spring.

However, the light still requires high ~7kV voltage to operate. Researchers hope to lower it to 3kV within months by improving the phosphor materials, which could make the light source practical for LCD TVs.

- M. Kimura,
SST partner Nikkei Microdevices


In-Ga-Zn-O transistors on flexible plastic look manufacturable

The high-speed, transparent transistors made on flexible plastic film at room temperature by Hideo Hosono and his group at the Tokyo Institute of Technology look like they’ll also be manufacturable with conventional semiconductor equipment.

The amorphous In-Ga-Zn-O material has grabbed attention for working at about 10× the speed of other flexible circuit candidates, as well as being highly transparent. Researchers have reported that, unlike amorphous silica, the material can be deposited at close to room temperature, avoiding problems with damaging the flexible plastic substrate. And it is reportedly more stable in heat, moisture, and oxygen than organic semiconductor alternatives that also have been made at low temperatures.

Hosono’s group now reports that its flexible In-Ga-Zn-O transistor uses a PET (polyethylene terephthalate) base, coated with a film of amorphous InGaZnO4, with Y2O3 gate oxide and ITO electrodes, made with conventional photolithography. When rolled into a tube with a 30cm radius, performance of the transistor degraded only slightly.

The In-Ga-Zn amorphous oxide crystallizes at 600°C, so unlike organic materials, there is little impact from changes at usual device operating temperatures. Stability to moisture and oxygen is similar to that of ITO, so barrier films are not needed. Hosono says they’re getting speeds up to 10cm2 · V-1 · s-1.

One remaining problem is the high off current of 10-7A, which can cause unnatural colors or blotchiness in the display. But Hosono figures that can be improved with better process technology. The researchers made the current film with a pulsed-laser deposition tool they happened to have in the lab, and have not yet made any effort to optimize the process.

- N. Tanaka,
SST partner Nikkei Microdevices