Issue



Meeting the Cu diffusion barrier challenge using ALD tungsten nitride carbide


06/01/2005







Shrinking dimensions leave less volume for copper in interconnect structures, thereby increasing via and line resistances. An ultrathin conductive diffusion barrier is required to mitigate the problem. A tungsten nitride carbide (WNC) layer deposited by atomic layer deposition (ALD) is an effective copper diffusion barrier and can be the solution to keep low interconnect resistances. Following successful integration in SiO2, integration of ALD WNC in the Aurora low-k dielectric material also has proved successful and has demonstrated electrical properties superior to PVD Ta/TaN.

Currently, physical vapor deposition (PVD) Ta/TaN thin films are used as copper diffusion barriers in semiconductor devices. The nonconformal nature of PVD leaves a thicker barrier layer at the bottom of a via and trench than at the sidewall of a via and trench. The barrier material is a lot less conductive than Cu; thus, the thick barrier layer at the bottom increases the via resistance directly and the line resistance indirectly (by leaving less volume for Cu in the damascene structure). Figure 1 shows a schematic of copper interconnects using a nonconformal barrier layer by PVD and a conformal barrier layer by ALD. Resputtering is performed alone or with other processing steps to maintain a low resistance by reducing the PVD barrier thickness at the bottom. These corrective measures increase PVD tool costs and limit throughput. Because of PVD’s directional nature of deposition, it is not ultimately scalable.


Figure 1. Schematic comparison of copper interconnects using a) a PVD barrier layer and b) an ALD barrier layer.
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The International Technology Roadmap for Semiconductors (ITRS) specifies a barrier thickness of 5nm at the 45nm technology node and 3.5nm at the 32nm node [1]. Clearly an ultrathin, conductive, and conformal barrier is required. For scalability, a barrier that can be applied as deposited without the assistance of nonscalable directional methods is highly desirable.

ASM developed tungsten nitride carbide (WNxCy or WNC) using the ALD technique, which meets all requirements for a barrier material at future technology nodes [2, 3]. ALD is most suitable for precise control of ultrathin film depositions because it forms a conformal thin film using only surface reactions by sequential supply of reactive gases. An ALD WNC process can replace a PVD Ta/TaN process in a standard BEOL process flow and be integrated with PVD Cu seed, electrochemical deposition (ECD) Cu fill, and chemical mechanical planarization (CMP). By using ALD WNC, better electrical properties and longer lifetimes were obtained compared to PVD Ta/TaN in a SiO2 dielectric damascene process flow.


Figure 2. WNC barrier (2.4nm) deposited with 30 ALD cycles on SiO2 dielectric and copper followed by PVD Cu seed deposition and ECD Cu filling. (Photo courtesy of Sematech)
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Results were presented at the International Interconnect Technology Conference (IITC) and Advanced Metallization Conference (AMC) by IMEC and Sematech in cooperation with ASM [4-6]. A cross-section TEM image of a dual-damascene interconnect structure showed that a 2.4nm WNC film is conformal and continuous (Fig. 2), and blocked copper diffusion after many thermal cycles at 400°C [4].

Mechanism of ALD WNC

ALD WNC is deposited at 275-325°C by supplying WF6, NH3, and triethylboron [B(C2H5)3 or TEB] in cyclic pulses. The film growth rate is 0.08nm/cycle; the WNC is conductive (300-400µΩ-cm) and dense (15.4g/cm3). The film’s high density and amorphous nature leave no easy diffusion path, therefore effectively blocking Cu diffusion [7, 8].

Studies of the ALD WNC growth mechanism revealed the role of each reactive gas [9]; most interesting is the function of TEB. It is essential to start ALD WNC cycles with a pulse of TEB, because it initiates the WNC growth by reacting with surface -OH sites. Once the substrate is covered with an initial WNC layer, the same reactions recur during each ALD cycle. During the pulse, TEB reacts with surface -NHx sites, removes F from the surface, and provides reactive sites for WF6; C2H6, B(C2H5)2F, and C2H5F also are produced during the TEB pulse.

During the next pulse, WF6 removes B from the surface in the form of B(C2H5)F2, B(C2H5)(CH3)F, and BF3, and provides reactive sites for NH3. The reduction of W occurs and C is incorporated in the form of metal carbide during this pulse. About two F atoms per one W atom remain on the surface at the end of the WF6 pulse. In the third pulse, NH3 forms nitride, removes a small amount of F in the form of HF, and provides reactive sites for TEB. Another ALD cycle of TEB, WF6, and NH3 pulses then follows.

ALD WNC is notably different from ALD WNx using WF6 and NH3 in many aspects. In the ALD WNC process, most F atoms are removed as fluorinated boron compounds, and only a limited amount of HF is generated. ALD WNC is much more conductive than ALD WNx (300-400 vs. ~4500µΩ-cm) and shows better Cu adhesion and wettability. ALD WNC grows easily on a SiO2 or oxide-like substrate, whereas ALD WNx has a long incubation time before film growth begins on the same type of surface.

In chemical vapor deposition (CVD) and ALD at moderate or low temperatures, carbon incorporated in the film generally does not form metal carbide and decreases the film conductivity. This is not the case for ALD WNC, which is very conductive thanks to (and not despite) the high C content (W:N:C = 50:22:28). XPS data and the higher conductivity than WNx indicate that the carbon in ALD WNC is in the form of metal carbide (tungsten carbide is more conductive than tungsten nitride). The reduction of tungsten must occur concurrently with this “carbide formation.” In WF6, the oxidation state of W is +6, whereas in conductive carbide and nitride, the oxidation state of W is not larger than +4: +4 in WC, +3 in WN, and even lower in W2C and W2N.

The easy reduction of metal in ALD WNC is in sharp contrast to ALD TaNx. Ta is in a +5 oxidation state in all volatile Ta sources, such as TaCl5, Ta[N(CH3)(C2H5)]5, and Ta(O C2H5)5. ALD or CVD of conductive TaNx film is difficult due to the formation of nonconductive Ta3N5 (~2×108µΩ-cm, Ta oxidation state = +5) instead of the conductive TaN (Ta oxidation state = +3). Exposure to Zn vapor or H plasma after film deposition has to be used to reduce Ta and obtain a conductive TaNx film.

Integration of ALD WNC with a low-k dielectric layer

Following the introduction of WNC in SiO2 damascene process flows, an interconnect structure of two metal levels was successfully fabricated recently using the ALD WNC barrier in Aurora CVD low-k dielectric material. ALD WNC replaced PVD Ta/TaN in a standard BEOL process flow and was integrated with PVD Cu seed, ECD Cu fill, and CMP. A 60-cycle ALD WNC barrier (4.2nm) was used on a dual-damascene structure with a minimal feature size of 0.20µm. Figure 3 shows the FIB-SEM image of the resulting M1-V1-M2 interconnect structure of the two metal layers.


Figure 3. FIB-SEM image of M1-V1-M2 copper interconnect structure using a 60-cycle ALD WNC barrier (4.2nm) on an Aurora CVD low-k dielectric and Cu.
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Electrical properties were measured for two sets of samples using an ALD WNC barrier as well as two sets of control samples using PVD Ta/TaN (Figs. 4 and 5). All data are consistent with narrow distributions, indicating a good control of ALD WNC and high repeatability of all the steps in the BEOL process flow. Figure 4 shows the average via resistance of 4000 via chains formed in the M1-V1-M2 structure using the ALD WNC barrier and a reference PVD Ta/TaN barrier. Via resistance using the ALD WNC barrier is 25% smaller than the reference PVD Ta/TaN barrier, which is according to expectations.


Figure 4. Via chain test results of two sets of samples using a 60-cycle ALD WNC barrier (4.2nm) on an Aurora CVD low-k dielectric layer with a minimal feature size of 0.20µm. The via resistances are smaller than the results of control wafers using a PVD Ta/TaN barrier process.
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There are concerns for ALD barrier integration with low-k dielectric materials, mainly because of possible damage to the dielectric layer by the barrier deposition process. If the low-k dielectric layer has an open pore structure with large pore sizes, ALD source gases can penetrate into the porous material during the barrier ALD process. This could cause an increase of the effective dielectric constant and deterioration of other dielectric properties, e.g., a larger leakage current and/or increased capacitance between copper lines.


Figure 5. a) The line-to-line leakage current and b) the line-to-line capacitance of two sets of samples using a 60-cycle ALD WNC barrier (4.2nm) on an Aurora CVD low-k dielectric with a minimal feature size of 0.20µm are comparable to results of control wafers using a PVD Ta/TaN barrier.
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A fabricated Cu interconnect using a 60-cycle ALD WNC barrier showed no increase of line-to-line capacitance and line-to-line leakage current compared to the reference PVD Ta/TaN barrier (Fig. 5). The ALD process clearly did not have a negative impact on the dielectric layer. Electromigration and stress-induced migration tests are being performed.

ALD seed layer for a copper fill process

Currently, the ECD Cu fill process uses a thick PVD Cu seed layer on the field. Electrodeposition needs to be uniform; thus, electric current/unit wafer area needs to be the same even though electrical contacts frequently are made at the edge of the wafer in ECD equipment. A thick PVD seed layer on the field allows uniform current density over the wafer. Eventually, the seed layer required for ECD Cu also needs to be deposited by either a more conformal technique than PVD, or a technique capable of perfect bottom-up fill of narrow features, or a combination of the two. An ALD seed layer is conformal and therefore is of the same thickness on the field area as in the damascene structure. The thin seed layer on the field is a challenge to ECD because it may be too resistive to carry enough electrical current.

Direct ECD on an ALD seed layer probably will remain the most cost-effective Cu fill solution. Thus, accommodating a thin ALD seed layer on the field will be pursued. However, CVD or electroless deposition may be necessary to thicken the seed layer, in case ECD requires a thicker seed layer than an optimal ALD seed process can provide. A very thin seed layer may be usable if CVD Cu is done right after the ALD seed process without exposing the wafer to the air.

A thicker Cu seed layer or, alternatively, a thin seed layer of oxidation-resistant conductive material may be necessary if the wafer needs to be exposed to the air before ECD or electroless deposition. CVD Cu may have another advantage.

According to the ITRS, “CVD Cu fill may become competitive as a fill technology if the same ‘superfilling’ behavior and microstructure characteristic of ECD can be achieved” [1]. Superfilling behavior of CVD Cu using a catalyst on the surface was demonstrated previously [10] and may produce large Cu grains in very fine interconnect structures.

Conclusion

Ultrathin conductive diffusion barriers are required to prevent an increase in resistance for both vias and lines despite the shrinking interconnect dimensions. ALD WNC meets all requirements with excellent diffusion barrier properties and high conductivity. Interconnect structures fabricated using ALD WNC diffusion barriers and Aurora low-k dielectric layers in a standard BEOL process flow demonstrated electrical properties superior to a reference PVD Ta/TaN barrier.

Acknowledgments

The authors thank ASM colleagues, especially Suvi Haukka, Marko Tuominen, Hans Bastings, Maarten Stokhof, and Nathan Kemeling. Aurora and ALCVD are registered trademarks of ASM International N.V.

References

  1. International Technology Roadmap for Semiconductors, 2003; http://www.itrs.net/public/.
  2. W.-M. Li, K. Elers, J. Kostamo, S. Kaipio, H. Huotari, M. Soininen, et al., “Deposition of WNxCy Thin Films by ALCVD Method for Diffusion Barriers in Metallization,” Proc. IEEE IITC, pp. 191-193, 2002.
  3. W.-M. Li, M. Tuominen, S. Haukka, H. Sprey, I.J. Raaijmakers, “Diffusion Barrier Material for Cu Metallization Using ALD- WNxCy,” Solid State Technology, Vol. 46, No. 7, pp. 103-106, 2003.
  4. S. Smith, G. Book, W.-M. Li, Y.M. Sun, P. Gillespie, et al., “The Application of ALD WNxCy as a Copper Diffusion Barrier,” Proc. IEEE IITC, pp. 135-137, 2003.
  5. L. Chen, G. Book, S. Smith, M. Rasco, W.-M. Li, et al., “Performance of ALD WNxCy as a Cu Barrier in Oxide and Porous Low-k Dual Damascene Structures,” AMC 2003, Vol. 19, pp. 729-735, 2004.
  6. C. Bruynseraede, A.H. Fischer, F. Ungar, J. Schumacher, V. Sutcliffe, et al., “Comprehensive Electromigration Studies on Dual-Damascene Cu Interconnects with ALD WCxNy Barriers,” Proc. IEEE IITC, pp. 12-14, 2004.
  7. S.-H. Kim, S.S. Oh, K.-B. Kim, D.-H. Kang, W.-M. Li, et al., “Atomic-Layer-Deposited WNxCy Thin Films as Diffusion Barrier for Copper Metallization,” Appl. Phys. Lett. 82(25), pp. 4486-4488, 2003.
  8. S.-H. Kim, S.S. Oh, H.-M. Kim, D.-H. Kang, K.-B. Kim, et al., “Characterization of Atomic-Layer-Deposited WNxCy Thin Film as a Diffusion Barrier for Copper Metallization,” J. Electrochem. Soc., Vol. 151, No. 4, pp. C272-C282, 2004.
  9. W.-M. Li, S. Haukka, M. Tuominen, A. Rahtu, M. Ritala, et al., “ALD Reaction Mechanism of WNxCy,” CD-ROM of ALD 2004 Conf.
  10. H. Park, W. Koh, S.-M. Choi, K.-C. Park, H.-K. Kang, et al., “Superfilling CVD of Copper Using a Catalytic Surfactant,” Proc. IEEE IITC, pp. 12-14, 2001.

Wonyong Koh is a technical marketing director at ASM Japan K.K., 23-1, 6-chome Nagayama, Tama-shi, Tokyo 206-0025, Japan; ph 81/42-337-6314, fax 81/42-389-7555.

Devendra Kumar is senior director, BEOL Technology, at ASM America.

Wei-Min Li is a senior process engineer at ASM Microchemistry Oy.

Hessel Sprey’s current work involves integration of BEOL materials in damascene process flows.

Ivo J. Raaijmakers is CTO of frontend operations at ASM International.