Issue



Single-wafer polymer removal on DRAM structures using inorganic chemicals


05/01/2005







A collaborative effort between a memory manufacturer and a semiconductor tool supplier focuses on optimizing inorganic chemicals for polymer removal from DRAM device structures using single-wafer spin processors, instead of hydroxylamine-based stripper in batch wetbenches. The work aims to pioneer the use of a dilute sulfuric acid/hydrogen peroxide (DSP) mixture for front-end-of-line (FEOL) polymer removal. Overall, about a dozen layers in both FEOL and back-end-of-line (BEOL) process steps have been targeted for evaluation.

Post-ash polymer residue removal in both FEOL and BEOL processing applications has become a major target for cost-reduction programs among semiconductor manufacturers, particularly cost-driven memory producers. An analysis of daily expenses in wafer fabs reveals that chemicals are more expensive than any other material, and conventional organic-based media used for post-ash residue removal share similar problems. Organic components in stripper formulations have high production and disposal costs, and they present environmental protection issues. These chemicals also can be relatively expensive due to intellectual property rights among suppliers. Consequently, attempts have been made to introduce polymer-removal processes based on dilute inorganic acid mixtures, which can be handled by common mixed-acid drain.

Trials on conventional wetbenches have used a DSP mixture containing parts-per-million (ppm) concentrations of hydrofluoric acid (HF). These tests showed a strong dependency of the effectiveness of the DSP mixture on the HF concentration and a narrow window of only 2ppm. The fluid dynamics on a single-wafer spin processor (Fig. 1) could overcome the problems, however, and tests show the allowable HF concentration on the spin processor was about two orders-of-magnitude larger than that on a wetbench. Moreover, this result could be reproduced under production conditions.


Figure 1. Single-wafer spin processors operating in parallel inside a volume production tool.
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A dozen target layers have been identified in DRAM fabrication steps to evaluate the spin-processor performance of DSP+, a product from Kanto Corp. in Portland, OR. Process conditions for each layer were optimized individually to enable the shortest process times possible while ensuring wafer-to-wafer repeatability, low particle levels, and high yields, which were verified by a series of physical checks as well as electrical tests.

Residue issues in DRAMs

Structures in DRAM devices usually are formed by reactive ion etching (RIE). The typical etch reactants are mixtures of aggressive gases (e.g., BCl3/Cl2). It is well known that RIE residues formed in the subsequent photoresist processing (organic or organometallic composition) contain residues from the etch gases, which might lead to atmospheric corrosion of the features. Also, residues above the metal lines might collapse and therefore increase via contact resistance, or cover the gaps and block the backfill of dielectrics.

All these circumstances lead to the necessity of a cleaning step. Conventional cleaning solutions are solvent-based polymer removers (often containing hydroxylamine, other amines, catechole, and/or strong bases). While high-pH cleaning solutions require a neutralizing-solvent rinse step to avoid etching of tungsten contacts, medium-pH solutions are dangerous for particle deposition because of electrostatic potentials.

All these problems can be avoided by using an acidic aqueous solution, such as DSP+. In addition to its production-proven capability of removing organic residues, it is an isotropic, slow etchant for aluminum. DSP+ forms passivation layers, which are stable against galvanic corrosion of the Al (Cu) alloy. On top of that, the hydrogen peroxide in the mixture acts as an inhibitor against any migration of sulfate from the sulfuric acid into the passivation layer.

These qualities support DSP+ as the solution of choice for state-of-the-art cleaning of FEOL structures as well as aluminum interconnects in terms of effectiveness; avoidance of corrosion and electromigration; environmental, safety, and health standards; and cost-effectiveness. A major benefit lies in the huge cost difference between proprietary solvent strippers and the inorganic acid mixture (Table 1).

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The usage of mixtures with a known composition opens the possibility of bath lifetime extension and advanced process control by combining spiking of key ingredients with accurate in-line concentration monitoring. This counteracts medium decay by chemical reaction and evaporation and further reduces costs.

Description of equipment

In conducting the HF tests, the spin processor chuck relies on Bernoulli’s Principle to fix the wafer at a constant distance from the chuck surface on a nitrogen bed (N2). The wafer is held in place by six edge-contact-only pins that make contact at the wafer bevel, with sufficient force to center the wafer on the N2 cushion and hold it in place while the chuck rotates. The chuck rests in a process chamber, as depicted in Fig. 2. Machines can be equipped with a maximum of eight chambers to satisfy throughput requirements in volume manufacturing.


Figure 2. Schematic drawing of the spin-processor chamber.
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In these multiple-chamber tools, the process chamber can have up to three independent process levels: Two dispense different process chemicals (or chemical blends) and one is dedicated to DI water rinsing and nitrogen drying. The process chuck rotates clockwise or counterclockwise within the process chamber while the medium is dispensed. The different chemistries are dispensed onto a spinning wafer at three dedicated process levels, allowing tight process control and eliminating the risk of chemical cross-contamination.

Process evaluation

After preliminary testing in the tool manufacturer’s lab, the evaluation was conducted in the chipmaker’s fab in South Korea. Process development involved nearly a dozen target layers in FEOL and BEOL device structures (Table 2).

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The flexibility of this process approach is underscored by the variety of choices for optimization. Aside from temperature and process time, the component concentration can be modified. On single-wafer tools, fluid dynamics and short process times favor the use of more aggressive chemicals with tailored concentration - in some cases, even the successive use of DSP+ and diluted HF (dHF) steps. Moreover, on spin-processor tools, the improved fluid dynamics on the wafers offers the possibility of selecting single-step and multiple-step recipes. This variety allows for finding the right process window for each layer to guarantee safe polymer removal without risking galvanic corrosion or surface and grain-boundary pitting. On single-wafer tools, it is even worth tailoring DI and nitrogen-dry step conditions for eliminating particle levels and organic residues without unnecessary throughput reductions.

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In this case, all tests were performed on a multiple-chamber, 300mm spin processor operating at room temperature (25°C), except for preliminary etch-rate checks. The HF concentrations were in the range of 100-500ppm; finally, two concentrations were chosen for production. The more dilute mixture (DSP+ low) is the standard and the more concentrated mixture (DSP+ high) is used for more difficult structures to enable good performance with short process times.


The DSP+ process has proven successful in cleaning both contact/via structures and bit/metal lines, covering both FEOL and BEOL steps. The cleaning times were about 30 sec for bit/metal lines with DSP+ low (Fig. 3), and up to 60 sec with DSP+ high for the most difficult contact/via structures to clean.

Electrical data and yield improvement

After passing the scanning electron microscopy analysis, electrical characterization has been used throughout the evaluation of the DSP application. Electrical (resistivity) data from subsequent, more comprehensive electrical tests with the DSP mixture typically are comparable to or better than those from similar structures cleaned with the process-of-record (POR) hydroxylamine-based chemistries. The results of many electrical tests indicate that dispensing the DSP mixture on a spin-processing system offers tighter process control than does the POR compound.

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A device’s electrical characteristics are a product not only of the efficiency of the cleaning chemistry but also of its effect on the underlying materials, because any loss of critical dimension affects a device’s electrical properties. While it is commonly thought that sulfuric acid/peroxide/HF mixtures damage metal surfaces, even if diluted, an analysis of device layers’ etch characteristics and supporting electrical data show that using the DSP mixture in a spin processor is safe. Table 3 summarizes the etch characteristics of selected layers after being cleaned with the DSP mixture, showing less etch loss than the POR.

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As Table 4 shows, functional yield increases are achieved with the spin-processor DSP+ process. The five representative FEOL and BEOL steps released to production so far resulted in an approximately 3% wafer functional yield increase.

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Whereas solvent wet-step toolsets usually contribute significantly to surface defectivity, the robustness of the spin-processor DSP+ process was underlined by high particle performance, lower defectivity, less grain-boundary pitting, and minimized galvanic corrosion with comparable polymer-removal efficiency. The benefits of this approach are summarized in Table 5.

Conclusion

For cutting-edge device nodes around 0.1µm and beyond, a Korean chip manufacturer and a supplier of single-wafer equipment have developed a cost-effective cleaning application that uses a dilute, entirely inorganic mixture of mineral acids and peroxide in combination with spin-processing technology to remove post-ash polymer residue from wafer surfaces. Having managed to extend the scope of the DSP process into FEOL applications, the inorganic mixture is an effective alternative to residue strippers containing conventional organic chemicals, which involve proprietary products and waste-disposal overhead costs.

As a result of process refinements to optimize the chemistry’s throughput without jeopardizing performance, metal and bit lines can be cleaned in 30 sec with a low-concentration mixture and contact/via structures in <60 sec with a higher-concentration mixture. The single-wafer DSP polymer removal process demonstrated at least comparable and, in many cases, superior polymer removal capability compared to commercially available solvents. It has shown no CD loss in addition to improvements in defectivity, pitting, and parametric tests, including functional yield increase.

So far, the DSP process with two different concentrations has been approved for five out of a dozen target layers, which include both FEOL and BEOL steps. These five different process steps were defined for production use for more than 100 lots/day on a four-chamber tool. The remaining steps are in different evaluation stages. To meet capacity and throughput requirements, the process transfer to the new-generation eight-chamber platform is in progress.

Particularly for larger wafers, the combination with a single-wafer tool represents lower risk to fab line yields than the conventional solvent batch process. The continued advance of DRAM technology is accompanied by a increased shift to single-wafer technology for 300mm manufacturing due to a variety of factors such as the low cost-of-ownership, flexibility, and yield benefits, whereas traditional batch processing seems unable to keep up with these tightening requirements.

Acknowledgments

DSP+ is a product of Kanto Corp.

Jong-Kook Song received his bachelors in inorganic material engineering and his masters in material engineering from Hanyang U. in Seoul. He is part leader for wet clean in 300mm production lines at Samsung Electronics, San #16, Banwol Ri, Taean Eup, Hwasung City, Kyunggi Do, Korea; ph 82/31-208-2239, e-mail [email protected].

Han-Mil Kim received his BSc in chemistries from Korea U. in Seoul. He manages the wet clean section of 300mm production at Samsung.

Eun-Su Rho received his degree in electrocommunication from Changshin College, and he is working in process application for SEZ Korea Ltd., West Tower 11FL, Posco Center Bldg., DaeChi 4Dong, Kangnam Ku, Seoul, Korea; ph 82/2-559-0783, e-mail [email protected].

Christian Haigermoser received his masters in technical chemistry from the Graz U. of Technology in Austria, and his PhD from Hokkaido U. in Sapporo, Japan. He is in charge of the process application department of SEZ Taiwan and Asia Pacific.

Sally-Ann Henry received her bachelors in pure and applied chemistry from the U. of Strathclyde in Glasgow, Scotland, and her postgraduate diploma in management from the Open U. in Milton Keynes, England. She is VP of the global cleaning polymer program at SEZ.