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Controlling CMP by optically monitoring wafer stresses


05/01/2005







The application of a new coherent gradient sensing interferometer that characterizes single- and double-layer copper damascene processing of 200 and 300mm wafers - using low-k dielectric films - is demonstrated.

In the damascene process, multilayer film stacks are used, so multilayer stress must be considered. Such stress can be caused by adhesion of the film to the underlying substrate or film, intrinsic stress associated with the deposition process, and lattice mismatch strain between two dissimilar adjacent sublayers.

There is almost always a large mismatch in the coefficients of thermal expansion between the individual films and the substrate, so shear stresses at the interface as well as substrate curvature are generated. For metal films, this mismatch strain can cause plasticity and creep of the film during thermal cycling. Most previous stress studies have been limited to single-layer metallization films, and there is a paucity of strain measurements on multilayer films of interest in damascene processing.

In general, this work is complementary to numerous theoretical models and experimental studies of the CMP process and can be used to minimize the within-wafer nonuniformity (WIWNU) of the removal rate, which can result in reduced dishing and erosion.

In the specific case of copper damascene processing, a greater understanding of CMP is needed to control and eliminate the conditions that lead to film delamination - particularly important for low-k films because they are more prone to failure as a result of shear stresses during polishing. This study emphasizes wafer shape and stress distribution changes that occur during CMP.

The CMP of the Cu layer was conducted in an incremental fashion and curvature measurements were performed at each step. Patterned structures utilizing either intermetal dielectric films of SiO2 or porous low-k were studied. The large wafer curvature that is induced in the wafers, principally during the metal deposition and annealing steps, is largely relieved by CMP. The wafer curvature changes are greatest initially, and then proceed linearly with polish time for the majority of the Cu removal process. The polish rate and uniformity also undergo changes at different stages of the process.

The greater need to focus on stress and wafer curvature during damascene processing was highlighted in an earlier study [1]. This prior data was obtained at different steps of damascene processing of 200mm wafers by using a capacitance probe. The data revealed that a substantial change in wafer curvature did occur during single- and dual-damascene processing. This paper is an extension of this earlier work, but a new metrology tool is employed.

Results on 300mm wafers are included along with 200mm wafers in the study, as well as damascene structures with smaller features than in the earlier study. The multilayer stress was characterized with the new Oraxion tool that could readily make measurements on wafers of different sizes and both blanket or patterned wafers. Patterned structures utilizing either intermetal dielectric films of SiO2 or porous low-k were studied at different stages of damascene processing. Special focus is placed upon CMP because wafer curvature changes are particularly large and CMP itself introduces mechanical stress that can add to the existing stress of the film stack. The CMP process must be optimized to avoid creating defects such as delamination or increasing the size or number of defects if present prior to CMP. The CMP of the Cu layer was conducted in an incremental fashion, and curvature measurements were performed at each step.

Coherent gradient sensing

This work used a coherent gradient sensing (CGS) interferometer, which was developed by Rosakis et al. [2, 3]. The main advantages of this technique over other common approaches, such as capacitance probe and laser beam scanning, are in the areas of resolution and measurement speed. High-density mapping capability provides the ability to resolve deformation occurring at relatively high spatial frequencies (short spatial wavelengths).

The minimum possible spatial wavelength that can be characterized with the tool is on the order of 1mm. This full wafer capability allows the complex deformation states of large wafers to be characterized. Measuring the spatial dependence of stress is gaining additional importance for advanced processes in which it is essential to understand the thermomechanical processes.

The acquisition of two orthogonal slope measurements on the patterned wafers enables the computation of the complete stress state at any location. This facilitates the computation of numerous stress quantities (e.g., hydrostatic or von Mises stress) and the investigation of the role of stress states in certain processes, phenomena, or failure mechanisms. In general, interferometric techniques have high sensitivity to out-of-plane deformation with minimum sensitivities on the order of a few nanometers, whereas other scanning or capacitance probe techniques have sensitivities on the order of tens or a few hundred nanometers. This feature of the interferometer enables characterization of stresses in thinner films, regardless of the sample patterning, which will have less deformation [note that for a constant stress, curvature change (deformation) is linear with film thickness]. Another merit of the technique is vibrational tolerance relative to conventional interferometers.

This method for curvature measurements can be used for the wafer-scale imaging of stress distributions. The tool is a diffraction-based, common-path, beam-shearing technique that provides a map of the individual components of wavefront slope. The CGS interferograms measure wavefront slope by beam shearing, or splitting and displacing a wavefront laterally with respect to itself by a small distance. This can be considered optically differentiating the wavefront. The fringes represent constant slope contours on the sample, and the fringe density of the interferogram is the curvature in the direction of shearing. The curvature tensor field can be determined directly from the interferogram patterns recorded in reflection by differentiating the fringes of the in-plane gradient. To determine the full curvature tensor, the gradient field in two orthogonal directions is recorded. Initial results of this technique for characterizing 0.25µm damascene processing have been presented on both 200mm and 300mm wafers. This early study revealed that the greatest changes in wafer stress/topography occur as the wafer progresses through PVD barrier/seed, copper plate, copper anneal, and copper CMP [4].

Experimental

This study was conducted on the alpha model of the CGS300 tool manufactured by Oraxion. During this study, the tool, which is 200/300mm-capable, was located in the Advanced Technology Development Facility (ATDF; a wholly owned subsidiary of Sematech), where all wafer processing was conducted. The interferometric data was captured using a 1024×1024-pixel CCD camera. The wafer was rotated to capture both slope components, slope x and slope y. The total acquisition cycle was <10 sec.

A circular analysis region was specified that filtered out the edge effects of the specimen. A typical diameter for the analysis region is >90% of the specimen diameter, and edge exclusions as small as 1.5mm are possible. The relative slope was calculated from the interferograms using standard interferometric processing techniques. The slope data was then differentiated numerically to produce the curvature values. Stress values were calculated based on the geometry of the film stack of interest and the relevant substrate properties.

The complete stress tensor across the wafer was generated for each process step under investigation. From the orthogonal stress components, σx(x,y), σy(x,y), and σxy(x,y), the principal stress components, σ1(x,y) and σ2(x,y), were computed directly. In general, any stress-induced process (e.g., voiding or electromigration) will have specific stress components or a combination of stress components that are more relevant than others in evaluating experimental data. In this study, the data is reported in terms of the sum of the in-plane principal stresses (σ1 + σ2). This quantity was selected because it is proportional to the local out-of-plane strain ε33 of the film through the following relation:

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where σ1 is the maximum principle stress, σ2 is the minimum principle stress, Μf is Poisson’s Ratio of the film, and Mf is the biaxial elastic modulus of the film. The out-of-plane strain is important in via structures because via resistance will vary with strain through the piezoresistive effect, and voids will form as a result of strain along the axis. Additional details regarding the computation of stress states in thin films can be found [5].

For the CMP work, two different polishers were used. The 200mm wafers were polished on an Applied Materials Mirra, and the post-CMP clean was performed on an Ontrack Synergy cleaning tool. The 300mm wafers were polished with an Applied Materials Reflexion, equipped with a Mirra/Mesa cleaner. Both are rotational polishers. For Cu polish, Rodel polyurethane-based pads were utilized - a IC1000 K groove for the Mirra and an IC1010 for the Reflexion. Rodel Politex pads were used for the Ta barrier polish; the Ta thickness was 250Å. Cabot ECP-50001 slurry with added hydrogen peroxide was used for the Cu polish, and Planar Solutions Cu10K2 slurry was used directly in the 200mm case or after filtration in the 300mm polisher for the barrier removal step.

A downforce of 2psi was used together with nearly equal but low rotational speeds of the head and platen. Sixty seconds of conditioning was applied with a diamond disk before the Cu polish. The barrier removal polish required no conditioning. These polish conditions ensured optimum uniformity and also prevented film delamination for the oxide or low-k stacks that were investigated.

It can be assumed that the polishing occurred with solid-fluid-solid contact (hydrodynamic region) of the Stribeck Curve. The wafers were polished for short times, cleaned, and then the interferometric measurements performed. In most cases, these steps were repeated until both the Cu and Ta barrier had been completely removed.

Results and discussion

Figure 1 shows that the tensile stress state of the wafer increases with each added metal stack for the two metal stacks tested. The film stack stress shows a repeatable pattern for both the metal 1 (M-1) and the metal 2 (M-2) damascene process flows through the following steps: barrier/seed deposition, electrochemical deposition (ECD) Cu, Cu anneal, and Cu CMP. The highest stresses are induced by the Cu anneal step.


Figure 1. Total film stack stress for 0.25µm patterned 300mm wafers through both M-1 and M-2 levels.
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The tensile stress to which the film stack is subjected may cause adhesion problems, voiding, pull-out, and/or other stress-related defects. Defects attributable to these changes in stress may not be visible until CMP or subsequent processing decorates or exacerbates them, until electrical testing is conducted, or when cross-sectional analysis is performed. The overall tensile stress in the film stack increases as the volume fraction of copper increases. For example, the stress shown in Fig. 1 post-Cu CMP of the first layer is ~-40MPa, whereas it increases to ~40MPa following the same CMP step of the second damascene layer. If the trend were to continue linearly through subsequent stacks, stress-induced defects may create a substantial yield issue on more sophisticated ICs further along in the wafer processing because of cumulative effects that can only be characterized on a product wafer.


Figure 2. Wafer curvature changes at the M-2 level for 800 wafers with different Cu thicknesses.
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The stress can be affected by changing process conditions or changes in film thickness, as shown in Fig. 2 for different Cu thicknesses; these changes will affect subsequent process stress levels. Figure 2 illustrates the average of the x component of curvature as a function of the processing step for Cu ECD thicknesses of 5, 7, 19, and 15kÅ. The curvature is equal to the reciprocal of the radius of curvature (which is in meters). The sign convention used is that a concave up surface has a positive radius of curvature. According to the most widely accepted convention, a compressive stress has a positive change in wafer bow, while a tensile stress would be represented by a negative change in bow. Tensile stresses are reported as positive with positive radii of curvature. Conversely, compressive stresses are negative with negative radii of curvature. If the wafer has a diameter of d and a bow of b, the radius of curvature, R, can be found by the equation

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Substantial changes in curvature from convex to concave and then back to convex are apparent for all except the 5kÅ Cu plating (ECD) thickness, which remains convex throughout this succession of steps (Fig. 2). This particular wafer entered the metallization steps with a more compressive stress than the others. The thicker the ECD film, the greater the maximum tensile stress will be after the anneal. Thicker ECD Cu leads to more curvature change during CMP. Also, the thinnest (5kÅ) ECD Cu split showed the least curvature range (i.e., greatest uniformity) across the wafer throughout the CMP process.

Figure 3 shows the variation of curvature with polishing time for the same wafers of Fig. 2. The change in curvature with polishing time is relatively high for short polishing durations and then decreases to a steady state for a majority of the polishing process. Upon complete removal of the Cu overburden, the rate of curvature changes diminishes to zero and even reverses in the case of the 5kÅ and 7kÅ Cu films.


Figure 3. Curvature changes for 200mm patterned wafers during CMP as a function of polishing for varying ECD Cu thicknesses.
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The initial drop in curvature could be a consequence of an initial reduction of the Cu overburden edge thickness. The ECD Cu process produced a Cu thickness profile that was thickest at the edge of the wafer, due to the well known terminal effect. The surface of the Cu film is roughest at the outset and has a thin oxide layer. It is during the initial stages of Cu removal that the greatest nonuniformity in removal exists. If delamination occurs, it has been observed that it is during this initial stage of polish.

The linear portion of the curve is a consequence of the near-linear removal of Cu over this region. The change in slope of the curvature-vs.-polishing-time curve occurs when breakthrough to the barrier begins. When the barrier is removed, some of the compressive forces relax, which is reflected in the upward rise in the profile.


Figure 4. Removal rate diameter profiles at different polish times for a 200mm wafer with 1µm Cu ECD film by ex situ sheet-resistance measurements.
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Sheet resistance measurements were utilized to evaluate the material removal rate as a function of both polishing time and position. Figure 4 is a plot of the material removal rate as a function of position across the wafer diameter for four different polishing times (15, 90, 150, and 390 sec). It is clear from the figure that the Cu polish rate is not uniform during each stage of the polish and that the amount of nonuniformity decreases with increasing polishing time. This same behavior has been found for Cu polishing of 300mm wafers. The model for oxide polishing, which was advanced by McGrath and Davis [6], also appears to apply to Cu polishing. This model, which is an adaptation of the Preston Equation, is employed to explain the nonlinear behavior of the removal rate, RR, due to a change in film stress; namely,

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where Kp is the Preston Coefficient, P is the applied polishing pressure, S is the relative velocity between the wafer and pad, b is a proportionality constant, and σ is the film stress.

The most important stress is the composite stress for the entire stack and not just the single film stress of the film being removed, because the wafer curvature is dependent upon this composite stress. This composite film stress must be considered along with the stress on the wafer surface from the downforce on the carrier, and the shearing force caused by friction from the relative motion between the wafer and pad.

The curvature profiles presented are across-wafer averages. Of significance are the spatial variations that are most apparent from the wafer maps. Figure 5 shows diameter plots during polish for a 300mm patterned wafer employing an oxide dielectric film; the curvature profile is not altered by the Cu and Ta polish steps. Thus, CMP does not modify the overall shape of the wafer.


Figure 5. Diameter profiles of curvature measured in the x direction for a 300mm patterned wafer with SiO2 interlevel dielectric during Cu polish.
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It was discovered early in the course of this work, however, that for an advanced 300mm damascene process (then under development), the CMP process was changing stress (curvature) in a nonuniform manner. This difference in curvature before and after CMP was the same for multiple wafers. Regions that showed high stress (curvature) before CMP showed low stress (curvature) after CMP. This behavior produced undesirable electrical test results. The problem was corrected by process modifications both at CMP and at earlier steps. Monitoring composite film stress and curvature changes is therefore especially valuable during early stages of process development, as well as for process monitoring once the process is established.

Conclusion

The large changes that are experienced at each level in monitoring wafer curvature and composite stress during Cu damascene processing, and the trend of increased tensile stress at each level, are the reasons monitoring these parameters is advantageous. The particular merits of speed, resolution, stability, and ability to deal with wafers of different sizes and at different processing steps afforded by the CGS technique are apparent.

Particular emphasis has been placed on Cu CMP. For both 200mm and 300mm wafers, the Cu removal rate is linked to the wafer curvature; both display substantial changes over the full polish process. The greatest changes in wafer stress/topography occur as the wafer progresses through PVD barrier/seed, Cu plate, Cu anneal, and Cu CMP steps, and this stress accumulates further when going from single- to double-layer structures.

The greatest change in curvature, which is proportional to stress, was found to occur during the initial stage of Cu CMP. A properly optimized damascene process does not modify the shape of the curvature profile during CMP. Delamination or film cracking will result in nonuniform stress (curvature) changes.

The main advantages of this technique over other common approaches such as capacitance probe and laser beam scanning are in the areas of resolution and speed of measurement.

Acknowledgments

Sematech, the Sematech logo, AMRC, Advanced Materials Research Center, ATDF, the ATDF logo, Advanced Technology Development Facility, ISMI, and International Sematech Manufacturing Initiative are servicemarks of Sematech Inc. All other servicemarks and trademarks are the property of the respective owners. CGS measurement technique is a trademark of Oraxion Diagnostics. Assistance for Oraxion-related work at ATDF was provided by Andy Rudack, Carol Boye, and Siew-Tin Lim Dorris.

References

  1. R. Carpio, T. Tran, G. Martin, R. Estrada, Proc. Fifth Intl. Symp. on Chemical Mechanical Polishing, PV 2002-1, p. 101, 2002.
  2. A.J. Rosakis, R.P. Singh, E. Kolawa, N.R. Moore Jr., “Coherent Gradient Sensing Method and System for Measuring Surface Curvature,” US Patent 6,031,611, Feb. 29, 2000.
  3. A.J. Rosakis, R.P. Singh, Y. Tsuji, E. Kolawa, N.R. Moore Jr., Thin Solid Films 325, p. 42, 1998.
  4. C. Boye, R. Carpio, J. Woodring, D. Owen, to be published in Metrology, Inspection, and Process Control for Microlithography XVIII, Vol. 5375, R.M. Silver, ed., 2004.
  5. L.B. Freund, S. Suresh, Thin Film Materials: Stress, Defect Formation and Surface Evolution, pp. 120-124, Cambridge U. Press, Cambridge, UK, 2004.
  6. J. McGrath, C. Davis, Abstract 932, 204th Meeting Electrochem. Soc.

Ronald Carpio is senior member of the technical staff in the interconnect division of the ATDF, a wholly owned subsidiary of Sematech, 2706 Montopolis Dr., Austin, TX, 78741; e-mail [email protected].

Dave Owen is VP of technology at Oraxion Diagnostics, 3077 Skyway Ct., Fremont, CA, 94539.

Jennifer Woodring, formerly of Oraxion Diagnostics