Crucial applications addressed via fundamental ALD advances

02/01/2005

The need for ultrathin high-k dielectric DRAM capacitors used in memory applications below 100nm, and for ultrathin high-k gate-dielectric materials in transistors at the 65nm node and below, presents challenges for improving ALD productivity.

Atomic layer deposition (ALD) provides a film deposition capability like no other. Fractions of atomic layers are deposited using self-limiting chemical reactions, providing for atomically continuous layering on suitably prepared surfaces and for inherently uniform coatings on high-topology devices, such as DRAM capacitors with design rules <100nm and thicknesses ~4nm [1]. (The technology also has been applied to gap dielectrics in thin-film head sensor devices to provide high yield at storage densities of 80Gbit/sq. in. [2], where film thicknesses are typically 10nm.)

ALD processes take place in a low-pressure reactor at typical pressures in the range 0.1-1torr. A first chemical precursor is pulsed - bringing a metal specie to the substrate surface - in a first “half-reaction.” The first chemical precursor is selected so its metal reacts with a suitable underlying specie (e.g., oxygen) and the remaining ligands of the first precursor form self-termination bonding to provide a self-limiting deposition. Any excess unused metal reactants and the reaction by-products are removed by evacuation pump down or by entrainment within a flowing neutral gas [3].

Next, a second chemical precursor brings a nonmetal, such as active oxygen or nitrogen, to the surface, wherein the passivating ligands of the first half-reaction react with ligands from the second precursor, creating an exchange by-product, while the nonmetal reacts with the metal specie to form a metal oxide or metal nitride. Typically, the second reactant also forms self-termination bonds from its own ligands to provide another self-limiting and saturating second half-reaction. A second purge period is used. A four-stage cycle - expose 1, purge 1, expose 2, purge 2 - is repeated to build the desired film.

ALD processes are thermally activated and temperature-dependent. At low temperatures, chemical adsorption can dominate and the temperature coefficient is positive (thickness increases with temperature). At higher temperatures, a region of desorption can dominate and the temperature coefficient is negative, as shown in Fig 1.

Figure 1. The ALD deposition rates (Å/cycle) for Al2O3, using TMA and H2O and O3 oxidants.Click here to enlarge image

The Al2O3 films of Fig. 1 were deposited using trimethylaluminum (TMA) and water, or TMA and ozone reactions. In a typical ALD process, the average thickness/cycle is in the range of 0.1 to several angstroms/cycle, depending on the chemistries. The differen­ces are attributed to differences in the character and configurations of the self-passivating ligands.

Improving ALD rates

Improved ALD rates may be approached by enhancing processes as well as system operation. Conventional wisdom uses “overdosed” precursor conditions to achieve complete saturation of the ALD reactions [3, 4]. New higher productivity modes of ALD have been announced, however - rapid ALD (RAD) using a lean optimized reaction by ALD (LORA) and an ALD vacuum-engineered operating system using time-phased multilevel flow (TMF) - to improve performance [5].

In the LORA mode, the deposition rate (Å/cycle) is less than the maximum attainable for a given ALD chemistry, but the reduced cycle time more than makes up for the lean reaction condition, and the net result is that the film growth rate (FGR; thickness/unit time) can be increased and maximized [6]. This increased deposition rate can only be achieved with simultaneous improvement of ALD system operation including fast-switching ALD valves, efficient precursor distribution, improved vacuum-system conductance, and multilevel flow capability. The optimization occurs as a result of the maximum of the product functions of the increasing Langmuirian ALD rate (Å/cycle) and the decreasing reciprocal cycle time (cycle/unit time). So, FGR, in Å/unit time, is

where texp is the exposure time of one (e.g., slower) of the half-reactions; t is its Langmuirian time constant; to is the exposure of the other half-reaction; and tpurges is the sum of the purge times for the two half-reactions.

The above assumes one of the half-reactions is saturated in a period of time that is small compared with the optimization time (this is the case of TMA using TMA/H2O chemistry). A case study for the maximization of FGR has been developed for TMA/H2O chemistry (Fig. 2).

Figure 2. Al2O3 growth rates (Å/min) using TMA and H2O as a function of the H2O exposure time.Click here to enlarge image

The maximum or optimum occurs with a lean chemical dose and is related to the increasing ALD Langmuirian function and the decreasing reciprocal cycle time. The film deposition rate (Å/unit time) as a function of H2O exposure time of the reactants exhibits a maximum, with a magnitude ~10´ higher than conventional ALD. The cycle time is about 0.5 sec near the maximum FGR.

LORA has demonstrated near 100% conformality for deposition aspect ratios of ~40:1. The composition is substantially stoichiometric Al2O3, as determined by Rutherford backscattering spectrometry. The electrical properties show high dielectric breakdown fields >8MV/cm and low leakages. A film uniformity has been achieved at the ~1% level for 100-2000Å depositions.

Surface activation

An important factor for the quality of ALD films is the preparation of the surfaces for initiating a continuous layer growth from the outset of ALD cycling. Higher hydroloxilation concentrations (e.g., Si-OH) are desired to obtain continuous interface growth from the first ALD cycle [7]. Experimental progress has been made for determining various surface treatments for a preferred initiation state to grow continuous layers [8].

ALD system technology

Single-wafer and batch or multiwafer deposition systems are available today [3, 4, 9]. Key ALD tool subsystems include the chemical-precursor sources; a delivery manifold consisting of conduits and fast switching valves; a reactor vacuum chamber with a heated susceptor; and conduits, downstream valves, and pumps.

Precursor development is of major importance for the success of ALD. Although many precursors and chemistries have been demonstrated [3], few are actually suitable for commercial use. Liquid precursors, such as TMA, with vapor pressures in the torr region and high thermal stability, are needed. The synthesis of new chemical precursors is an ongoing activity, and the development and use [10, 11] of alkyl amides has been an important advance. Various designs of a delivery manifold consisting of conduits and fast switching valves can be used [12]. Important factors are the speed, repeatability, and reliability of fast switching valves used to pulse in the precursors. Actuation speeds of 10 msec and repeatability of 1 msec with 50 million cycle reliability are features of today’s commercially available valve components.

Precursor flow relative to the substrate has used either horizontal or vertical flow configurations; the vertical flow arrangement is arguably preferred for ease of mass transport engineering, which improves the effectiveness of the purge period and the management of parasitic CVD. Pumps with high capacity are important to achieve rapid purging.

TMF - a vacuum-engineered operating system - provides a variable residence time approach for ALD operation [5]. It uses a low residence time with relatively high flow during purge to reduce the purge time, and uses a relatively high residence time with a relatively low flow during exposure. The latter increases the efficiency of precursor use [13].

Suitably designed ALD systems [12] can be programmed to deposit one type of film and then another, such as Al2O3-HfO2 laminates, or a mixture of two or more elements, such as (Al2O3)x (HfO2)1-x, which can be made as one of the distinct layers in a nanolaminate (Fig. 3).

Higher-k oxides and semiconductor applications

On-chip applications for ALD include DRAM and eDRAM below 100nm [1, 14, 15], RF-decoupling capacitors with thicker films [16], and metal electrodes [17], leading ultimately to higher-performance MIM structures [18]. The DRAM capacitor application is driven by the need to increase capacitance density under scaling. The 2003 International Roadmap for Semiconductors [18] projects that DRAM capacitor deep trenches made circa 2010 will require much larger film surface area than is used today.

Figure 3. Nanolaminates of dielectrics using Al2O3 and fine layering of mixtures of HfO2 and Al2O3. The feature acuity indicates the excellent process control.Click here to enlarge image

Even the 90nm DRAMs being produced today have active areas 6´ that of planar surfaces. Trench architectures will require step coverage on aspect ratios approaching 100:1 at 45nm feature sizes. At this point, the active areas will be ~23´ the planar silicon area. The challenge to provide conformal films on such high-density structures can only be met if there are significant improvements and developments in chemical precursors, delivery systems, optimized processes, and ALD operating systems. Furthermore, multiwafer systems are expected to bring productivity enhancements to the ALD tool set. All this assumes that properties such as equivalent oxide thickness (EOT) and leakage are met.

RF and decoupling capacitors require thicker films and, therefore, higher deposition rates. Initially implemented on planar or low aspect-ratio structures, these capacitors will eventually require conformal coatings on higher aspect-ratio capacitors. These capacitors have different electrical requirements than DRAM capacitors; most notably, they are challenged by the requirement of an engineered, low-voltage coefficient of capacitance [19].

Advanced dielectrics and metal gates

Because SiO2 and SiON gates have reached the tunnel limit at thicknesses of 1-2nm, there has been a significant initiative to develop higher-k materials with low gate leakage. After considerable efforts on ZrO2 with polysilicon gates, the development community has turned to HfO2-poly and then to HfAlO(N) and HfSiO(N), even using metal gates for obtaining the lowest EOT. Various comparisons will be discussed as this application unfolds.

Different metal gates are being pursued for CMOS application. Initiatives in low-power applications will be followed by high-performance applications, the latter including high mobility (higher speed) as well as low leakage capabilities. Today, advanced transistor films may be made by CVD or ALD [20-22]. Ultimately, ALD may offer better layer-by-layer compositional control capability. Since the gate architecture is planar, there is no compelling reason to use ALD for this application as it is in high-topology capacitors. In the future, however, when transistor designs use vertical architectures, ALD will be required.

Metal nitrides and metals

Since the introduction of copper (Cu) and low-k dielectrics in interconnects, the scaling of ultrathin barriers has been further developed. Today, barriers on the order of 5-10nm are used in 3:1 aspect ratio structures in seven to eight interconnect layers for advanced logic. General requirements of the barriers include adhesion enhancement of Cu to the dielectrics, prevention of metallic diffusion from interconnects into the dielectrics, and prevention of the low-k dielectric elemental components diffusing into interconnects [9, 23]. ALD, or ALD-like processes and films, are being developed for barriers and Cu seeds onto which electroplated Cu may be deposited. The barriers are generally well established (such as TaN for Cu). ALD tungsten nucleation-surface activation layers are used before CVD tungsten plug films are deposited.

TiN is used for DRAM stack capacitor electrodes [14] and deep-trench upper electrodes [17]. TiN and its alloys have good thermal stability, allowing deep-trench process integration while maintaining low resistivity through 1050°C. The expectation is that ALD will continue to be required for the high-aspect topology for capacitor metal electrodes. Metal nitrides of various types are under study for use with high-k dielectric gate stacks; for example, Mo and MoN are reported to have suitable band offsets for nMOS and pMOS, respectively [24].

Conclusion

Highly productive ALD rates have been achieved using a lean optimized reaction. The cycle time is reduced compared to conventional ALD cycle time to maximize the film deposition rate. This technique has exhibited near 100% conformal films for ~40:1 aspect ratios, film uniformity, stoichiometric Al2O3 and high dielectric breakdown, and low leakage.

ALD system improvements include faster precursor delivery manifold and valve switching. Significant work has involved coordinating the flow of ALD chemistries, substrate exposures, and purges so precursor efficiency is increased and cycle time is reduced.

Emerging applications that these improvements enable include applying ALD to higher film surface-area DRAM fabrication below 100nm, step coverage on aspect ratios approaching 100:1 at 45nm features, advanced transistors and RF-decoupling capacitors with thicker dielectrics, and metal films in MIM structures.

Acknowledgments

The authors thank Ana Londergan, Xinye Liu, Sas Ramanathan, Carl Galewski, Ofer Sneh, Steve George, Roy Gordon, and Daehong Ko for their interest and insights.

References

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Tom Seidel received his MS from the U. of Notre Dame and his PhD from Stevens Institute of Technology. He is EVP and CTO at Genus Inc., 1139 Karlstad Dr., Sunnyvale, CA 94089; ph 408/747-7140 ext. 1175, fax 408/752-2009, e-mail [email protected].

Gi Youl Kim received his MS in materials science and engineering from Kangwon National U. and his PhD from Stevens Institute of Technology. He is senior process development engineer at Genus.

Anu Srivastava received his MS from the U. of Florida, Gainesville. He is a process development engineer at Genus Inc.

Zia Karim received his MS in electrical and electronic engineering from Bangladesh U. of Engineering and Technology and his PhD in electrical engineering from Dublin City U. He is director of technology and applications at Genus.