Officials hope SoC plan will push IDMs toward new foundry strategy*
11/01/2002
(Extracts from an interview with Hidetaka Fukuda, director of the IT Industry Division, Commerce and Information Policy Bureau, of Japan's Ministry of Economy, Trade, and Industry [METI], by Hiroshi Asakura, associate editor of Nikkei Microdevices, regarding Japan's Advanced SoC [system-on-chip] Platform Corp. [ASPLA] plan)
NMD: What is the goal of this project?
Fukuda: The goal is to change the business model of Japan's vertically integrated device manufacturers. ASPLA will be the prime mover. Management at Japan's major chipmakers has persisted in holding on to the same old business model.
NMD: That model was that they developed everything themselves.
Fukuda: Yes, but the differences in production technology among the major chipmakers are actually not so significant. There is no need for every company to invest so much in the same precompetitive areas. If each company invests $125 million** on the same basic technology, it adds up to more than $800 million. If we cut out this waste, we could do the same development for $400 million, and have $400 million left over that each company could invest in more important things for competitive advantage.
NMD: What is this new business model?
Fukuda: To be the master fabs for the world. It is not clear how much demand there will be for 90nm devices. Even if a company focuses on developing high-speed or low-power technology for specific niche markets, it probably will not be able to keep its advanced fabs running at full capacity. It will need to do foundry production for others.
NMD: Will it be necessary to use global standards for design and process technology?
Fukuda: The real standard setter for contract production with advanced design and process technology is not TSMC, but IBM. But no one company has leading-edge technology in everything. There is significant opportunity for Japan's IDMs to get into the silicon foundry business.
We have measurable goals — to build a 90nm pilot line, to develop CAD tools, to make a library.
NMD: What is your relationship to the other national projects?
Fukuda: The 65nm processes developed by the Asuka and Mirai projects will be put into use on the ASPLA pilot line.
ASPLA aims at 90nm production in 2004 on model pilot line*
(Excerpts from an interview with ASPLA president and CEO Keiichi Kawate by Yasuaki Nagahiro of Nikkei Microdevices)
NMD: The $260 million** national project has finally started?
Kawate: Yes, besides the government money, the ASPLA project also has capital contributions from 11 Japanese chipmakers. Fujitsu, Hitachi, Matsushita, Mitsubishi, NEC, and Toshiba will each contribute some $1.25 million, the other five companies $83 million each, for a total of $7.9 million. We started operations on July 18. Companies will kick in another round of funding in March to bring the total to $15.4 million.
NMD: What's the new company's role?
Kawate: Our goal is to revolutionize semiconductor production and create a new business strategy. The fabless/foundry model of the 1990s does not work so well anymore, but development costs are too huge for an IDM to do it all alone, as in the 1980s. ASPLA aims to standardize a basic SoC technology base on which each company can build its own competitive business. We will develop standard process technology, a cell library and IP based on that, and CAD tools, all linked together. Joint development of this basic technology will greatly reduce the burden of development costs for each company.
NMD: What is the schedule?
Kawate: First, we will establish the standard processes by March. We will complete the 90nm pilot line at NEC's Sagamihara plant and start running silicon in June to evaluate the standard IP and library. We aim to start pilot production of chips in fiscal 2004.
The line will run 500 300mm wafers/ month. Each wafer will be controlled through single-wafer processes, and will have multiple different devices using various IP and library materials, so a lot of samples can be run through the line. E-manufacturing methods will control operations. We are also developing standard IP and libraries in cooperation with STARC. We will evaluate STARC's library and IP and start using it in 2003. We aim to enter the 90nm SoC business in 2004.
Not everyone is enthusiastic
The radical and commercial nature of this latest national project has raised a firestorm of controversy in Japan. Nikkei Microdevices says its coverage of the project has provoked more reader reaction than any other topic.
While chip designers tend to see the project as a hopeful step toward revitalizing Japan's semiconductor industry, production types gripe that the project is choosing the wrong technology, or that relying on common-denominator technology at all is a classic example of Japanese management's lack of vision and unwillingness to take risk. As one letter writer noted, Selete did a great job of developing 300mm tools, but it was companies in Taiwan who came up with the business strategy to use them. — P.D.
*Translation is by contributing editor Paula Doe from the August 2002 issue of Nikkei Microdevices, our partner in Japan.
**All dollar amounts were converted from yen at ¥120/$1.