Cold-wall UHV-CVD for Si-SiGe(C) epitaxial thin films
11/01/2002
By Supika Mashiro, Hiroki Date, Satoshi Hitomi, Junro Sakai Anelva Corp., Tokyo, Japan
overview
Increasingly, SiGe BiCMOS is needed to fabricate high-performance ICs. Deposition of a suitable selective SiGe epitaxialmaterial has always been a somewhat difficult process to control.Now, through gas-flow ratio control on a cold-wall UHV-CVD system, a group of engineers has achieved SiGe deposition selectivity onsilicon vs. SiO2and Si3N4, over a wide range of film compositions.
High-frequency and low-power ICs fabricated in SiGe BiCMOS are in demand for high-speed telecommunications applications, including fiber optic systems and mobile computing devices. To support these applications, wafer processing needs reliable methods for fabricating high-quality silicon (Si) and silicon-germanium-carbon — SiGe(C) — epitaxial films.
The requisite epitaxial growth processes and pre-cleans have to be carried out within a low thermal budget without loss of film quality or productivity. In addition, the necessary epitaxial growth often has to be selective to Si vs. SiO2or Si3N4to allow use of self-aligned fabrication techniques.
Figure 1. Schematic of the Anelva I-2100/I-2300 SRE process module. |
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Single-wafer, cold-wall UHV-CVD
In our work toward these goals, we have evaluated a multichamber, single-wafer cold-wall UHV-CVD system (Fig. 1). This system has a background pressure <1 ¥ 10-6 Pa and a water-cooled stainless-steel "cold" wall process module. The process for SiGe(C) deposition uses Si2H6, GeH4, and CH3SiH3 precursors, with C12added for enhanced selectivity. The system does not use a H2carrier during or between processing.
In our tests, we cleaned wafers, with and without SiO2 or Si3N4patterns, with an SC1, dilute HF, water rinse, and dry sequence to yield hydrogen-terminated wafers that we immediately loaded into the system's vacuum loadlock. After material deposition, we used XRD analysis to determine epitaxial film quality, the percent Ge in SiGe, and the ratio of carbon atoms in substitutional sites of SiGe. In addition, we used SEM to observe silicon nucleation on SiO2or Si3N4patterns, thus verifying selectivity. Finally, we used SIMS to determine oxygen and carbon concentration in our epitaxial films.SiGe composition control
We controlled the Ge fraction x of Si1-xGex using the flow rate ratio of GeH4over Si2H6, regardless of Si2H6or GeH4flow rate and growth temperatures. Specifically, we experimented with flow rate ratios of 0.88 and 0.29 (i.e., Si2H6/GeH4) and found that the Ge fraction (i.e., 13% Ge for 0.88 and 25% for 0.29) remained constant over ~100°C growth temperature variation (in the range of 520–640°C).
We examined the deviation of the Ge fraction x of Si1-xGex across a wafer at 10%, 15%, and 20%, and found <3% (3s) of the targeted Ge fraction. We attributed this small deviation of SiGe composition to the uniform precursor flux realized by multiple reflections by the cold wall.
Figure 2. Incubation time prior to deposition on SiO2and Si3N4(at 12 sccm Si2H6and 600°C). |
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Selectivity control
In cold-wall UHV-CVD systems, polycrystalline silicon nucleation on SiO2or Si3N4does not begin with the start of precursor flow into the growth chamber [1]. The data in Fig. 2 show thicknesses of epitaxial silicon on silicon and polycrystalline silicon on SiO2and Si3N4relative to the duration of precursor flow in our UHV-CVD system. These data show that there was an incubation time during which selective epitaxial growth was achieved before growth on SiO2and Si3N4began. Specifically, for the growth condition used in Fig. 2, a silicon epitaxial film can be grown up to 50nm without polycrystalline silicon depositing on nearby SiO2.
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Incubation time can be increased by adding a small amount of C12to the precursors [2]. We were able to extend the incubation time on Si3N4to 10¥ longer than that without C12addition; the growth rate of Si epitaxial film decreased to half of that without C12addition (Fig. 3). The decrease in silicon growth rate is considered to come from chlorine's retardation effect on the incorporation of silicon atoms into epitaxial film from the precursor, not from co-existence of silicon etching reaction by C12, at temperatures <660°C.
The mechanism of selectivity enhancement by C12also enables selective epitaxial growth of silicon at lower temperatures than those reported for selective epitaxial growth using dichlorosilane [3]. We found that selective epitaxial growth of SiGe(C) can also be achieved using the same technique, coming up with a production-durable growth rate of both silicon and SiGe(C) at <650°C.
Figure 3. Incubation time enhancement effect of C12 |
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SiGe(C) crystalline quality
Unlike higher-pressure CVD systems, our cold-wall UHV-CVD system yielded very low levels of oxygen incorporation into SiGe epitaxial films at low temperatures (see table). In addition, we noted that the crystalline defect density of selectively grown films did not increase compared to blanket films grown at the same process temperature. We ascribed the lower number of defects to our system's low process pressure and the absence of hydrogen; under such conditions, Si and Ge atoms can migrate easily during film growth.
By decreasing growth temperature, the Ge fraction of a SiGe epitaxial film can be increased to 35% without relaxation of the lattice strain. Figure 4 shows an XRD profile of a sample with an 80nm-thick Si0.657Ge0.343 layer. With this particular SiGe layer, we confirmed — using XRD and SIMS — the feasibility of incorporating carbon into substitutional sites by up to 1.8%.
Figure 4. XRD profile of an 80nm-thick Si 0.657Ge0.343 layer. |
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Conclusion
In the end, we found that we could precisely control Si or SiGe selectivity over a wide range of film compositions by changing only gas flow-rate ratios in our single wafer, cold-wall UHV-CVD system. We achieved selective epitaxial growth of 150nm-thick Si on a wafer with SiO2and Si3N4and a growth rate >15nm/min at 650°C. Further, the epitaxial films grown within 520–640°C had very low oxygen levels and defect densities.
References
1.K. Aketagawa, et al., Jpn. J. Appl. Phys., Vol. 31, pp. 1432–1435.
2.T. Tatsumi, et al., J. of Crystal Growth, Vol. 120, pp. 275–278.
3.K.L. Knutson, et al., J. of Crystal Growth, Vol. 140, pp. 191–194.
Supika Mashiro received her BS from Yamagata University. She is a manager of the Semiconductor Technology Div. at Anelva Corp., 5-8-1, Yotsuya, Fuchu-shi, Tokyo 183-8508, Japan; ph 81/42-334-0242, fax 81/42-367-6465, [email protected].
Hiroki Date holds a BS and is a process development engineer at Anelva Corp.
Satoshi Hitomi received his PhD in physics at Okayama Univ. of Science. He is a product engineer at Anelva Corp.
Junro Sakai received his BS from Tokyo Univ. of Science. He is general manager of the Semiconductor Technology Div. at Anelva Corp.