SPIE Report, Part 2: Progress in chromeless phase litho, NGLs, 157nm reported at Microlith Symposium
06/01/2002
by M. David Levenson, Bob Haavind, SST staff
Challenges presented by low-k1 lithography were explored at the recent Microlithography Symposium in a session chaired by Tony Yen of Sematech. Chip design innovations such as model-based optical proximity correction (OPC) are becoming useful especially when corrected by rules for avoiding resist failure, according to Yuping Cui of IBM. Kevin Lucas of Motorola reported on a similar program using rules to override anomalous model predictions that allowed 14 metal layers to be moved from 193nm to 248nm using reticle enhancement technologies (RET), thus reducing 100nm-node costs by 20%.
A series of papers probing a new RET called chromeless phase lithography (CPL) was presented by Doug Van Den Broeke, Fung Chen and other authors from ASML MaskTools and Petersen Advanced Lithography. Single exposures without pitch restrictions are the appeal if these techniques can be implemented successfully. Dark lines in CPL are printed by pairs of phase edges with 100% transmitting material between them. Unlike in the 10-year old shifter-shutter method, the illumination is also customized for high-NA exposure. The scheme is capable of quarter wavelength imaging, but with complex proximity effects that have to be sorted out with MaskTool's LithoCruiser software. In particular, narrow image lines and assist features must be fabricated in the mask as rows of phase islands, and large dark areas become a sea of phase dots.
CPL allows patterning of fine gate features without trim masks and avoids "forbidden pitches," but has its own anomalies, reported Robert Socha of MaskTools. The experimental process windows of random features do not overlap well at present, but those of the repetitive patterns characteristic of DRAMs do. Optimizing the mask, projection lens, and illumination as one integrated system is expected to overcome these difficulties, according to consultant John Petersen.
Multiple exposure techniques using alternating-phase shifting masks (with trim masks) and dipole illumination [with cheaper chrome-on-glass (COG) masks] were also in evidence. Christophe Pierrat of Numerical Technologies described a scheme to avoid phase conflicts and allow the patterning of an entire logic poly layer at a density previously possible only for regular arrays. Unwanted lines would appear only on noncritical areas where trim masks could erase them easily (Fig. 1). Zhijian Lu of Infineon described how the trim mask could increase the CD variations in a dual-exposure system even though the gate edges were well within the dark untrimmed regions. Shifts on 125nm DRAM patterns increased from 15 to 35nm, with special challenges for relatively isolated gates in the readout circuitry.
A rule-based decomposition scheme that can separate "Manhattan" geometries into two chrome-on-glass (COG) mask designs, each printing lines of one orientation with dipole illumination, was described by Stephen Hsu and a team from ASML. The "rules" include six key parameters to place scatter-bars and opaque shields, with model-based OPC necessary for final tuning.
J.A. Torres and co-authors from Mentor Graphics explained how model-based OPC could even facilitate patterning of diagonal lines using dipole illumination. S. Makakli, STMicroelectronics, reported an extension of Nakao's COG dark-field plus trim mask technique that can print 80nm lines through pitch with MEEF<2 using 193nm exposure.
Progress in 157nm exposure tools
Exposure tool and laser light source developers reported continued progress, especially on 157nm lithography. Toshifumi Suganaga of Selete in Japan described initial experiments with a 0.85NA 157nm mini-stepper made by Excitech Ltd. of the UK. While 55nm line-space patterns could be printed using an alternating-PSM, measured trefoil and other aberrations at 157nm were 0.2λ. This was much larger than predicted by phase interferometry at 244nm, probably due to uncompensated intrinsic birefringence in the CaF2 lenses.
Naomasa Shiraishi of Nikon described progress in developing a full-scale 0.85NA catadioptric scanner lens capable of imaging with >0.25μm depth of focus (DOF) with F2 lasers of 1.0pm bandwidth. According to Shiraishi, the key is to clock out the trefoil birefringence using pairs of (111) oriented CaF2 elements and then remove the radial birefringence by incorporating clocked-pairs of (100) oriented elements that are precisely 2/3 the thickness of the (111) material.
Such a scheme can increase the Strehl ratio to 0.98, sufficient for strong RET. Hideki Nogawa of Canon reported a similar scheme, but envisioned a 5:1 reduction ratio.
Initial reports indicated reduced intrinsic birefringence of CaF2 at 193nm and the relatively small number of projection lens elements made of that material in ArF tools would not impact imaging. Nikon and Canon reported, however, that clocking CaF2 elements improved performance. Tomoyki Matsuyama reported 90nm line-space imaging with the Nikon S306-C, featuring a "downsized" lens with fewer elements than previous designs.
Rian Rubingh described how the dual stage leveling system of the ASML AT1100B 193 tool extends DOF and reduces CD variability. Ultraflat wafers and wafers with 300nm high checkerboard topography were printed in a qualification test, both with 10.2nm uniformity. When the $12M scanner was adjusted to compensate for the nonuniformities of the $12k PEB hotplate, the error dropped to 6.2nm, with no signature of the checkerboard pattern. The leveling system, which measures one wafer while another is being printed, facilitated a 350nm common DOF for 100nm features.
The most exciting new exposure source was a 2kHz, 0.2pm ultra-line narrowed 157nm laser developed by ASET for all-CaF2 dioptric projection lenses. By injecting the tail end of a master oscillator pulse into an unstable resonator power oscillator, they were able to meet the linewidth spec over a 20x5mm main beam.
Cymer's master oscillator power amplifier architecture for future high power KrF and ArF lasers was revealed by Rick Sanstrom. By increasing the power per pulse while decreasing the load on the line-narrowing optics, this new design allows 80W average narrowband power without a 35HP fan motor. Again, synchronizing the oscillator and amplifier pulse is key, but with 30nsec precision, the broadband emission is suppressed to <1%.
Basic optical considerations, such as image flare, continue to control image contrast in production lithography. Dongseok Nam of Samsung observed consistent flare measurements oscillating spatially between 4 and 5.5% of flood exposure along the lens slit, but reported a reduction to a flat 1.2% profile after lens cleaning. Bruno La Fontaine of AMD reported improvements in contrast in more recent projection lenses and an IBM group emphasized the importance of low flare for RET and gate trimming schemes.
Emerging lithography progress updated
An update on major NGL programs was presented, including EUV, projection electron beam system progress, and even nanoprinting. Light scattering and flare in EUV lithography was addressed by Christof Krautschik of ASET in the context of the US engineering test stand optics. Due to the short wavelength, roughness on individual surfaces is 200x more effective in scattering EUV than DUV light. EUV tools have many fewer surfaces, but the scattered light level of projection optics box #1 (POB1) was 50% of the flood exposure level. Eighty percent of that scattering landed on the wafer within 1mm of the open region's edge, with 100% within 13mm. POB2 showed better performance, with 20% intrinsic flare and future optical sets were expected to reduce the unwanted exposure to 6%, allowing 8:1 contrast.
Since the density of bright areas on actual masks is expected to vary only by 30% or so over 1mm square areas, proponents of EUV lithography believe that flare variations will consume only 2% exposure latitude, acceptable in large-k1 patterning with good margins. The edge of the field is another matter, and even strong proponents expect that critical features will have to be excluded from the outermost 0.1mm of the die. Controlling flare variations may also require adding dummy features to critical design layers or using OPC to correct for expected CD shifts. Krautschik also predicted that accounting for 3-D EMF phenomena at the mask would have the same effect on flare as on the desired image.
EXTATIC, the European alpha-tool concept, was reviewed by Hans Meiling of ASML, who presented the first EUV resist images printed in Europe: stars with 100, 70, and 50nm lines and spaces. Developers envision a five-chamber vacuum system with extreme steps taken to avoid particle production and transmission due to handling.
Source options remain open, but Uwe Stamm of XTREME Technologies GmbH (Germany) described the challenges of collecting 50W of useful EUV. Because of inefficiencies, to get total production of 1kW of EUV light will take an electrical input of >100kW. Both light production and thermal management of such an industrial scale system pose challenges. A 50 exposure tool EUV fab would consume >5 MW of power, just for the light sources!
While electron projection lithography has been eclipsed for general purposes by EUV, Nikon and IBM continue to develop the PREVAIL system specifically for contact holes. Takaharu Miura of Nikon described the integration of the first two prototype systems, including vacuum chambers, pumps, sensors, magnetically driven air-bearing stages, and robotic handlers for reticle and wafer. Michael Gordon of IBM described the imaging performance of the electron-optics test stand, which has blur <30nm and has shown 80nm resolution at the center and 4 corners of the field.
Nanoimprint lithography has attracted interest outside the academic community, if only because decent results can be obtained after a few months' effort. Doug Resnick of Motorola described printing 30nm features using the step and flash system pioneered by Grant Willson's group at U. of Texas. The needed tools might cost only a few million dollars, Resnick said. Fabrication, inspection, and repair of precision 1x templates remains a problem, however.
Figure 2. Part of the step-and-flash technique under development by Agere Systems. (Source: White et al., SPIE Proc., Vol. 4688, 2002.) |
A complete system for step-and-flash nanoimprint litho in the sub-50nm realm was described by Don White of Agere Systems and a group from the U. of Wisconsin, among others. The gap between a patterned fused-silica mold and a silicon wafer is filled with a low viscosity photopolymer. UV flood illumination through the mold hardens the polymer (Fig. 2). Then, the mold is removed and the pattern transferred to the wafer by RIE. Accurate overlay is vital, and a technique using piezoelectric actuators to deform both the mold and the wafer pattern to get precise overlay is being developed, along with a method for easily inspecting and repairing the mold.