A status report on technology for carbon nanotube devices
04/01/2002
by Franz Kreupl, Andrew Graham, Wolfgang Hönlein, Infineon Technologies, Munich, Germany
Overview
New materials and integration methods must be found for sub-10nm feature sizes on semiconductor devices. Carbon nanotubes have been widely proclaimed as part of a solution because of their extraordinary electrical and mechanical properties. Recent developments in carbon nanotube technology hold promise for some preliminary fabrication methods to realize the first level of nanotube-based microelectronics.
 Figure 1. A SWcNT made from hexagonally ordered carbon atoms. |
Carbon nanotubes (CNTs) have been proposed as an alternative to conventional silicon-based microelectronics when the latter's feature sizes reach ~10nm [1-3]. CNTs are made of rolled up graphite sheets with typical diameters of 1-20nm (Fig. 1). Because of graphite's unique bonding configuration, carbon atoms form a strong, flat hexagonal film with a layer of nearly free electrons above and below. These electrons are able to move parallel to the layer in discrete states. The graphite layer can be twisted as it is rolled to make the CNT, so edges join at different points. Changing the twist ("chirality") of the tube alters the way in which free electrons can move; they are either completely free to travel, and the nanotube behaves like a metal, or they must overcome a barrier like a semiconductor. Barrier size depends on tube diameter and can be as high as 1eV for the smallest tube diameter [4].
CNTs can be made with few structural defects. This, combined with the high carbon-carbon bond strength, leads to tubes that can withstand temperatures up to 2800°C in vacuum and up to 700°C in air and have tensile strengths much higher than high-strength steel alloys [1]. Also, CNTs have measured thermal conductivities of 3000W/km [5] and theoretical values in excess of 6600W/km [6].
The structural quality and the unique electrical properties of graphite mean that CNTs are ballistic conductors, and electrons move without resistance. A perfect metallic nanotube is the best normal electron conductor an engineer can imagine, only surpassed by superconductors. The only resistance to contend with is contact resistance, between contact material and electronic states in the nanotube, at low voltages.
Multiwalled CNTs (MWcNTs, Fig. 2) consist of several concentrically nested single-walled CNTs (SWcNTs). Additional parallel conducting shells enhance conductivity.
Fabricating CNTs
CNTs can be fabricated via laser-ablation, arc-discharge, or chemical vapor deposition (CVD) [1]: The first two methods use a heated carbon target containing trace catalyst metals and a powerful laser or arc-discharge in a controlled atmosphere. Evaporated carbon forms nanotubes in the gas-phase that collect on the reaction chamber walls or on the opposite electrode. CVD methods begin with supported catalyst particles that are exposed to a carbon feedstock gas. Carbon atoms from the dissociation of these molecules at the catalyst surface dissolve in the catalyst particles to reappear on the surface, where they can organize to form nanotubes. Depending on growth conditions (e.g., gas mixture, use of plasma enhancement, and catalyst type), the catalyst particle either remains on the surface ("base growth") or is lifted from the surface by the nanotube ("tip growth").
The high temperatures (typically >2000°C) during arc discharge or laser ablation produce CNTs of very high structural quality. Since they are produced in the gas phase, however, they cannot be selectively grown on substrates, but are subsequently dispersed in a solvent and randomly distributed on a substrate. Connection to suitable electrode structures is a matter of luck.
CVD nanotubes can be selectively grown by structuring the catalyst in a predefined arrangement. This is the most promising method for fabricating a generation of large-scale nanotube-based circuits. In our CVD method [7], we deposit a catalyst layer on a substrate and heat it in a furnace to 500-800°C in a hydrogen atmosphere, reducing the film to small metal clusters of 10-30nm dia. Then, we grow nanotubes by flowing acetylene and hydrogen (3:1) over the catalyst particles at 10 torr. We achieve typical growth rates of 50μm/min at a 700°C on 5nm-thick iron-based catalyst film.
A wide range of physical vapor deposited catalysts and spin-on metal compound catalysts have been reported for CNT growth, including nickel, iron, cobalt, molybdenum, and ruthenium. We have found that iron and most of its compounds are very effective catalysts for nanotube growth without plasma enhancement using acetylene: other metal compounds display little or no nanotube growth under the same conditions. However, nanotubes can also be grown on nickel and cobalt catalyst particles in a microwave generated plasma [7].
The initial catalyst-film thickness required to produce correctly sized clusters depends strongly on the substrate, catalyst type, and growth temperature. We have investigated many different substrate materials (e.g., silicon oxide and nitride, titanium, tantalum, tantalum nitride) that all support nanotube growth from a 5nm-thick, iron-based film at 700°C. The nanotubes in Fig. 2 were grown from a 5nm-thick, iron-based film on a silicon oxide substrate. (Note that the nanotubes are ordered roughly perpendicular to the surface.)
Noble metal substrates such as gold appear to suppress growth, probably by alloy formation with the catalyst material. Refractory metals and their nitrides have the additional advantage of acting as diffusion barriers separating the potentially destructive catalyst material from sensitive components.
Laser-ablation and arc-discharge methods produce both single-walled and multiwalled nanotubes. Under low-temperature growth conditions, CVD methods generate mostly multiwalled nanotubes. It is also possible to introduce metals and compounds into the hollow core of nanotubes to create nanowires [8]. Because CNTs can be grown on both insulating and metallic materials, there is a wide range of interconnect and device possibilities.
Microelectronics applications
Due to the extraordinary range of properties exhibited by CNTs, many applications have been proposed:
- The high current carrying capacity, huge thermal conductivity, length independent resistance [1], and mechanical stability of metallic nanotubes suggests applications for microelectronic interconnects;
- The reasonably large band gap of narrow single-walled nanotubes suggests nanoscale transistors and diodes; and
- The small radius of curvature at the tips of nanotubes suggests low-voltage field emission devices for flat-panel displays [9].
In fact, carbon nanotube based field-emission displays (FEDs) are expected by 2003.
Nanotube conductors
The 2001 International Technology Roadmap for Semiconductors (ITRS) predicts an interconnect current density of 3.3 ¥ 106A/cm2 by 2013. So far, this can only be supported by CNTs for which some researchers have reported measured current densities of 109A/cm2 [1].
At this ITRS technology node, an MPU-ASIC half-pitch of 32nm is predicted. On this scale, traditional interconnect schemes become problematic because of increased wire resistances resulting from grain and surface scattering effects [10] and the higher current densities. This resistance increase in standard metallization schemes, coupled with higher wire capacitance due to higher aspect ratio wiring and higher density, is expected to lead to significant interconnect RC delays, restricting the frequency performance of end-of-roadmap ICs.
Adequate heat removal from ICs is already a problem in present day computers. The thermal conductivity of nanotubes exceeds that of diamond by a factor of two and copper by a factor of 15.
The length-independent resistance is a result of the huge ballistic free mean path of electrons in CNTs, allowing the electrons to move freely for several microns without being scattered. The thinnest nanotubes (i.e., 0.4nm dia.) are strictly one-dimensional conductors supporting two conducting channels, resulting in a length-independent resistance of about 6.25kΩ. They have also been reported to be superconducting up to 20K [11].
The energy states of metallic nanotubes with diameters D are separated by 1.226/D (eV/nm) [12]. A SWcNT with a diameter of ~30nm, comparable to the 2013 technology node, has more than 24 sub-bands that can be occupied, leading to a resistance of about 500Ω. Thus, a MWcNT comprising 10 individual layers could have a length-independent resistance of 50Ω if all layers can be contacted equally well.
Doping nanotubes will further enhance conductivity and will lead to interconnects with low resistance and high current-carrying capacity. Thanks to their structural robustness, CNTs will not suffer from electromigration or diffusion into dielectric substrates, eliminating the need for diffusion barriers in copper dual-damascene processing. The key challenge is to integrate them into existing process flows.
An obvious application for vertically aligned nanotubes is to use them as conductors in vias and contact holes (i.e., as vertical contacts between active devices and IC metallization levels). High-aspect-ratio vias and contact holes can be filled using a simple CVD process with vertically ordered nanotubes. Depending on the diameter of the hole or via, this could correspond to a single nanotube or a bundle of nanotubes. The only critical task is to place a controlled quantity of an appropriate catalyst at the bottom of the via prior to growth. This method avoids conventional problems associated with via filling, including diffusion barrier uniformity and pinching-off at the top of the via during metal deposition.
The growth of nanotubes on metal surfaces is demanding and requires that the support metal and catalyst are adapted to each other. For example, we have grown a bundle of 15-20nm dia. MWcNTs in a via from a bottom electrode of tantalum and a 5nm-thick, iron-based catalyst suitable for nanotube growth at 700°C (Fig. 3). Measurements (after depositing a contact on the nanotube bundle) indicate an ohmic conduction behavior and resistance of 1-2Ω for a 150μm2, 5μm-high bundle. The actual density of nanotubes was ~70/μm2 because they covered only 2% of the via base.
In these first results, we questioned whether all 10 shells of the MWcNT contributed to the conductivity; our top contact did not optimize contact resistance. An improvement in resistance is expected after a rapid thermal annealing step, after the deposition of the top contacts [13]. We estimate that the related resistance leads to an average resistance/nanotube of ~10kΩ, which is close to the theoretical 6.25kΩ for one conducting shell.
This work demonstrates the basic functionality of a large CNT via. Nanotube density and contact resistance has to be improved. Template growth of CNTs in holes smaller than 50nm dia. have shown that, for such narrow holes, the nanotube diameters adjust to fit the whole diameter [14]. Thus, as the diameter of the vias is reduced, the filling factor of such narrow holes will tend to 100%.
Vertically directed growth in a template occurs naturally for nanotubes; lateral growth does not. Tricks can steer nanotube growth in a desired direction, however. A lateral template similar to that of a via can direct nanotube growth. It has also been shown that the gas flow direction during CVD can induce lateral growth. Nanotube growth responds to DC or AC electrical fields [15], but this approach is certainly not suitable for large-scale integration.
Devices and circuits
If CNTs can be selectively grown at a desired location with prescribed properties, active devices similar to silicon-based microelectronics are possible. Indeed, a group at Delft University in The Netherlands has succeeded in modulating the conductivity of a semiconducting carbon nanotube by six orders of magnitude [16]. The basic field-effect device was a nanotube deposited between metallic source and drain contacts on an oxide-covered silicon wafer (Fig. 4). The doped silicon substrate acted as the back-gate electrode in this CNT-FET device.
 Figure 4. A CNT-FET from Delft University. |
In their work, the Delft University researchers could only achieve a gain <1 because a thick gate oxide dictated a high gate voltage. More recently the same group demonstrated an isolated back gate arrangement made from an aluminum strip with a thin native aluminum oxide layer as the gate oxide, delivering a gain >10 [17].
The operation of this isolated device also facilitated the formation of basic circuits, constructed by coupling several CNT-FETs with external resistors. They demonstrate the functionality of inverters and NOR gates and the operation of a three-stage ring-oscillator. The basic devices were p-type nanotubes with current flowing in one static state.
Complementary doped sections of nanotubes have been successfully realized by a group at IBM [18]. Doping was achieved by covering one section of a p-type tube with a resist while exposing the other to potassium vapor. Using a common back-gate, the resulting CMOS inverter showed no current flow in both static states. The same group also demonstrated that a single CNT-FET can be operated in an ambipolar fashion by simply applying positive (n-type action) or negative gate (p-type action) voltages. Further, they showed that the performance of CNT-FETs exceed that of comparable CMOS transistors [19].
Today's conclusions
Since the discovery of CNTs more than 10 years ago, we have seen the basic function of nanotube-based devices and interconnects demonstrated. However, the development of a fabrication method that uses CNTs as building blocks instead of silicon transistors is still far away. Most of the applications cited here rely on arduous contacting of randomly distributed nanotubes deposited from suspensions and, sometimes, time-consuming micro-manipulations by atomic force microscopes. Parallel processing, which is the cornerstone of silicon technology, has not yet been achieved.
CVD deposition of CNTs, exploiting the use of a pre-patterned catalyst, is the first step toward demonstrating the feasibility of parallel growth, even in narrow holes with huge aspect ratios [14]. To date, however, it has not been shown that this principle can also be used to grow laterally oriented CNTs in a controlled manner. In addition, other problems must be solved: for example, contacting CNTs with metals to yield reproducible low ohmic-contact resistances. The formation of undesirable, atomically thin oxide and organic layers between nanotubes and contact metal often results in tunneling characteristics with high resistances and non-ohmic behavior. Recently, a step forward was announced by the IBM group, which proposed carbide formation to improve contact resistance and stability [20].
Interestingly, we can also envision bringing biological methods into play. Carbon-based molecules can be modified to a great extent and so can nanotubes. Work has shown that functionalization — attaching chemically reactive organic groups to nanotubes — is possible [21]. By controlling reactions between these groups, it may be feasible to attach a particular nanotube to a predefined location on a substrate or to glue certain tubes together and thus combine prefabricated carbon nanotube building blocks "in vitro."
DNA coding may also be used to facilitate intelligent self-assembling. We envision a new technology not restricted to the two-dimensional surface of a single crystal silicon wafer. Instead, truly three-dimensional arrangements with active devices as well as interconnects made out of nanotubes are feasible. Packing density and thermal conduction of such a network could be higher than in conventionally scaled microelectronics by orders of magnitude.
Today, CNTs are driving scientific research, and the perspectives for applications are very challenging and exciting. When we consider the rapid development in this field of research in the last 10 years, it seems clear that the current technological problems will be quickly overcome. We expect that CNT-based devices will compete very strongly with conventional silicon circuits on the nanometer scale.
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Franz Kreupl received his masters and PhD degrees in physics from the University of Regensburg, Germany. He is a staff scientist at Infineon Technologies, Corporate Research, Otto-Hahn-Ring 6, D-81730 Munich, Germany; ph 49/892-344-4618, fax 49/892-347-18237, e-mail [email protected].
Andrew Graham received his BSc in physics from Durham University, UK, and his PhD in physics from Cambridge University, UK. He is a staff scientist at Infineon Technologies, Corporate Research.
Wolfgang Hönlein received his masters diploma and PhD in physics from the University of Würzburg, Germany. He is senior director at Infineon Technologies, Corporate Research.