For process development and yield NEC uses in-line tool monitoring*
03/01/2002
To monitor the performance of our production tools to improve yield, we've developed a method to measure the particles within the chamber. We've also worked out a way to check the etching process by in-line scanning of each wafer with an e-beam scope.
Particles from the plasma-etching tool chamber are one main cause of reduced yields. Previously, we used various off-line tools to inspect the wafers for particles and surface roughness, then had to figure out the cause and fix it. But running costly dummy 300mm test wafers to check the process is slow and expensive. Small 0.1μm particles are hard to remove, and the defects they cause may not show up until further along in the production process. So we developed an in situ particle reader to check for particles from the etching chamber and precursors that affect the CVD film.
This metrology system is shown in the figure. Two sheets of high-frequency laser light are pulsed through the chamber, and a CCD camera records the light scattered by the particles. One image records a strobe-like picture of 1000-3000 laser pulses. With laser pulses 70 nsec apart, the CCD can measure metal particles down to 60-70nm. When background light is eliminated, it can measure down to 15nm.
 NEC's particle checker measures the scattering of laser light with a CCD camera to check for particles within the etching chamber. Source: NEC Electron Devices |
Besides using the particle reader to monitor production and prevent particle defects, we used what we learned from the readouts about particle behavior to improve the etching chamber to prevent defects. We added a pair of bias electrodes (placed on the diagonal to the anode and cathode) that enabled us to do particle-free processing. Applying a voltage of -100V completely eliminated particles on the wafer without any effect on the etching.
We've also developed a way to monitor the performance of etching equipment by checking the shape of the contact and via holes. The usual scanning electron microscope can only see the surface, and can't see variation down within the holes, where variability in the etching process is most likely to show up. Focused ion-beam tools can measure 3-D features, but with high-aspect 0.1μm holes, they're too slow and expensive for production use. Electrical tests usually can't be done until the whole wafer is finished. We've developed a technology to do fast, precise, in-line testing of the etch process margin with an e-beam scope.
Instead of measuring the relatively low-energy secondary electrons like a CD-SEM, the e-beam scope measures the current produced by the e-beam hitting the substrate directly. Since it doesn't have to measure the secondary electrons from the bottom of the hole, it can measure high-aspect holes without any problem.
The current from the wafer varies directly with the thickness of the oxide layer. The ratio of secondary electrons emitted by silicon is ~1, while that of the oxide film is >2. Since the secondary electrons have energy of <10eV, only those from a depth of ≤10nm can reach the surface. Thus, the ratio of silicon and oxide film up to 10nm from the surface determines the emission rate of secondary electrons from the material that makes the oxide layer. Therefore, the substrate current acts as a sensor for the oxide thickness.
The current from the bottom of the hole is directly proportional to the area at the bottom of the hole. The e-beam scope can measure both the bottom diameter of the hole and the oxide film left there, which is needed to monitor the effectiveness of the etching process with high-aspect holes.
The e-beam scope makes a map of the etched wafer, indicating where the current and the holes are as they were designed; where the current is lower and the holes too small; as well as where the current is greater and the holes too big. Deviations indicated by the scope map corresponded with defects found by probe test on the finished wafer. Results can be used to select the best equipment, to adjust the etching process during production, and to speed up development time for new processes. — F. Uesugi,
N. Ito, T. Moriya, K. Yamada, et al., NEC Electron Devices, Metrology Technology Development Group, Tokyo, Japan
*This article was translated by Paula Doe for Solid State Technology from the May 2001 issue of Nikkei Microdevices, our partner in Japan.