An innovative approach to wafer-level MEMS packaging
01/01/2002
Doron Teomim, Avner Badihi, Gil Zilber, Shellcase Ltd., Jerusalem, Israel
overview
A new wafer-level chip-scale package provides an integrated cavity above the active area of a MEMS device. This package was designed for devices with mechanically moving components such as micromirrors, miniature gyroscopes, and acceleration detectors.
The microelectronics industry is seeing a growing challenge in packaging microelectromechanical systems (MEMS). While MEMS share many of the features of conventional ICs, they also present a host of differences. For example, since the whole point of MEMS is to use micro-moving parts, the package must have feedthroughs from these structures to the outside, while protecting but not impeding movement.
 Figure 1. A wafer-level chip-scale package (insert shows spacer rim). |
Clearly, the packaging of MEMS needs to improve considerably from its current immature state. At present, nearly all MEMS development efforts must design a specialized package for each new device. Consequently, most companies find that packaging is the single most expensive and time-consuming task in a MEMS product development program. Available packages are often bulky and expensive, limiting MEMS applications.
To address these challenges, we have designed a wafer-level chip-scale package (WLCSP) with an integrated air cavity above mounted MEMS chips (Fig. 1). This die-size CSP is manufactured with thin-film wafer fabrication processes, allowing a substantial reduction in manufacturing costs at commercial manufacturing volumes. Briefly described, a spacer rim covered with a glass plate is used to form the CSP cavity; the spacer can include nested rims to enhance the mechanical stability of the package.
The WLCSP process
The first manufacturing step of the WLCSP process, which encapsulates die into separate cavities and forms electrical leads before singulation, uses lithography to produce an array of rims in a layer of photosensitive resin on a glass plate. Then, we apply epoxy to the upper edge of the rims before aligning and attaching the rim-holding plate to a silicon wafer with completed MEMS. UV exposure or heat cures the epoxy.
 Figure 2. Key WLCSP features and process steps. |
These steps result in a set of cavities on top of a completed wafer of MEMS die — one cavity over each die. The silicon wafer is then thinned — if necessary — using a grinding process, and space between each die is etched from the backside of the silicon wafer, exposing bonding pads that surround the MEMS (Fig. 2a).
The etched grooves between die are filled with an inert material, and a second thin glass cover is bonded onto the backside of the wafer. The result is a complete protective enclosure for each die. Again from the backside, dicing creates deep notches between die, revealing cross-sections of metal conductors protruding from each die, which were created as part of the die fabrication process (Fig. 2b).
We use lithography again to pattern a metal layer forming leads from bonding pads. Solder leads are formed on the upper surface of the package, and contacts are plated with nickel. Subsequent processing steps include a solder mask and application of a humidity-seal. Bumps to enable subsequent surface-mount board assembly are screen-printed and reflowed while packaged MEMS are still in wafer form (Fig. 2c). One more dicing step singulates the MEMS.
Unlike chipmakers, MEMS manufacturers face challenging contamination problems at the backend of the process. ICs are less sensitive to the environment once the cleanroom process is done, but MEMS are very sensitive to particle contamination from dicing and other assembly steps.
 Figure 3. The results of a two-cavities WLCSP process. |
To address this concern, MEMS packaging has required special processing not typically available in a conventional IC fab, including dry dicing, supercritical release from dicing tape, noncontact handling of MEMS, and hermetic sealing of MEMS cavities. Our new WLCSP process, however, seals MEMS being packaged at an early stage in the process, virtually eliminating contamination sensitivity issues (e.g., we can use conventional dicing for singulation).
Two-cavities package
Using a similar process, we can produce a two-cavities package, one over the device's active area and one beneath moving components. The second cavity is often needed to accommodate free motion of micromirrors, etc. This cavity can even be fabricated to contain a low pressure to provide for undamped motion of moving components at high frequencies. Details of the two-cavities package process are beyond this article's scope, but the cross-section is shown in Fig. 3.
Package features
We have found that WLCSP provides specific advantages relative to conventional MEMS packaging, including:
- true die-size packages,
- extremely low thickness (down to 700µm, depending on MEMS device thickness),
- excellent mechanical accuracies (±25µm),
- self-alignment for solder reflow,
- an optical window for communications to the outside world,
- low cost, particularly for small die (e.g., 3 x 3mm die on a 150mm wafer could be ~$0.20/die, or lower for larger volumes or smaller die),
- a controllable internal environment or vacuum via hermetic sealing, and
- input-output connections from die edges.
Cost is particularly important. The great diversity of MEMS device and packaging requirements has prevented the introduction of low-cost, standard solutions. Since the cost of the package is a sizable part of the total cost of MEMS, it has impeded widespread application. Moreover, the price-reduction difficulty is a result of low yields and the lack of batch processing for such products.
Overall, wafer-level packaging technology tends to reduce MEMS packaging costs both by the standardization of a packaging technology and product outline, as well as by the efficiency of the wafer-level processing.
Conclusion
Packaging issues for MEMS devices are currently a major problem. The available packages are often bulky and expensive, limiting application. This could be changed by the application of wafer-level packaging technology to MEMS. We have developed one such approach, dubbed WLCSP, which provides an integrated air cavity for MEMS over active areas of the sensor. The manufacturing process is done in wafer form, extending IC manufacturing processes down into packaging. This allows substantially reduced manufacturing costs at commercial manufacturing volumes and a reduction of physical dimensions of packaged MEMS.
Doron Teomim received his PhD from Hebrew University of Jerusalem. He is an R&D engineer at ShellCase Ltd.
Avner Badihi received his MSc from Hebrew University of Jerusalem. He is the founder of ShellCase Ltd.
Gil Zilber received his PhD from Hebrew University of Jerusalem. He is director of R&D at Shellcase Ltd., Manhat Technology Park, P.O. Box 48328, Jerusalem 96251, Israel; [email protected].