Issue



The case for nonporous low-k dielectrics


12/01/2003







Porous dielectric films made by both spin-on and CVD processes have long been promoted as the solution for the industry's needs for ultralow-k (ULK) performance given the lack of viable alternatives. Only recently has the industry started to realize that porosity-based approaches are failing the harsh test of IC integration.

Successful integration was recently reported at the 90nm node employing a k = 3.0 film with <20% pore volume along with CVD tetraethylorthosilicate (TEOS) [1]. Clearly, the closer a low-k dielectric film's structural and mechanical properties can be made to TEOS, the more likely it is to achieve the required integration performance [1].

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The sub-90nm generations of IC manufacturing require effective k values substantially <3.0. The need for higher k etch stops and barriers has led to the development of both CVD and spin-on ULK films with bulk k values in the 2.0–2.5 range. To attain bulk k values <2.6 in these films, the approaches so far have been based on introducing significant void volume using porogen processes. As much as 40–50% porosity may be introduced to achieve k values around 2.2, usually at the expense of significantly sacrificing the material's mechanical properties (see table).


Figure 1. Conventional porous dielectric materials require relatively large pore volumes to achieve k values <2.5, whereas newer dielectric materials can achieve ULK values (k<2.5) while exhibiting dense film properties.
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Figure 1 shows the porosity regime for current low-k and ULK dielectrics. For k values in the 2.8–3.2 regime, the pore volumes are typically <10%, effectively producing a dense film. From k = 2.5–2.8, the pore volume increases to 20–30%, reaching into the percolation threshold where films start to become mesoporous and some of the pores are interconnected. Below k = 2.5, the films are mesoporous with 30–50% pore volume and total pore interconnectivity. Siloxane-based materials can have closed cells and be microporous at an upper limit of 30% porosity [2].

A number of integration issues have been reported for such mesoporous materials. Highly porous films have high etch rates and are prone to sidewall damage during via and trench etches. Furthermore, siloxane-based mesoporous films are prone to carbon depletion during etch, making a timed etch process impractical. Dense siloxanes have lower etch rates and are less prone to carbon depletion.

Mesoporous dielectric films also suffer from stress voiding after metal CMP. This usually occurs in features <150nm and is associated with damage to the via during etch. Stress voiding is not a factor in dense MSQs that have pore volumes below ~20%.

Below 90nm dimensions, barriers must be as thin as possible while maintaining complete coverage. This is a problem with mesoporous films as shown by one study [3]. At pore volumes >35%, pinholes are observed in 20nm of TaN depositions and barrier failure is detected for dielectric films with average pore sizes of 3–4nm. Even if the porous material survives these unit process steps, the final multilevel metal/porous low-k stack gives low yields and fails in packaging.

All of these problems are associated with the porosity added to the films as a simplistic approach to achieving a dielectric constant closer to that of air. These issues are not observed with traditional dense dielectric films. The authors believe that the desired region for ULK films can be found at these values: k<2.4, pore size <2nm, and pore volume well below 30%. Most nonporous films have pore volumes at roughly 5–15% and pore sizes on the order of 1nm. In this region, the materials typically behave as dense films.

The future of low-k technology requires re-engineering low-k materials to produce the needed mechanical properties (low CTE with high modulus and hardness) in the matrix, along with effectively dense films that have pore volumes below the percolation threshold. Achieving these properties in an ULK dielectric film necessitates new material designs at the molecular precursor level.

Methods for lowering the k value at the molecular level include tuning molecular polarizabilities and introducing controlled intramolecular and intermolecular free volume, while avoiding pore formation. Designing films with high cross-linking densities can significantly improve thermomechanical properties. Various stable bridging groups can be used to adjust CTE to match thermal expansion closely with interconnect metals and enhance mechanical properties and thermal stability. Supercomputer molecular modeling can be utilized to design the base precursors to meet end-user requirements.


Figure 2. Ellipsometric porosimetry data and TEM micrograph for a custom-designed spin-on dielectric film (SLX23) with ULK performance and no pore-generation introduction.
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For the IC industry, the optimal answer to integration issues likely lies in dense materials providing ULK performance combined with the desired thermal and mechanical properties. An example of one such solution is shown in Fig. 2, data for a custom-designed spin-on dielectric film.

References

  1. C.-H. Jan, et al., Proc. of the IEEE International Interconnect Technology Conference, p. 15, June 2–4, 2003.
  2. R. D. Miller, International Sematech/Ultralow-k Workshop, June 6–7, 2002.
  3. F. Iacopi, et al., Microelectronic Engineering, 64, p. 351, 2002.

For more information, contact Nigel Hacker, director of product development, Silecs Inc., 2570 N. First St., Suite 200, San Jose, CA 95131; fax 408/516-9093, e-mail [email protected].

J.T. Rantala, W. McLaughlin, J.S. Reid, D. Beery, N.P. Hacker, Silecs Inc., San Jose, California