Can technology keep pace with high aspect-ratio inspection?
11/01/2003
Overview
Inspecting deep within high aspect-ratio structures on ICs is an impending problem for fabs. Venerable optical technology simply will not work for fundamental reasons. The emerging possibilities include versions of holographic, multicolumn e-beams, acoustic, and x-ray imaging techniques, but development is still needed.
High aspect-ratio inspection (HARi) — the detection of defects within structures having depth-to-width ratios >3:1 — is a difficult challenge for the near future. Layout features that require HARi are no longer restricted to contacts and vias; they are also required for deep trenches, stacked polysilicon gates, and metal damascene trenches. These are all driven by the shrink of horizontal design rules and production features with little to no reduction in vertical film thickness. Overall, the International Technology Roadmap for Semiconductors (ITRS) shows that the HARi need in manufacturing is for better than 100nm sensitivity at scan speeds of 1200cm2/hr [1]. Clearly, the industry is behind in achieving this goal, what the ITRS dubs "no known solution" for foreseeable production needs.
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Several types of yield-limiting defects can exist in HAR structures (Fig. 1). Most limitations with HARi relate to edge and surface roughness, and material similarities, especially at the bottom of structures. For example, finding material at the bottom of a round feature made out of the same material is extremely difficult. If the feature is open as desired, then finding different materials is a good option.
For HARi applications with <100nm diameter defects, detection and characterization are hampered by detection tools with low throughput and high cost-of-ownership. The industry needs high-speed cost-effective HARi tools, tools that are particularly good at analyzing defects (e.g., with voltage contrast) near or at the bottom of HAR features, and tools that can find a missing full feature with acceptable reliability.
The need for highly reliable inspection with capture rates for full feature contacts and vias at 100nm is extremely acute. For example, with current microprocessor transistor counts now ~40 million/die, the number of contacts and vias that must be nearly perfect has risen to >500 million/die. If manufacturing is to obtain 50% die yields, then there can be only one bad contact or via in a billion. Defect inspection is tasked to statistically determine contact and via yield, but we cannot find these defects today.
History of the challenge
The historical beginnings for HARi concerns relate back to the early 1990s when sub-0.5µm contacts were hard to view to the bottom with a microscope. The tools of the time were significantly improved by increasing the speed, and therefore the number of contacts examined, for the wafers scanned. They also brought uniformity to the output; re-scanning the wafer resulted in about a ±10% defective capture variation.
When the contact size moved to <0.3µm, the ability of normal light wavelengths and intensities to resolve the bottom of the contact at acceptable depth of focus was unsatisfactory. High-end tools were developed with shorter wavelengths and specific optics for the job, but the throughput suffered.
By the time the significant 1999 ITRS document was drafted, the inspection world and future expectations looked very pessimistic. The future looked very bleak because there were no manufacturing tools for features that needed to be scanned. The improvements to bright-field tools did occur in wavelengths and optic quality, therefore allowing the comparative software to detect many via issues for noncomplex scans. A successful technique was the use of bright-field tools after barrier metal depositions, which enhanced their contacts many times and simplified the features being scanned. However, these scans occurred many process steps after the possible defect cause, and they were therefore not implemented by manufacturing. Nor could partial height contacts with material in the bottom of a contact be found. Resistive contacts need to be found by scanning electron microscopy (SEM) scanning tools.
SEM tools using e-beam technology came online in the late 1990s, adding the unique ability to find voltage-contrast (VC) enhanced defects: those that block or change electric fields radiated by secondary electrons. But the task of resolving sub-200nm contacts even with VC seemed too much for the resolution available from these tools. Scan speeds suffered greatly as magnifications were increased, decreasing the area per scan, and lowering scan speeds to centimeters/hour, instead of wafers/hour.
Why common methods don't work
Most commonly available inspection methods do not work for HARi because of signal loss and confusion (Fig. 2). Signal loss from scattering reduces the effectiveness of energy applied to the bottom of the contact. Scattering then confuses detection with increased thresholds needed to discern the signal.
The signal used in defect inspection is the primary-source signal making its way to the defect and reflecting back to a sensor. Noise is the scattering of the signal to and from the defect. Early modeling for non-HAR features always looked at raised or trench-like features to determine the primary-to-reflected signal needed for respectable defect indication; noise was not a primary concern. For large contacts >0.30µm, an observer could see the difference between a defective contact and a good contact using an advanced microscope. Automated inspection, which was used for its repeatability and statistical value, had high probability of capture at acceptable scan speeds.
Figure 2. Inspection signal problems when using conventional methods for HARi. |
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As design rules shrank and contact dimensions became smaller, noise began to cause significant signal-detection problems. HARi modeling by ISMT from 1998–2003 showed significant signal from virtual defects; there was enough signal to warrant creation of bench-top setups and difficult HAR samples for validation of these models. This work indicated that defect detection in HAR structures could be optimized by the proper choice of detection angles and signal wavelengths.
A trench structure may be used as a beginning model for understanding signal-to-noise modeling in HARi. The area of measurement that a laser spot would image is a small portion of a grid made up of the wall and the trench areas. A trench is more like a 2-D surface, where noise increases but the signal still has a good probability of reaching the defect. If the defect is in the trench, then the wall and its roughness are attenuators of the primary signal, which should enter the trench and reflect off the defect differently than the trench bottom. Now, imagine that a contact is a trench with both ends enclosed. The noise jumps significantly as the walls and both ends add to the problem, not including signal losses into the feature.
In addition to signal and noise issues, early International Sematech (ISMT) modeling indicated that process variation would also make defect detection more difficult in technologies using <180nm design sizes. One important conclusion from this modeling was that variations on the order of 20% made defect detection difficult, even for simple trench features at specific wavelengths tailored for that task. This makes the contact HARi even more difficult.
What does all this mean for future HARi? Lasers in dark-field tools, especially for grazing angle detection, have always worked well for film measurements and surface defects. Using lasers to find defects at the bottom of HAR structures, however, is nearly impossible. It is generally known that the light source and detection method need to be normal to the surface.
The CCD comparative inspection technology used by bright-field tools has always been slow, thus necessitating sampling with its inherent "miss-rate" for problem identification, which might be intolerable for HARi. The necessary computing speed and imaging technology for optical tools is also limiting. To find 0.25µm defects on a 200mm wafer requires a throughput of ~2GHz (i.e., 2 x 109 image pixels to be captured, moved through the image-processing system, and reduced to a small set of descriptive features).
It seems obvious that the direction for HARi must be toward using physics that can cancel or reduce noise effects. Holographic techniques support this and are improved when the grid scanned decreases in geometry. SEM must overcome the issues with examining oxides (e.g., charging) and scan speed, but with new sensors and working distances on the horizon, SEM may be an option.
SEM tools
With SEM tools, the issue has not been detection; it is scan speed (imaging without charging, running comparative analysis, and stepping) for small areas, adding up to unacceptable wafer throughput. With process variations on new technologies — one of the first issues to address for yield stability — large numbers of wafers in different lots must be examined even with the best statistics. David Joy of the U. of Tennessee did an analysis for ISMT in early 2000 showing the reasoning behind these slow scan rates and possible ways to increase the speeds [2]. However, the required improvements pose significant challenges.
Consider charging: Joy noted there are operational ranges in which examined materials exhibit mechanisms for charging that limit detection efforts. First, there are two operating energies for most elements and three operating energies for most thin films for charge balance, which is required for imaging. The operating energy depends on atomic number and a few elements never reach charge balance. This seems to be the issue with some low-k materials.
The mechanisms for charging are:
Static. This type of charging occurs when there is a different amount of charge entering the surface than leaving the surface. This can be reduced by biasing the sample and manipulating e-fields with working distance and physical configurations of the SEM.
Dynamic. This type of charging occurs when charge is generated in the sample. It has been reported that imaging is improved because of charge dissipation when examining a sample with completed copper processing, compared to processing just the dielectric etch processes.
Dynamic charging can be reduced by limiting resolution and increasing pixel density for a defect at the same resolution. This is workable, but if resolution fails to find full-feature defective contacts, ITRS needs are still not met, with no solution to scan speed.
Manufacturing HARi samples
To characterize the performance of current and novel approaches to HARi, there is a need to create wafer samples with HAR structures. At ISMT, we have generated the first known HAR sample wafers. These samples have 50nm of residual oxide in 1500nm deep, 220 x 220nm wide contacts. We used these samples to understand the significance of the physics in various HARi tools and to validate the detection success to the first order.
Figure 3. A difference image produced when a single bad-contact signal with 60nm defect at the bottom was subtracted from the holographic signal of a good contact. |
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Our evaluations have been based on optical wavelengths because we know that SEMs will work, despite their inadequate throughput for manufacturing needs. This work has been ongoing since 1997, targeting technologies <180nm and 3:1 to 5:1 aspect ratios.
Future research
Many novel approaches to HARi have been tried, but to date there are no scan speeds acceptable for implementation in manufacturing. These and emerging technologies include holographic, multicolumn e-beams, acoustic, and x-ray imaging techniques. Two of these technologies, holographic and multicolumn e-beams, are described later.
Although the concept of interfering two beams of light to form a hologram has been known for a long time, holography continues to be a rapidly advancing field. The holograms that we are most familiar with require observation of the 3-D image with another beam of light. In direct-to-digital holography (DDH), the negative is replaced with a multipixel detector that allows digital image analysis and reconstruction. Because the hologram contains 3-D information, one can easily imagine that it might be useful for looking at defects at the bottom of HAR structures. The first question might be about what size via DDH can scan. Because light can travel down openings smaller than the wavelength of the light, this technology has advanced to the beta tool stage.
DDH has one big advantage that the industry hopes to utilize. Holograms contain both intensity and phase information; therefore, 3-D images are possible. This method has the similar response outputs of normal-to-the-surface laser defect detection (intensity detection/imaging), but also includes the detection of phase shifts signaling the presence of material (phase shift detection is unique to the holographic imaging) [3, 4]. This combined methodology seems quite suited for HARi efforts (Fig. 3). While this method seems suitable for current HARi needs, scan speed still needs to be proven.
Microelectromechanical systems (MEMS) have come to e-beam technology. Single MEMS-based SEMs have been studied for at least 10 years, and the proposal for arrayed SEMs is similar in spirit to the proposal for arrayed atomic-force microscopes made by Cal Quate of Stanford U. Multiple e-beam columns or microcolumns working in parallel could significantly increase the scanning speed for defects; they also appear to offer the most probable route to improved system performance. Now that arrayed carbon-nanotube field emitters have been fabricated for displays and potentially for arrayed lithography systems, the ability to make the e-beam sources is considered feasible. The next step is to build the e-beam lens suitable for high-resolution SEM and secondary electron detectors into the array.
SEM technology itself may be limited, as was discussed by Diebold and Joy in Solid State Technology's July issue [5]. Thus, the limits of microcolumn SEMs need careful consideration. Some of these include:
- Microcolumns typically run at currents of 10–100pA (rather than 10nA); therefore, scan rates will have to be slower to maintain acceptable error rates.
- Emitters in a microcolumn are typically not user-replaceable; if one fails, that particular column is of no further use.
While a large microcolumn array would provide a significant scan-speed advantage, the discussed issues suggest that the gain's magnitude would be much less than that expected for the same number of fully optimized single columns. The scan-speed gain of ~30 required in the 2003 ITRS would require an estimated >60 columns, assuming reduced efficiency of multiple columns and column failures.
Rick Jarvis, E.T. Services, Austin, Texas
Michael Retersdorf, AMD/International Sematech, Austin, Texas
References
- International Technology Roadmap for Semiconductors, 2003 update in progress.
- D. Joy, A. Diebold, Technology Transfer #00013877A-ENG, International Sematech, January 14, 2000.
- C.E. Thomas, Jr., et al., Proc. of SPIE, Vol. 4692, pp. 180–194, 2002.
- C.E. Thomas, Jr., et al., 2003 Int'l Conf. on Characterization and Metrology for ULSI Metrology, March 2003, to be published by American Physical Soc.
- A.C. Diebold, D. Joy, Solid State Technology 46, 8, pp. 63–70, 2003.
For more information, contact Rich Jarvis at E.T. Services, 213 Sailors Run, Austin, TX 78734; ph 512/636-3805, email [email protected].