News
08/01/2003
Selete provides annual update of progress
Selete researchers reported development of harder low-k films that looked likely to be successfully integrated into stacks with keff of 2.7, and showed 65nm SRAM gate patterns printed with its 157nm lithography process, in presentations at the consortium's annual update on results held in Yokohama, Japan, in May.
Selete's low-k copper interconnect program has developed low-k materials (k = 2.2–2.3) with hardness modulus of around 10GPa that can be reliably integrated without damage, said project manager Nobuyoshi Kobayashi, suggesting a stack with a keff of <2.7, as the ITRS targets for the 65nm node, looks possible. The program aims to have its technology ready by September 2004.
157nm lithography
Selete continues to plug away at its 157nm lithography research program for the 65nm node. Program manager Wataru Wakamiya reported the 0.85 NA Exitech 157nm stepper is working well. The stepper has only a 0.7mm field, but the goal is to develop a full- field version by the middle of 2004. They used a 120nm-thick fluorinated polymer resist, and the 60nm lines and spaces made with a TFE-NB polymer showed fewer problems with pattern collapse than those with a monocyclic polymer. Selete is also using a bottom antireflective coating based on a novolac polymer with its resist.
Aiming to have all needed 157nm mask infrastructure components ready by mid-2004, Selete is continuing to develop mask writing, inspection, and repair tools with major Japanese tool companies. Wakamiya said the alpha version of the at-wavelength mask metrology tool is ready, and the beta version will be installed at Selete in September. Researchers have developed a new neutral loop discharge etching tool with ULCOAT, which controls the plasma diameter with a magnetic field. Hitachi High Technologies, JEOL, and NuFlare are all working with Selete on improving mask writing throughput.
Work with NEC to improve its existing tool for mask defect inspection at the 90nm node is complete, so Selete will now move on to work on developing a new platform for 65nm with NEC and Toshiba. Selete also worked with Seiko Instruments to improve its existing mask repair tool for the 90nm node, and is now developing a new platform for 65nm that uses both focused ion beam and e-beam.
Finally, researchers report they've made a big jump in durability of soft pellicle material, but the stuff still only holds up to 20J/cm2, far from the target of at least 6kJ/cm2.
E-beam lithography
Selete is working on e-beam lithography as well, figuring high-volume production will use 157nm, but lower-volume products will be made more economically by using e-beam on the critical layers. The e-beam lithography program showed major improvement in preventing resist pattern collapse at least down to 70–60nm lines and spaces by using a surfactant rinse and a supercritical drying process, according to program manager Masaki Yamabe's presentation. Data-processing time has been improved by using a cluster of Linux personal computers.
In other developments, Selete's high-k transistor module group reports it is getting best results with HfAlOx, with 22% Hf.
The major Japanese chipmakers and Samsung are members of the Selete consortium, which is now developing 65nm technology aimed at production of systems on a chip under the Asuka project.
— Paula Doe, Asia correspondent