Technology News
07/01/2003
Is THIS the industry's next killer app?
The concept of "wearable electronics," which last year came out of the Emerging Technology Labs at Infineon Technologies, Munich, Germany, has now expanded to "smart textiles." Briefly, the basis of this technology is a fault-tolerant, self-organizing embedded microcontroller network coupled with sensors and LEDs, all integrated into textiles.
As a proof-of-concept, Infineon engineers have created a small section of "smart carpet" where the microcontroller and sensor functions are arranged and repeated (at a definable distance) beneath the fiber surface. This includes robust encapsulated integrated capacitive sensors that act as touch detectors and LEDs as display elements.
The idea is that this carpet can be used as a motion or fire detector, among other applications. The more densely the sensor elements are arranged, the more precise the results of measurement. Integrated LEDs enable using the carpet as a control system in public buildings to mark walking routes and control the flow of visitors or to mark escape routes in an emergency (see figure).
Within the carpet, chips are interconnected by means of extremely fine signal and data conductors woven into a braided material that acts as the carrier. This interconnect can be the base layer or an intermediate layer of a carpet or any other textile material. Each chip, with its stored coordinates, communicates via a self-learning, self-organizing network with its immediate neighbor and uses a software algorithm to ascertain its own position. If an element within the network is faulty, the chips automatically search for new ways to maintain communication, thus not impairing the network's ability to function. In addition, the self-organizing nature of the material allows it to be cut to size. The information "carpet" network is connected to power and, via a data interface, to existing systems, such as alarm, HVAC, or IT.
Another potential application for high-tech textiles is the building industry, where sensors could be used as a means of detecting faults in concrete at an early stage. Water- and heat-resistant chips could be integrated into columns, floors, and walls, where they could collate information about the condition of the building material. Information gathered in this way could then be evaluated from a laptop computer. This would also allow static investigations to be performed faster and more cost-efficiently.
Werner Weber, senior director of the Emerging Technologies Division, says "Within two years, we will be further developing this innovative technology for integrating microelectronics into textile surfaces with partners from the textile industry to produce a fully functional and intelligent woven material that could be used to cover a wide area."
Weber also foresees applications in the field of advertising and information. "Consider this electronics integrated into tent roofs, Zeppelins, or balloon covers, with the controllable LEDs and other display elements used to convey advertising messages.
It's all pretty amazing and, to a degree, "far out." As a potential application to drive the semiconductor industry, however, perhaps it is more plausible than games, toys, and other personal electronics. If a "smart carpet" contained nine (or six or three) microcontrollers per yard, would the volume of ICs required impact the future of the semiconductor industry? In 2001, the US carpet industry, which supplies ~45% of the world's carpet, shipped 1.879 billion square yards.
 A "smart carpet" where red and blue threads are supply wires and green are data lines. A small microelectronics module is connected at the crossover points of the wires. |
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Novel techniques for cost-effective high-Q inductors
IMEC, Leuven, Belgium, has developed a novel technique for fabricating high-Q inductors, cost-effectively, on top of processed state-of-the-art RF and microwave ICs (Fig. 1). Specifically, it is a wafer-level packaging technique using thin-film layers of copper metallization and low-k dielectrics on top of the passivation layer of a five-metal BEOL process to achieve Q factors above 30.
Increasingly, low Q factors from 5 to 10 are becoming roadblocks to further development of silicon-based technologies at RF and microwave frequencies. (The "Q" of a circuit is a measure of quality.)
 Figure 1. Silicon wafer adapted for fabricating high-quality inductors and interconnects. |
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Target frequencies of IMEC's thin-film inductors cover 1–20Ghz. A 1nH spiral inductor with a Q factor topping 30 in a 2.6 to 8.6Ghz frequency range has been demonstrated with a peak Q of 38 around 4.7GHz and resonance frequency of 29GHz. The combination of post-processed passives with patterned ground shields underneath the spiral inductors further increases the Q factor and significantly extends spiral inductor performance toward higher frequencies (Fig. 2).
The post-processing is compatible with both aluminum and copper fab back-ends and induces no performance shift in the underlying interconnect layers and devices. Since thin-film wafer-level packaging techniques are used, the solution is cost-effective and consumes no additional silicon real estate. Also, inductor models are available, enabling co-design of post-processed inductors and the RF circuit.
With this wafer-level post-processing technique, IMEC has created new opportunities for cost-effective, highly integrated, high-performance RF and microwave ICs. Moreover, these ICs can be mounted and interconnected using IMEC's multilayer thin-film technology to produce high-performance miniature system-in-a-package solutions for wireless telecommunication applications.
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CSP RF-integration breakthrough
Available for licensing and supported by design services, Tessera, San Jose, CA, has introduced a chip-scale packaging (CSP) solution — trademarked Pyxis — for integrating RF modules for cell phones and other wireless electronic products. This packaging technology integrates RF devices with their surrounding circuitry, done at considerable cost, height, and area savings.
Compared to integration for the digital section of wireless systems, to date the RF section has seen only limited integration because it encompasses a high component count in multiple IC technologies including GaAs, SiGe, and BiCMOS. In addition, shielding requirements have hampered RF integration.
Bruce McWilliams, Tessera chairman and CEO, tells Solid State Technology that RF integration, while difficult to do, is highly desired because conventional approaches are increasingly a larger percentage of system costs. "For example, ceramic and laminate modules are reaching cost heights in addition to area-limit pressures driven by the demand for increasing system features. Overall, with the conventional approach to RF circuitry, thermal performance degrades with more compact designs, signal integrity becomes more critical with high component density, and RF is difficult to predict and control."
Briefly described, the CSP design of the Pyxis platform (see figure) includes globally adopted µBGA technology and integrates various other technologies such as flip-chip, integrated passives in silicon and on polyimide, and a novel EMI shielding technique. "Its short, flat ribbon leads provide excellent RF performance, large solder lands are used for the ground plane, and copper shielding and heat spreaders provide thermal improvement and noise shielding, among other advantages," says Catherine de Villeneuve, director of RF market at Tessera.
The first implementation of this technology integrated tri-band GSM-GPRS power amplifiers with their surrounding passive components. "By suppressing the need for expensive GaAs thermal vias and integrating inductors on low-cost polyimide tape and capacitors on a low-grade silicon chip, we delivered significant size and cost advantages," says de Villeneuve. "When compared to competitive alternatives, such as ceramic and laminate modules, the Pyxis platform provides 50% cost, 60% height, and 75% area reductions. This means that by freeing up premium PC board space, this new technology should enable handset makers to quickly and easily incorporate new revenue-generating features, such as MP3, GPS, Wi-Fi, and digital imaging capability," she says.
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Proving the value of bulk source flow for epi
Data from INFICON, East Syracuse, NY, demonstrates the value of precise in situ control of precursor gas concentration in an MOVPE process. Specifically, it shows sensing capability that measures bulk flow (i.e., the product of mole concentration and source MFC flow, which represents the molar flux of the alkyl being delivered to the reactor) is useful in producing more consistent AlInP epi structures.
In a test with delivering trimethylaluminum (TMAl) for a three layer AlInP epi-structure, in situ control was achieved with the company's Composer that determines gas concentration by measuring sound velocity in a controlled isothermal resonant cavity. This can be done from 70–1000torr at temperatures as high as 65°C. Briefly described, a highly accurate 15-bit A/D converter and circuitry reads the source MFC flow to 0.003% of full scale and uses this information along with measured mole concentration to determine bulk flow.
Deliberately varying TMAl bath temperature between layers (i.e., 1ηm, 0.67ηm and 0.33ηm of AlInP) forces a 12.3% variation in TMAl concentration during epi growth. Fig. 1 shows this variation for both open loop monitoring and with closed loop control back to the source MFC.
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Using double crystal x-ray rocking curves to measure the solid phase aluminum composition in the resulting epi structure (Fig. 2), with a resolution of ~0.1% for Al, shows that:
- The small bath temperature variation produced a significant change in Al concentration in the epi structure, shown by the distinct variation in Al peaks, and
- The ability to accurately compensate for concentration changes, due to varying the bath temperature of the source, put Al concentration, shown by the location of the single Al peak, under control.
This work demonstrates an important requirement for the successful manufacturing of optoelectronic epitaxial devices where in situ control allows better use of expensive source materials. It also prevents failed production runs due to the carrier gas not being fully saturated as the source level runs low. The described technique can be used to monitor and control gallium, indium, magnesium, and other metalorganic sources.
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Ultra low voltage SEM's impact on metrology
Schlumberger Verification Systems, Concord, MA, foresees increased metrology capability in SEM technology at or below 250eV landing energies (i.e., "ultra low voltage"). Neal Sullivan, director of technology at the company, says, "Clearly, low voltage impacts the ability to nondestructively perform CD metrology on 193nm ArF resists, making it immediately applicable for sub-100nm process technologies." Reported work shows that CD-SEM operation at landing energies of 175eV results in minimum line slimming for many of the 193nm ArF resist systems; using 100–200eV has reduced slimming to within the measurement noise (i.e., <1 nm).
"But there are other issues in CD metrology that revolve around charging and edge blooming, both of which ultra low voltage reduces. From a metrology perspective, we end up with a better waveform representation of a given feature — a more consistent representation of a feature," says Sullivan.
Edge brightness, one of the benefits of conventional CD-SEM imaging, has long been used to locate measurement edges. The brightness that results from the rather complex interaction volume (depicted in Fig. 1a at 500eV) is also a drawback. "The downside of this brightness is that the image itself is a convolution of the probe and this interaction volume," says Sullivan. "As a conventional beam scans toward a line edge, electrons emerge from the side wall of the sample prior to the beam's arrival and this increases the uncertainty of the edge location." He explains that with CD-SEM metrology, algorithms trigger on the contrast of an image. Typical algorithms are based on an empirical assessment of the intensity threshold. For example, regression along the edge of the intensity waveform is used to determine the approximate physical edge location.
Ultra low voltage SEM capability significantly suppresses the edge blooming effect (Fig. 1b). "You still have an interaction volume, but its extent is on the order of the probe geometry; you actually begin to approach a situation that is similar to what you would have in the case of an atomic force microscope probe, where you have a probe that is distinct in its interaction from the sample," says Sullivan. The benefit is that engineers can think of the CD-SEM metrology process as one where probe shape can be deconvolved from the sample shape. This opens a new set of opportunities beyond the immediate application to ArF resist systems line slimming. These include evaluating low-k films, 157nm resists, and EUV resists.
The proprietary Schlumberger SEM technology incorporates column design architecture specifically targeted at the ultra low voltage regime, where the sample and its characteristic secondary electron emission are accounted for as part of the electron optics. "Sample charging characteristics factor into our resolution and our capability to control charging. We have also designed an active electron collection system whose efficiency approaches 100%," says Sullivan.
It is also significant that with the larger interaction volume associated with conventional CD-SEM landing energies, information contained in signal electrons can come from deeper within a sample. "When you reduce interaction volume, you become much more sensitive to surface details and feature subtleties," says Sullivan.