Narrow n+/p+ isolation in retrograde well implants
07/01/2003
Overview
As device dimensions continue to shrink, the lateral offset of the dopant due to shadowing effects becomes increasingly large relative to the size of the implanted well. This leads to variations in device and isolation performance as a function of feature orientation on the wafer. The accurate placement of the n-well/p-well junction in the center of the region below the STI oxide is critical to the success of interwell isolation. The shape of dopant profiles near 0° tilt varies significantly with tilt angle changes too small to control on even advanced ion implanters. Zero-degree implants avoid shadowing from resist features but can reduce process robustness due to channeling-induced profile variations.
When first introduced into semiconductor processes, high-energy retrograde well implants were often done at a 7° tilt angle, without wafer repositioning. This was chosen to avoid the <001> axial channeling that occurs for 0° implants. In many cases, it was also a legacy of processes developed on older implanters, which were capable of implanting only at a 7° tilt. The problem with this asymmetric approach is that the implanted dopant partially undercuts the resist edge on one side of the mask, and is partially blocked by the resist edge on the opposite side (shadowing).
Two solutions have been proposed to solve the shadowing problem. Implanting at normal incidence (0° tilt) eliminates shadowing, but significantly reduces process control. Near the <001> axial channel, variations as small as 0.1° in the incident angle of the ion beam relative to the crystal planes of the silicon introduce noticeable variations in the depth and shape of the implanted profiles. The sensitivity of the profile shape to incident angle rises with increasing ion energy [1]. Implanting away from a 0° tilt with wafer repositioning between segments is a more robust solution; four equal dose implant segments (quad implant) are most often used. Channeling effects are avoided by not using 0° implants, while shadowing is effectively eliminated by the four-fold symmetry of the ion beam vectors.
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Devices at 150nm were modeled with a 380nm n+/p+ spacing; it was shown that profile variations lead to significant shifts in transistor threshold voltage and n-well to n+ leakage. The simulator was calibrated with SIMS data to accurately model transistor and interwell breakdown performance for well implants at 0° tilt and at 3° tilt using quad repositioning. Low-angle quad implants for retrograde wells eliminate shadowing effects while delivering improved process robustness as compared to 0° well implants.
 Figure 1. Boron SIMS profiles, 3 x 1013cm-2, 300keV vs. the angle from the <001> direction, logarithmic and linear scales. |
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Experiment
Synopsys Suprem4 (v. 2001.4.2) and Medici (v. 2001.4.0) modeling software were used to model an NFET and a PFET, each with a gate oxide thickness of 2.8nm and a 150nm physical gate length. The shallow trench isolation (STI) in between was 380nm wide and 350nm deep. The species, dose, and energy for the n-well and p-well implants were the same in all cases (see the table). For all well implants, the simulator was calibrated to actual SIMS profiles of the corresponding species, energy, dose, and incident angle to enable the evaluation of the effects of profile differences due to channeling for tilt changes as small as 0.5°. The photoresist mask thicknesses for the n-well and p-well implants were 2.68µm and 1.71µm, respectively. All thermal steps occurring in a typical CMOS process were simulated prior to measuring the electrical properties of the transistors.
Two baseline processes consisting of 0.0° well implants or 3.0° well implants in quad mode were considered. The incident angle of all well implants was varied to simulate the beam-to-wafer alignment variations that always occur in production. The effects of a beam-to-wafer misalignment of up to 1.0° were then modeled. To the 0° case was added 0.5° and 1.0° asymmetric implants, with the ion beam tilted toward the n-well. The ion beam vectors of an ideal 3° quad were used to address the 3° quad case. New implant beam vectors relative to the wafer surface were calculated for the wafer surface offset by ±1.0° from ideal conditions (tilted to the left [n-well side] or the right [p-well side]). For all six implant angle splits, all n-well and p-well implants were done at the same angle(s) for that split.
At narrow STI spacings, n-well-to-n+ leakage depends strongly on the n-well/p-well interface under the STI oxide. To determine the relative process robustness of the implant angle splits, errors in photoresist registration and taper were simulated. The ideal case had both well masks terminate at the center of the STI region (0nm offset). Lithography errors in overlay were simulated by shifting the edge of both masks by 60nm in the direction of the p-well. Photoresist taper errors were simulated by comparing resist with 0° taper (vertical walls) and resist with a 5° taper in a full-factorial matrix with the implant splits.
 Figure 2. Phosphorus SIMS profiles, 3 x 1013cm-2, 600keV vs. angle from the <001> direction, logarithmic and linear scales. |
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 Figure 3. Phosphorous SIMS profiles vs. angle from the <001> direction: a) 2 x 1013cm-2, 1000keV; b) 1 x 1013cm-2, 3000 keV. |
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 Figure 4. Simulated net doping profiles after all thermal processes are completed: a)n-well, b) p-well. |
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 Figure 5. Isolation robustness for all implant and photoresist conditions investigated. |
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Channeling behavior of high-energy implants
For high-energy implants near 0.0° tilt, the depth and shape of implanted profiles shift significantly with changes in incident angle <1° (Figs. 1–3). A proprietary alignment technique limited the error in the reported angles to ±0.05°. Incident angle errors of this magnitude are very difficult to avoid in both single-wafer and multiwafer ion implanters. The actual beam-to-wafer angle differs from the desired angle due to 1) mechanical alignment errors in the endstation; 2) errors in beam centroid steering; 3) beam parallelism errors (single-wafer only); and 4) errors from disk rotation effects (multiwafer only).
Additionally, channeling (but not shadowing) is dependent not on the angle between the beam and the wafer normal, but the angle between the beam and the <001> direction in the crystal. These angles differ by the wafer crystal cut error. This error is typically ≤0.5°, but more important, is out of the control of the implanter. A recent study used typical values and variances for these error sources to calculate the range of tilt angles actually achieved when a 0° implant is specified in production. The most frequently occurring actual tilt angle was 0.6°, with tilt angles of over 1.5° occasionally observed [2].
It is clear that the sensitivity of implant profile shape to incident angle is strongest at normal incidence (Figs. 1–3). For 300keV boron, and 600 and 1000keV phosphorus, extreme sensitivity to angle is observed for tilt angles between 0 and 2°. The channeling peak exceeds the peak at RP for boron implants within 0.4° of the <001> axis. The sensitivity of profile shape to angle falls off rapidly for tilts >2°. For phosphorus at 3000keV, the channeling tail is nearly eliminated at a tilt of 1.3°, indicating the reduction in the critical angle for channeling with increasing energy. As long as the (010) and (110) planar channels are avoided, profiles implanted at 3° tilt are virtually indistinguishable from those at 7°, the angle historically used to avoid channeling.
Well isolation and threshold voltage effects
Figure 4 shows the simulated n-well and p-well net doping profiles after completing all thermal processing. For both wells, the biggest differences are between the 3° (unchanneled) implants and the 0–1° (channeled) implants, as expected. Significant differences in the shapes of both the n-well and p-well profiles are clearly visible as the implant angle varies from 0.0 to 0.5 to 1.0°, even after completing all diffusion steps. If a 0° implant is designed into a process, these profile variations will occur due to beam angle errors arising from implanter imperfections or crystal cut variations. In contrast to the 0° case, offsetting the wafer by 1.0° produces no perceptible change in either the n-well or p-well profile if a 3° quad implant is chosen. The doping in Fig. 4 is on a linear scale to more clearly illustrate the channeling-induced variations. The doping profiles in Fig. 4 differ the most at the bottom of the wells.
Figure 5 shows the calculated n-well to n+ leakage for all the implant and photoresist conditions investigated. This is the leakage per unit width from the n-well region below the STI to the n+ region; it is a key measure of isolation robustness. Errors in photoresist offset and/or taper angle induce far more isolation leakage than do changes in doping profiles due to channeling (Fig. 5). Within each subset of photoresist conditions however, the leakage for the 3° quad implant is equal to or less than that for the 0° implant case. Most important, the leakage increase resulting from an inadvertent 1.0° wafer offset is always lower for the quad implant than for the 0° implant, regardless of the twist direction of the offset error.
Figure 6 shows the change in threshold voltages vs. beam incident angle error for both the 0° and the 3° quad baseline processes. For both NMOS and PMOS, the VT shift per unit of tilt error for the quad implant process is about half that of the 0° process — a direct result of the decreased sensitivity to channeling-induced doping variations as the tilt angle is moved away from the <001> axis. The shift in the PMOS VT is much greater than the NMOS, consistent with the sharply reduced doping in the channel region of the n-well (Fig. 4).
 Figure 6. Change in p-VT and n-VT as a function of implant angle error. |
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Conclusion
The magnitude of channeling-induced variations in high-energy implant profiles due to changes in beam incident angle near 0° tilt has been quantified. For processes with 0° well implants, beam angle variations <1.0° significantly alter the shape of typical n-well and p-well doping profiles. These changes are not averaged out by subsequent thermal processing and degrade isolation robustness and increase threshold voltage variations. In contrast, 1.0° beam angle variations in a 3° quad implant process induce almost undetectable changes in the final doping profiles. The dependence of isolation leakage and VT on beam angle is correspondingly reduced. For advanced process flows, low-angle quad implants offer superior process stability as compared to 0° implants.
Leonard M. Rubin, Axcelis Technologies Inc., Beverly, Massachusetts
Wesley Morris, Silicon Engineering Inc., Austin, Texas
Acknowledgments
The authors thank Craig Jasper of Motorola for helpful discussions and Adam Stevenson of Axcelis for assistance in obtaining the SIMS data.
References
1. R. Simonton, L. Rubin, "Channeling Effects in Ion Implantation into Silicon," Ion Implantation Technology, J. Ziegler, ed., Ion Implantation Technology Co., pp. 303–340, 2000.
2. C. Sudhama, R. Thoma, M.F. Morris, J. Christiansen, I.-S. Lim, "Robust Ion Implantation Process Design Through Statistical Analysis," Proc. of the 3rd Int'l. Conf. on Modeling and Simulation of Microsystems, San Diego, March 27–29, 2000.