Innovation from small companies pervades Semicon Europa
05/01/2003
Semicon Europa was held at the Munich Trade Fair Center, Munich, Germany. Courtesy: Messe München International |
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Semicon Europa, held last month in Munich, Germany, was less crowded than usual, and many companies shared booths with others. The war in Iraq and global economic conditions tempered the usual hoopla, but plenty of technical innovation was on display. Innovative tools shown at Europa were often from small companies using technology from large government-funded research institutes.
New feature: MEMS platform
A MEMS-manufacturing technologies platform was a new feature, with a dozen exhibitors showing off capabilities ranging from special MEMS and epi wafers from Okmetic, Finland, to building custom research and manufacturing facilities by M+W Zander, Stuttgart, Germany. An example of a new MEMS facility is a microfab now being built in Bremen, according to Johannes Frohling, MEMS project engineer. He said there were now several MEMS foundries in Europe, as applications are expanding.
ASML was featuring steppers and scanning projection aligners configured for MEMS applications, including a 3-D align method for applications such as double-sided processing and front-side processing with double-sided or back-to-back alignment.
On-wafer testing of unpackaged MEMS devices is the goal of a group of collaborating companies in the MEMUNITY test community led by Suss Microtech and DELTA (Danish Electronics Light and Acoustics). Applications where the novel wafer-level testing methods have been applied are MEMS for accelerometers, pressure sensors, microphones for hearing aids, and automotive MEMS modules.
As features shrink, x-ray metrology is helping in nanometer probing. The UK's Bede Scientific Instruments showed a variety of instruments, including the Bedescan x-ray topography tool for imaging wafer defects, such as dislocations, slip bands, twins, or sub grains, which can cause strains that lead to cracking, particularly in GaAs and InP wafers.
Some developments enhancing x-ray probing of wafers and films are coming from a group of 15–20 technical people in the Czech Republic who formerly worked in the Soviet space program as well as on x-ray astronomy, according to David Joyce of Bede. The group now works with Bede on technology for wafer inspection. One of these is "lobster eye optics" used to increase x-ray intensity from the wafer, thus providing 10x scan speed, Joyce explained.
Rather than a retina, lobsters have a set of nearly parallel crossed plates that collect and focus light. This principle is used in x-ray astronomy to intensify signals spread across a wide angle of sky onto a small detector. The Czech scientists reversed the process in wafer inspection to speed up scanning, according to Joyce.
Innovation is the watchword at EV Group, which manufactures bonding machines for SOI wafers and featured methods for backside alignment of MEMS. The company works with universities around the world, including Cornell and MIT, on processes such as nanoimprinting using hot embossing. EV Group now offers a nanoimprinting system for microcontact printing of features well into the nanometer range for up to 200mm wafers.
"Last year was actually the best year in our history, with over 30% growth [gained] by concentrating on niche markets," said Peter Podesser, CEO. One hot area, he said, was in thin III-V wafers for high-brightness LEDs, increasingly being used in lighting applications, such as traffic signals and other signs.
3-D innovations
A number of innovations for 3-D probing, using both electron and ion beams, were being shown by LEO, a subsidiary of Zeiss. One new development, according to Dirk Stenkamp, president, is phase-space selective imaging to enhance chemical contrast in materials below a surface, called PSI detection. This is being used for such applications as probing TaN layers as diffusion barriers for copper.
A dramatic capability of LEO's Gemini 3-D focused ion beam crossbeam system is the ability to do live e-beam imaging of ion beam milling in the nanometer range. The key to the instrument is a purely magnetic snorkel-type lens and a shield that blocks the strong magnetic field outside the pole piece.
A European program that helps fabs cover the cost of sophisticated tools and instruments, called Semiconductor Equipment Assessment, encourages the use of advanced tools from European vendors, according to Jeff Bruchez, director of SEA dissemination. The fab or laboratory writes a report evaluating the tool, and often works with the tool vendor to make improvements, he said.
European companies are also collaborating to try to curb growing mask costs, according to John Smith, VP of Europe for Photronics, Manchester, UK. He sees more pre-competitive work like this in Europe than in the US. EDA vendors are working with companies like STMicroelectronics and Philips to find more efficient ways to fracture data, and they are also becoming more receptive to smaller field sizes for lithography, especially for ASICs, Smith said.
Homegrown backend technology
There were clear signs of life in the test-and-assembly sector, as a flood of interesting new technologies were on display. After its fast, steep plunge, the test-and-assembly sector — which usually leads the upturns with its short lead times — still looks on track for 20% growth this year.
That's left a number of small European backend suppliers in niche markets doing at least relatively well, providing new tools for the proliferation of new packages. Rasco, Kolbermoor, Germany, says it expects 50% growth again this year. Its booth with handlers for very small devices — and a new tool that packages directly to tape — was packed. Datacon, Radfeld, Austria, which has been doing well in the flexible die-attach business, was showing a new, integrated, high-volume flip-chip system, installed at the European market leader in smart cards, that can turn out 8000 units/hr.
Though the European production market may be slow, there's no shortage of new technology coming out of its big chipmakers and research laboratories. A number of companies reported healthy sales of MEMS tools, mostly to European government-funded research organizations.
One interesting IMEC announcement was the packaging — or at least post-interconnect — technologies coming out of its newly merged interconnect and packaging research programs. Researchers have apparently made considerable progress in putting additional layers with low-cost standard processes on top of the regular processed CMOS interconnects without damaging the finished chip, thanks to careful temperature control and other know-how.
This allows them to make high-quality, 20µm-scale inductors for RF and microwave devices on top of the silicon instead of within it. Separating the inductor from the silicon improves the quality factor from 30 to 40, from the usual five to 10 range.
— Bob Haavind, Paula Doe, SST