Full via first dual damascene challenges
04/01/2003
Copper interconnects combined with low-k dielectrics pose lithography challenges due to material incompatibilities and large aspect-ratio structures. A successful scheme for via first dual damascene requires specially optimized DUV resist on an optimized substrate stack.
Copper damascene technology has been used in advanced VLSI technologies for several years [1–3], and recently both spin-on and CVD low-k dielectrics having a k<3.0 integrated with Cu have been introduced [4, 5]. As interconnect delay times become a larger fraction of overall circuit performance (vs. transistor gate delay), the advantages of low dielectric constant films become critical, particularly as design rules are scaled to ≤0.10µm. Semiconductor manufacturers continue to devote substantial resources to resolving the many yield and reliability challenges associated with integrating Cu interconnects with low-k dielectric materials. Exploring these new processing techniques, lithographers have encountered many new challenges.
Full via first dual damascene
The full via first (FVF) dual damascene (DD) processing scheme mimics that of conventional metallization processes (Fig. 1). Metal and via levels are alternatively printed with alignment and overlay schemes the same as in conventional metallization schemes. Compared to partial trench first (PTF) schemes, which first pattern the trench level, followed by the via level, no change is necessary in the overlay design tolerances. All of the new challenges for trench level pattern transfer are associated with printing over extreme topography, possible interactions between the resist and substrate, and etching of bottom anti-reflective coating (BARC) filled vias. These problems include, more specifically, resist poisoning of trench patterns over fully etched vias, and post-etch crowning and corner rounding effects as a result of the BARC filling properties.
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Initially, low-k stacks were extremely sensitive to poisoning. The stacks consisted of the low-k material alternated with SiN capping/etch stop layers. Initial findings demonstrated that ESCAP resists were considerably more susceptible to poisoning than acetal or hybrid materials, which showed varying amounts of poisoning but never to the level of ESCAP materials [6–7].
Recently, silicon containing bilayer resist systems have been explored as a possible solution to patterning and transferring problems discussed above [8]. While these materials offer much promise, the imaging and/or poisoning resistance of these materials is not yet confirmed [8]. As a result, somewhat conventional BARC
esist schemes are necessary.
In earlier studies, amine group diffusion into the chemically amplified photoresist effectively neutralized the photo-acid generator (PAG) and resulted in unwanted resist patterns over fully etched vias [7]. In extreme cases, the poisoning manifested itself in the form of mushroom-shaped features in the location of the previously defined, fully etched vias located within the desired patterned trench areas. Sources of unwanted amine groups included dielectric etch stops and barrier layers, via plasma etch chemistries, post-etch wet cleans, and, in some cases, the low-k dielectric itself. Methods to control resist poisoning included a) new resist systems, b) using a BARC as a barrier, c) modifications to the dielectric stack, or d) all the above.
Coping with the chimney effect
The capping layer or low-k surface itself acts as a barrier to bulk diffusion for the poisoning species. The result is a migration of the species through the fully etched vias during any curing/bake steps: the amine species are forced to exit the underlying substrate through the vias. This phenomenon is called the "chimney effect." As a result, a larger concentration of amines emerge from isolated or semi-isolated vias located near/at the edge of large runner and/or chain (minimum area features) arrays during the bake steps. As the via size decreases, a higher concentration (1
, where r is the via radius) of amines exist within the via, making it more likely that the via will be poisoned.
A simple semi-qualitative analysis can be applied to compare sensitivity to poisoning of different resist/BARC systems [7]. By counting the number of chains, trenches or stacked contacts from the edge of the array to where poisoning is absent, one can get a rough idea of sensitivity to poisoning of different systems. Ideally, one wants to use the feature with the minimum area at the trench level to gauge poisoning, as this will have the highest concentration of amines passing through it. The goal, of course, is to eliminate poisoning completely for all features in the minimum area array.
For 0.13µm node KrF trench patterning, upper layers consisted of Coral and utilized SiC as the barrier, etch stop and hardmask layers. This particular stack was found to be the least sensitive to resist poisoning. In addition, it was necessary to work with resist vendors to develop a resist that met the lithographic requirements, as well as having reduced sensitivity to poisoning [7]. Once these initial screenings were performed, the best materials using standard in-house evaluation procedures were evaluated to find the lithographically best material. In the end, a suitable material was identified.
Results (Fig. 2) compare the performance of a conventional 248nm resist with the optimized resist on a stack that causes poisoning and on the optimized stack using SiC etch stop layers. Poisoning is often disastrous, causing via chains to be electrically open. When poisoning is not present, the via contact resistance distribution is very tight and low; with resist poisoning, however, it can spread over more than four orders of magnitude. Tight via chain resistance distributions with notable via chain yields obtained using the optimized stack and lithography processes have occurred. When the new dielectric stack and resist are put into place, however, consistently high via chain yields >92% are the result.
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Conclusion
In summary, careful preparation and analysis of both the DD substrate and resist system are necessary to minimize the effects of poisoning in FVF DD schemes. Via chain yields >92% have been achieved using a Coral low-k material with SiC etch stops. It is anticipated that techniques to detect poisoning are applicable for future technologies that utilize ArF imaging and will provide proper etch of DD structures.
Spin-on materials seem to be the current trend to achieve the desired low-k values for future technology nodes (k~2.2). These materials do not bode well for FVF schemes, as reworking trench levels may result in damage of the substrate due to similarities between the low-k material and the photoresist itself.
S.W. Jessen, T.M. Wolf, Texas Instruments, Dallas, Texas
S.A. Lytle, G.W. Gibson, K.G. Steiner Agere Systems, Orlando, Florida
Acknowledgment
Coral is a registered Trademark of Novellus Systems Inc.
References
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7. S.W. Jessen, et al., "Integration Using KrF and ArF Resist Materials in a Full Via First Dual Damascene Process Scheme with CVD OSG Low-k Dielectric," Proc. SPIE, to be published.
8. M. Neisser, et al., "Applying a Thin Imaging Resist System to Substrates With Topography," Solid State Technology, pp. 127–130, Aug. 2000.
9. H.T. Schacht, et al., "Acid Labile Units: A New Concept For Deep-UV Photoresists," J. Photopolym. Sci. Technol. 9, pp. 573–586, 1996.
10. H.T. Schacht, et al., "New Polymers with Acid Labile Crosslinked Units and Their Performance in Deep-UV Photoresists," J. Photopolym. Sci. Technol. 10, pp. 571–578, 1997.
For more information, contact Scott Jessen, Member of Technical Staff, Texas Instruments Inc., 13536 North Central Expressway MS 3737, Dallas, TX 75243; [email protected].