Better wet bench productivity via a new method of rinse optimization
04/01/2003
Conventional wet chemistry processing in semiconductor manufacturing is virtually under attack to reduce chemical volumes, water consumption, system footprint, and overall cost; the needs are even more severe when you consider 300mm wafer processing. In developing new capability to meet these demands, a group of engineers have come up with a novel method of monitoring rinse efficiency. The method itself attacks conventional wisdom about rinse efficiency.
Rinsing is a ubiquitous step in wet chemistry wafer cleaning. It affects many aspects of wafer processing, including process performance, cycle time, footprint, and water consumption.
In conventional wet bench immersion systems, dedicated rinse tanks are required — quick dump rinsers (QDRs) for rinsing hydrophilic surfaces and overflow rinsers (OFRs) for hydrophobic surfaces. Typical process time in each rinse tank is 5–10 min. A conventional immersion system configured for an RCA clean typically includes two QDR tanks and one OFR tank. In such a system, rinsing constitutes ~30% of the process time, >40% of the process-module footprint, and ~65% of the total water usage.
The trend with 300mm equipment development is for faster cycle time, lower water consumption, and smaller footprint. For example, in the transition from the 100nm to the 65nm technology node, the 2001 International Technology Roadmap for Semiconductors calls for 20% reduction in steady-state cycle time and water consumption, while maintaining footprint effectiveness.
One approach to meeting these goals is to minimize the rinsing component of immersion processing; several equipment suppliers have introduced 300mm tools based on this approach. However, it is difficult to optimize an improved immersion system without a reliable, accurate method of rinse optimization. Too little rinsing results in residual chemicals that can also lead to etch nonuniformity and high particle counts. Rinsing too long can result in undesired surface reoxidation, excess water usage, and possible surface recontamination.
Traditional methods
With the traditional rinse-to-resistivity method of monitoring rinse efficiency, fresh water is fed from the bottom of a tank and overflows to drain until the measured resistivity of the overflow is ~14MW. The problem with this method is that it is not representative of what is happening at the surface of the wafer and is subject to other effects, such as CO2 dissolution from the atmosphere, which cause a lowering of the water resistivity [1].
 Figure 1. Comparing pH values of overflow and carryover-layer measurements to an ideal CSTR rinse for a) Design A and b) Design B. |
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There have been previous studies to better understand rinsing near the surface of the wafers or between wafers. In 1995, a method was presented in which two wafers in a cassette were attached to electrical leads, and the resistivity between the two wafers was measured during the rinsing process [2]. More recently, a research group at the University of Arizona introduced a method in which a deep oxide trench with a buried polysilicon layer was monitored electrically during the rinsing process, using a special circuit on the wafer to measure the efficiency of the rinse from the surface and from topography [3, 4].
Both of these approaches provided insight into the rinsing process, but had limitations, especially in terms of practical application for automated integrated processing in a production tool. Both studies required specialized test wafers and instrumentation in the bath, and, additionally, the second study cited was only carried out in a small rinse fixture and may be difficult to scale up for a full-size rinse tank.
A novel method
We have developed a new method for rinse optimization — the carryover layer method — that is repeatable and accurate, with an ease of implementation ideal for production use on hydrophobic wafer surfaces. This method does not require electrical connection to wafers during rinsing, allowing for in situ chemical processing to be done in the rinse tank prior to final rinsing. It also allows test wafers to be placed anywhere within a batch of wafers.
 Figure 2. Comparison of rinse efficiency for Designs A and B using pH measurements in the overflow, shown in terms of resistivity calculated from pH. |
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The new method measures the pH of a carryover layer — the water film immediately on the wafer surface. The wafer to be measured is removed from the tank at a controlled rate to yield a specific carryover layer thickness, and is then transferred and completely submerged in a bath containing 200 ml of 18MW DI water; the DI water is swirled, using an orbital shaker, for 10 min under a nitrogen blanket to ensure complete mixing of the chemical from the wafer into the water. The resulting pH of the 200-ml bath is then measured and used to calculate the concentration of cleaning chemicals that were in the carryover layer.
To determine the ideal wafer removal rate, we soaked wafers in a 0.05-molar HCl solution with a pH of 1.3. These wafers were then removed at various rates. Based on the known pH of the carryover layer, the thickness of the layer could be calculated. Over several tests, we found the thickness to be repeatable to 0.2µm. Very high pull rates >30mm/sec have to be avoided to preclude a large drop forming on the bottom of the wafer, which may or may not fall off during transfer. For our tests, we adopted a 17.4mm/sec pull rate and 8.9µm carryover layer thickness.
Application to rinse optimization
Using the carryover method, we compared two new designs under consideration for 300mm rinse hardware:
- Design A, where the rinse mechanism brings water into the bottom of the tank in a diffused manner; and
- Design B, where rinse water enters the tank in an agitated manner.
Unlike traditional immersion systems where chemical treatment and rinsing occur in separate, discrete tanks, these rinse tank designs support in situ chemical processing, such as dilute HF etching, thus enabling a reduction in footprint, cycle time, and water consumption. For such an approach, well-controlled rinsing is critical for process performance.
In a perfectly mixed tank, it is assumed that the concentration everywhere is always the same (i.e., fresh rinse water is instantaneously distributed to the entire tank); this is called the continuous stirred tank reactor (CSTR) model. We evaluated our two alternative rinsing hardware designs against this ideal model.
For our measurements, we begin with a known 0.05-molar HCl solution in the tank. At time zero, we introduce 18MW DI rinse water at 40 liters/min. We apply the carryover method to both designs and also use the traditional "pH of the overflow water" method.
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We gathered data for Design A and compared it to an ideal CSTR situation; this data revealed that the overflow pH measurements indicated a 92% rinsing efficiency, while our carryover method indicated only a 69% rinsing efficiency (Fig. 1a). Similarly, for Design B, we observed 94% efficiency from overflow water measurements and 89% efficiency at the wafer surface (Fig. 1b). This showed us that Design B was significantly more efficient (20%) based on the data from our new carryover-layer method. Furthermore, these results again confirmed that overflow resistivity is not representative of rinsing near the wafer surface.
To further show the traditional rinse-to-resistivity method's inability to distinguish between Designs A and B, we calculated overflow resistivity as a function of rinse time when starting with 200:1 HF in the respective rinse tanks (Fig. 2). This shows that the traditional rinse-to-resistivity measurements taken in the overflow fluid are not representative of the wafer surface and do not provide sufficient sensitivity for the optimization of advanced rinsing techniques.
Finally, when we calculated the water consumption of the alternative rinse hardware designs — based on flow rates and rinse times required to reach the desired pH — the carryover layer method revealed that Design B is superior, requiring 10–25% less water to achieve the same pH levels. For example, to reach pH 3, hardware Design B required only 200 liters of water compared to 220 liters for Design A.
Overall, our new carryover-layer method of monitoring rinse efficiency helped us to determine the best approach to optimizing etch uniformity and rinse efficiency using a new, single, wet chemisty immersion tank for in situ HF etch in the final rinse (Fig. 3).
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While the new method is seemingly straightforward and fundamental to implement, its impact is significant for developing wet chemistry systems for advanced 300mm processing and future ITRS nodes. Specifically, in this work, directly through the use of this method, we were able determine that for a 30Å oxide etch using 200:1 HF chemistry, a short 3-min rinse is optimal for minimizing etch nonuniformity and reducing particles with a minimum size of 90nm.
By optimizing rinse hardware in this way, we have reduced the number of tanks, and, as a result, system footprint (>50% less); we have been able to replace a conventional 7-tank RCA clean system with a 2-tank configuration. Further, we have reduced rinse water consumption by ~90% and cycle time for this process ~50% (see table).
Weiping C. Ma, Steve Nelson, Phil Grothe, Jeff Butterbaugh, FSI International, Chaska, Minnesota
References
1. L. Mendicino et al., Proceedings of the Semi Technical Symposium, Semicon West 2001, http://www.semi.org/web/wevals.nsf/wpc4c7r/.
2. P.G. Lindquist et al., MRS Proceedings, Vol. 386, p. 55, 1995.
3. F. Shadman et al., Solid State Phenomena, Vols. 76–77, 2001.
4. F. Shadman et al., Proceedings of UCPSS, p. 189, 2000.
Weiping C. Ma received her BS in ceramic engineering from the University of Missouri-Rolla, her MS in materials science and engineering from the University of Wisconsin-Madison, and her MBA from the Carlson School of Management, University of Minnesota, Twin Cities. She is product marketing manager for the Surface Conditioning Division, FSI International, 3455 Lyman Blvd., Chaska, MN 55322; ph 952/448-5440, fax 953/448-2825, e-mail [email protected].
Steve Nelson received his BS in physics and BS in mathematics from the University of Minnesota. He is a senior applications development engineer for the Surface Conditioning Division at FSI International.
Phil Grothe received his BS in physics from Vanderbilt University. He is the immersion systems product manager for the Surface Conditioning Division at FSI International.
Jeff Butterbaugh received his BS in chemical engineering from the University of Minnesota, Twin Cities, and his PhD in chemical engineering from the Massachusetts Institute of Technology. He is chief technologist for the Surface Conditioning Division at FSI International.