High-k gate dielectric applications using ALD Hf-based oxides
01/01/2003
by: Sang-In Lee, Jon S. Owyang, Yoshi Senzaki, Aubrey Helms Jr., Kerem Kapkin, ASML Thermal Division, Scotts Valley, California
overview
Charge trapping and electron mobility degradation in MOSFET performance are the most serious challenges to the integration of high-k dielectric materials. The hydroxyl ion, OH-, a prevailing impurity in H2O-based high-k dielectric films and a major source of fixed and trapped charges, can be eliminated by using ozone as an oxidant in lieu of H2O. Superior Hf-silicate films were developed using ozone in a showerhead-type atomic layer deposition reactor with volatile liquid precursors producing quality high-k gate dielectrics suitable for the 65nm technology node.
The continued aggressive scaling of VLSI gate oxide according to Moore's Law begins to face barriers by entering into a tunneling regime that results in the inability to scale the oxide further. According to the International Technology Roadmap for Semiconductors (ITRS), low-power devices will require an equivalent oxide thickness (EOT) of ≤15Å for the 65nm technology node, while high-performance devices require an EOT of ≤10Å. For low power consumption applications where the gate leakage current requirement is below 10-7A/cm2, a high-k dielectric film — one which is thermally stable and chemically stable in contact with silicon — is needed.
 Figure 1. Phase diagram of alumina hydrate — dehydration sequence in air. |
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The major issue and fundamental limitation for further scaling of the gate dielectric is the tunneling current's exponential increase due to the reduction in thickness. When the thickness is reduced to the direct quantum mechanical tunneling regime, gate leakage current increases exponentially. Gate dielectrics with higher dielectric constants must be formed in order to reduce leakage current while maintaining the same gate capacitance. Also, a material with a large bandgap and barrier height is needed.
Because of these requirements, simple metal oxide films such as Ta2O5, TiO2, Al2O3, Y2O3, ZrO2, HfO2, and ferroelectric barium strontium titanate (BST) films have been suggested for gate dielectrics. Ta2O5, TiO2, and BST are unsuitable, however, due to their lack of chemical stability in contact with the Si substrate and their lack of thermal stability at temperatures typical of CMOS post-gate deposition processes.
Engineering solutions for leakage current
Unfortunately, for most of the remaining high-k materials listed above, the bandgap is inversely proportional to the dielectric constant. They also lack thermal stability, an essential requirement for device process integration. Since the thickness of dielectric film and barrier height have an exponential influence on leakage current, engineering of the interface between the high-k dielectric and Si may be needed, or a silicate film for gate dielectrics may have to be used. Silicate films have the advantage of being thermally and chemically stable with Si and exhibit good interface quality comparable to that of SiO2, but have a lower k value. As with the thermal stability issues, an understanding of other material properties, which are very important to successfully integrate these materials into CMOS processes, is lacking. Most of the high-k materials' phase diagrams are not commonly known, but the phase diagram of Al2O3 can be kept in mind as a typical example of a high-k dielectric film's phase diagram (Fig. 1).
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The Al2O3 phase diagram illustrates how difficult it is to determine the formation of a material's phase type during integration when Al(OH) groups are formed. Furthermore, (OH) is viewed as an impurity and a charge trap site in the film. This increases the chances of poor device performance and difficulty in forming a stable film. Therefore, the selection of precursors and processes must be carefully determined for high-k material deposition without the formation of a hydrate.
It is also important to control the interface layer — SiO2 and/or NH3-nitrided Si substrate — such that it remains thin, in the range of 3–5Å, minimizing the effect of increasing the EOT. The amount of fixed charge was reduced and the flat band shift and hysteresis eliminated for a DRAM capacitor application, with an Al2O3 film deposited by using ozone as a reactant, in lieu of using H2O, in combination with a showerhead-type atomic layer deposition (ALD) reactor. A similar experiment was performed in the same tool, substituting a cross-flow reaction chamber for the showerhead, and ozone, but similar results could not be uniformly achieved.
Thickness variation limits CVD's usefulness
Up to now, many methods to form high-k materials have been introduced with ALD being one of the most suitable methods known today. CVD techniques are subjected to either kinetically controlled growth reactions or diffusion-limited reactions and are difficult to control for such thin layers. It is expected to be extremely difficult to demonstrate a ±1–2Å thickness variation control across the wafer surface area without microloading effects when CVD deposition is used.
This is even more pronounced when going to larger wafer sizes. Using CVD to achieve repeatable device and circuit performance with high yields in a high-volume manufacturing environment will be challenging in this thickness regime. Also, the issue of charge damage must be considered when selecting the deposition method for the formation of dielectric films, because the accumulation of electric charges on nanoscale thin films is normally greater than the dielectric breakdown voltage, even at extremely low voltages.
Since ALD technology utilizes a self-limiting reaction method, it inherently delivers extremely good uniformity and reproducibility equal to or better than the well-known thermal oxidation of Si. ALD has demonstrated advantages by achieving thin films with superior conformality at low process temperatures with built-in stoichiometry control. The low impurities that are being achieved in the deposited films and a precise thickness control on an atomic level gives ALD the capability for meeting the requirements for monolayer depositions and nanolaminated films in a high-volume manufacturing environment.
 Figure 3. AES analysis of HfO2 film obtained from TEMAHf/O3: a) HfO2 (TEMAH + O3) and b) carbon contents in HfO2 films. |
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In consideration of other productivity requirements for the high-volume manufacturing stage beyond R&D, the precursor selection is very important when choosing between a solid and a liquid precursor. Solid precursors must remain heated at all times when in use to produce enough vapor pressure and to prevent condensation. The loss of heating of a solid precursor in use, or cold spots in the gas delivery system, will cause the vapors to condense and clog the reactor. The difficulty of detecting when a solid precursor is spent, along with the varying surface area of the solid as it is consumed, are additional drawbacks of using solids in production.
Liquid precursors provide the flexibility and control needed to produce robust films in a high-volume environment. Liquids have the flexibility to be delivered by vapor draw, bubbling, or by direct liquid injection. The proper selection and sequencing of liquid precursors allows the stoichiometery to be controlled to easily produce Hf- or Si-rich films. Hafnium silicate mixtures or nanolaminate films can also be obtained with the proper sequencing of the liquid precursors. The repeatability and control of an ALD Hf silicate film produced by such a method is shown in Fig 2.
The reduction of the incorporated carbon content in the film may be one of the more important challenges of high-k gate dielectrics when using a liquid metal-organic (MO) as the precursor. HfO2 and its silicates have been proposed as promising high-k gate dielectric candidates due to their high permittivity, good thermal stability, and large band offset to Si.
In a screening experiment for the selection of a liquid MO precursor for hafnium oxide or silicate formation, several commercial liquid precursors were evaluated from the point of view of carbon content in the film. After measuring the carbon content of many HfO2 films deposited using different liquid precursors, tetrakisethylmethylaminohafnium (TEMAHf) showed the lowest carbon content (Fig. 3). The TEMAHf precursor is already being used on a commercial scale and has high potential for being the Hf liquid precursor of choice in the future.
Defects and charge trapping
Defect and charge-trapping issues are major concerns when developing HfO2 films for high-k gate dielectrics. For extrinsic defects, grain boundary (GB)-related defects and the reduction of defects originating from the HfO2 are required. Furthermore, a scientific understanding of the interface formed between the HfO2 and Si films is needed. This transitional interface with a varying dielectric constant (k-transition) is formed by the up-diffusion of Si into the HfO2 high-k material. To eliminate the k-transition interface, TEMAHf and Si precursors were used for a single-layer silicate deposition. During this process, the formation of a film without [Hf = OH]+ ionic groups can be achieved by using O3 for the reactant gas in lieu of H2O.
Analysis of Hf films formed by O3- based ALD shows the achievement of an amorphous phase. Also by using O3 as the reactant, there was no occurrence of an incubation phenomenon that is always observed on hydrophobic, HF-last Si surfaces in combination with H2O-based oxide films. Furthermore, the deposition using O3 occurred layer-by-layer, unlike the islandic-type growth mechanism that has been reported using H2O-based ALD HfO2 films and verified by high-resolution transmission electron microscope (TEM; Fig. 4). The amorphous Hf-silicate films produced did not exhibit the GB-related defects. Commonly, GBs act as dopant and oxygen diffusion paths, as well as leakage paths. Therefore, superior thermal stability and improved leakage properties are expected.
How to improve the electron mobility of high-k films to be ≥90% that of SiO2 is one of the most significant barriers to implementing high-k gate technology. Increasing the interface oxide thickness to increase mobility is the most well-known solution, but it comes at the expense of increasing EOT. On the other hand, in order to meet device performance requirements, it is essential to minimize interface oxide and reduce the EOT. There is a compromise between achieving a low EOT and maintaining high mobility.
Another technique being evaluated to increase mobility is the use of strained Si; however, the defects and trapped and fixed charges existing within the high-k dielectric are the dominant mechanisms for mobility degradation. Furthermore, if the [Hf = OH]+ ionic group exists at the interface, an awareness of the fixed charge-induced mobility degradation effect of these ions is needed before selecting the precursors and reactants, because these represent a large source of positive fixed charge.
Conclusion
Care must be taken to choose the proper precursor and reactants to produce high-quality high-k gate dielectric films, which can survive CMOS post-processing and meet transistor performance requirements. Using the ALD deposition technique in combination with ozone as the reactant, and the proper choice of precursor in a showerhead-type reactor, it was demonstrated that a very high quality film could be produced. Proper consideration of defect modes, charges, and careful interface engineering are crucial to successfully integrate high-k films.
Acknowledgments
The authors would like to thank H.K. Shin of UP-Chemical Co. Ltd. and S.K. Lee of IPS for their contributions to this article.
For more information, contact Sang-In Lee, who is the chief technical officer in the Thermal Division at ASML, 440 Kings Village Rd., Scotts Valley, CA 95066; ph 831/439-6263, fax 831/439-4498, .e-mail [email protected].