Electrical testing applications for scanning probe microscopes
12/01/2000
P. DeWolf, E. Brazel, M. Lefevre, A. Erickson, Digital Instruments, Veeco Metrology Group, Santa Barbara, California
overview
The capabilities of three applications of scanning probe microscopes are discussed, with examples of their use. Tunneling AFM measures 2-D current profiles, which can be used to find defects in gate oxides, for example. Scanning capacitance microscopy can show the carrier concentration in a semiconductor in two dimensions. The scanning spreading resistance technique can also measure 2-D carrier profiles in semiconductors, as well as the conductivity or resistivity of nonsemiconductor materials.
The maturation of scanning probe microscopy (SPM) has yielded an analytical instrument with a wide range of capabilities and applications. The instrument's ability to perform ultra-high-resolution topographical profiling has been augmented with measurements providing information such as hardness, work function, electric and magnetic field strength, and now electrical currents, resistance, and capacitance. These new capabilities, respectively called tunneling atomic force microscopy (tunneling AFM or TUNA), scanning spreading resistance microscopy (SSRM), and scanning capacitance microscopy (SCM), allow measurement of a wide range of electrical properties of various materials with nanometer-scale resolution. One implementation of these capabilities is a set of small modules that can be mounted on a standard NanoScope SPM scanner. The MultiMode Dimension 3100 and 5000 instruments can be equipped with the application modules.
The TUNA module measures ultra-low currents flowing through the tip to the sample held at a fixed DC bias. The SSRM module images the variation of sample resistivity or conductivity over a high dynamic range. With the SCM module, the variation in carrier concentration inside semiconductor structures can be imaged through measurement of the dC/dV signal of the MOS capacitor formed by the probe and the semiconductor sample. In all three modes, the probe is scanned in contact with the sample (contact mode), and topography and electrical data are acquired simultaneously, enabling the direct correlation of a feature's location with its electrical properties.
TUNA
TUNA is a method for measuring ultra-low currents on low-conductivity samples. A DC bias is applied between the sample and the conductive tip as the tip is scanning the sample in contact mode. A linear current amplifier with a range of 60-120fA senses the resulting current passing through the sample. In this way, the sample's topography and current are measured simultaneously, enabling direct correlation of a sample location with its electrical properties. The noise level of the TUNA module (typically 50fA) allows extremely sensitive current measurements.
In addition, the TUNA module also allows local measurement of current-voltage spectra on the sample.
The TUNA technique is especially useful for evaluation of thin dielectric films such as gate oxides in transistors. In this case, the current tunneling from the tip through the dielectric film strongly depends on film thickness, leakage paths (possibly caused by defects), and charge traps, all of which may significantly affect the properties and the integrity of the whole film.
TUNA can be applied in many research or manufacturing areas and on a wide range of materials. It can be used to study the thickness uniformity or interface roughness of thin dielectric films. TUNA can also be applied to localize and image electrical defects in semiconductor or data storage devices. In addition, TUNA can be used for the study of conductive polymers or organics, and other low-conductivity materials such as semimetals and semiconductors. Some applications are discussed below.
Variations in dielectric film thickness
Variation in the thickness of a gate oxide is a much greater problem as oxide thicknesses decrease. Surface and interface roughness is also a concern because it causes locally higher electric fields, which enhance leakage current and Fowler-Nordheim tunneling. These effects could lead to fast degradation of oxides and could limit oxide scaling for MOS devices. Conventional measurement techniques are not adequate for locating and measuring the degree of oxide thinning. These techniques include macroscopic current-voltage (I-V) and capacitance-voltage (C-V) spectroscopy, emission microscopy (EM), and transmission electron microscopy (TEM).
TUNA provides the required spatial resolution to map the thickness variation of thin dielectric films. Indeed, the ultra-low currents flowing through the dielectric film or oxide provide a measure for small variations in the thickness of the film. Generally, the current (often Fowler-Nordheim) increases exponentially with a linear change in film thickness, thus providing a very sensitive technique to monitor thickness variations.
Defects in dielectric films
Another application of TUNA is to monitor weak spots of thin dielectric films or oxides. Structural and electrical inhomogeneities within the oxide and at the interface to the substrate can be investigated with TUNA. Figure 1 shows the topography and closed-loop TUNA data obtained simultaneously at a trench isolation area of a 40nm-thick gate oxide. The current setpoint was 1pA. The topography image (on the left) shows — from left to right — the gate oxide, the interface region, and the field oxide. In the gate oxide region, the 1pA tunneling current can easily be obtained with a low sample voltage, whereas the voltage is saturated in the field oxide region. Indeed, the field oxide is much thicker and one cannot therefore obtain a 1pA current within the voltage range of the instrument (12V). At the interface of the field oxide and gate oxide regions, there are some locations with lower voltages (dark spots), indicating local weak spots. This voltage behavior can be translated into a locally thinner oxide.
Thin dielectric films in data storage
A different application for TUNA can be found in the characterization of thin dielectric films used in the data storage industry. For example, TUNA can be used for the evaluation of nonconductive diamond-like carbon (DLC) films on magneto-resistive (MR) read/write heads. Figure 2 illustrates the principle. The topography image (on the left) shows little detail of the MR head, whereas the TUNA current data (on the right) reveal the DLC film and shows the different (metallic) regions of the MR head. The TUNA current data can be used to detect small defects (electrical contaminants, short circuits, DLC thinning, etc.) in this film.
TUNA with other materials
TUNA can also be used on other materials with low conductivity, such as ferroelectric films, conductive polymers, and specific organic materials. In Fig. 3, TUNA data of a thin granular ferroelectric film (SrBi2Ta2O9) are shown. The data indicate that the TUNA current is higher at the grain boundaries, explaining the undesired leakage current of the ferroelectric capacitors fabricated with this type of film.
 Figure 4. a) Topography and b) SCM dC/dV of a cross-sectioned transistor from a Pentium II processor. 1.25mm scan. |
SCM
The continuing miniaturization of semiconductor devices has created a serious challenge for traditional materials analysis techniques, such as secondary ion mass spectrometry (SIMS), spreading resistance profiling (SRP), and capacitance-voltage (C-V) measurements. While the accuracy, reliability, and improved capabilities of these instruments provide the basis for current materials characterization data, their restriction to 1-D analysis, inability to measure sub-0.1mm features, and limited characterization repertoire have increased the value of scanning probe techniques. SCM was one of the first SPM techniques to find its way into the advanced semiconductor analysis world. SCM instruments can show 2-D carrier concentration profiles in actual semiconductor devices, as well as the relationship of these profiles to critical device structures. This capability makes SCM useful in the development, manufacturing, testing, and failure analysis of semiconductor devices.
 Figure 5. SCM image of a) a good silicon device, and b) a failed silicon device showing a short circuit between the two doped regions. 8mm x 2mm scan. |
In SCM, the metallized probe forms a metal-insulator-semiconductor (MIS) capacitor with the semiconductor sample. An AC bias applied between the scanning contact AFM tip and the sample generates capacitance variations that are monitored using a GHz-resonant capacitance sensor. This system has been shown to be sensitive to variations smaller than attofarads (<10-18F). The capacitance variation (dC/dV) is a measure of the local carrier concentration density and type (n-type or p-type), and can therefore be used for high-resolution, 2-D carrier profiling.
2-D carrier profiling in semi device structures
One of the most important applications of SCM is 2-D carrier profiling of semiconductor device structures. Indeed, 2-D dopant profiling is a high priority on the International Technology Roadmap for Semiconductors and is expected to become an enabling technology for next-generation device manufacturing. SCM provides the spatial resolution (about 10-20nm) and dynamic range (1015-1020atoms/cm3) to address these needs.
Figure 4a shows the topography and Fig. 4b shows the simultaneously obtained SCM dC/dV image of a cross-sectioned transistor from a Pentium II processor. The topography shows the gate region with the two spacers (bright areas), but shows no details of the carrier profiles. The SCM dC/dV image shows the differently doped areas of the transistor: source, drain (both high- and low-dose implants), and gate. The SCM image can be used to extract valuable information such as the effective gate length, junction depth, or details on the lateral and vertical extension of the doped regions. With the exception of SSRM (see below), this crucial information is not accessible with any other technique.
In addition to imaging, the SCM can also be used to measure dC/dV versus V curves in selected positions on the sample. In this case, the DC sample bias is ramped between two user-selected values, and the SCM sensor output (dC/dV) is monitored and plotted. Different types (n and p) result in a different sign of the dC/dV signal, and different dopant levels result in a different intensity of the dC/dV signal.
 Figure 7. a) Topography and b) resistance scans of a cross-sectioned Si DMOS transistor. 12mm scan. (Courtesy of IMEC, Belgium) |
SCM is also a very valuable tool for failure analysis on semiconductor devices. Indeed, the SCM technique allows visualization of whether a particular implantation is present, whether it is the correct type (n- or p-type), has the expected dimensions (both in-depth and laterally), and other characteristics. A typical failure analysis example is shown in Fig. 5. A cross-sectional surface was made through a number of devices, including one known to have bad electrical device characteristics. The SCM image of a good device is shown in Fig. 5a, and the SCM image of the corresponding area of the bad device is shown in Fig. 5b. The latter indicates that the two implanted regions (i.e., the bright areas showing the n-type implant and
n-type well implant) are touching when they should be separated from each other as they are in Fig. 5a. This "short circuit" resulted in a very high leakage current in this particular device.
 Figure 8. SSRM resistance scan of a cross-sectioned 0.25mm silicon MOSFET transistor. 2mm scan. (Courtesy of IMEC, Belgium) |
Ferroelectric films
Ferroelectric thin films have applications in nonvolatile memories and microelectromechanical devices (MEMS). The decrease in size (down to tens of nanometers) of these devices requires an appropriate description of the material properties and processes in ferroelectric films at these dimensions. For example, it is important to investigate whether ferroelectric structures with nanometer dimensions still exhibit ferroelectric and piezoelectric properties, and to study how these properties are affected by the size. SCM is a possible technique for these studies, as it provides a method for measuring the sign of the C-V slope for the ferroelectric sample and, hence, the domain or polarization state in the thin film. SCM has been used to image and manipulate the domain structure in a thin Pb(Nb0.04Zr0.28Ti0.68)O3 (PNZT) ferroelectric film. On an area of 25mm x 25mm, the tip was scanned with a DC sample bias voltage of -12V, and subsequently smaller areas were written with DC sample bias voltages of opposite polarity. A small AC bias voltage was used to image the polarized regions, i.e., to study the magnitude and sign of the slope of the C-V curve at zero DC bias. Figure 6 shows the SCM image on the left and the corresponding AFM topography image on the right. The dark and light contrast regions indicate oppositely polarized regions, where the dC/dV signal is of high strength but opposite sign.
In addition, SCM can also measure the polarization (or C-V) curves of small ferroelectric capacitors, or even of single ferroelectric grains. This is impossible with conventional probing techniques.
SSRM
SSRM provides 2-D information on the electrical conductivity or resistivity of the sample under study. The technique has been developed and patented (Digital Instruments, Veeco Metrology Group) in collaboration with IMEC, Belgium. In SSRM, an electrically conductive probe is used to measure the sample's local resistivity. Indeed, when the probe is scanned in contact mode over regions with different resistivity r, the electrical resistance R formed by the probe-sample contact will vary proportionally. If the contact is assumed to be circular (an area with radius r) and of ohmic nature, the relation between R and r is given by the basic spreading resistance formula:
R = p/4r
Since the resistance can vary over several orders of magnitude, a logarithmic current amplifier is used for SSRM. The logamp has a current range of seven orders of magnitude, from 10pA up to 0.1mA. A major application of SSRM is the measurement of the 2-D distribution of electrical carriers inside semiconductor structures.
2-D carrier profiling in semiconductor device structures
An important application of SSRM is 2-D carrier profiling inside semiconductor structures. While the probe is scanned across the cross section of the semiconductor device, the electrical resistance is measured between the conductive tip and a large, current-collecting back contact. When the applied force exceeds a certain threshold force, the measured resistance is dominated by the spreading resistance. On Si structures, high forces (typically, a few mN) are required in order to penetrate the native oxide and to establish a stable electrical contact. Since standard AFM probes deform at these high forces, doped diamond or diamond-coated silicon probes are employed. The extreme hardness, high Young's modulus, and electrical conductivity obtained through doping make diamond particularly suitable for use as a coating material for SSRM tips.
 Figure 9. SSRM resistance (left) and topography (right) scan of an InP-based heterostructure. 7mm scan. (Sample courtesy of M. Geva, Lucent Technologies) |
In the following example, analysis has been performed on a Si DMOS transistor structure. The transistor structure was cross-sectioned to expose the differently doped regions, and then polished using standard polishing techniques. The topographical image in Fig. 7a shows quite clearly the Al-contact (black region), the underlying oxide (dark green), and the polysilicon and underlying gate oxide. The SSRM resistance image in Fig. 7b shows the electrically active regions. The different colors reflect different levels of resistivity: dark indicates highly conductive regions and bright indicates low conductivity. Clearly observable are the highly doped n+ substrate (bottom), the lower-doped n-type epi-layer, the p+ body (which appears as highly resistive), the n+ implant (top), the metal and oxide regions, and the highly conductive polysilicon material. Junction positions correspond to the sharp transition between the various color levels.
In a second example, SSRM imaging was performed on a silicon MOSFET with a gate length of 0.25mm. Figure 8 shows the differently doped regions (source, drain, and gate) as highly conductive areas (dark), the dielectric and substrate as low-conductivity areas, as well as the intermediately conductive area. The source and drain junctions are observed as thin, bright lines of low conductivity. A section made through the source region of the transistor is also shown in Fig. 8. The section shows from left to right: the dielectric top layer, source implant (p-type), junction peak, well (n-type), and substrate. The junction depth can be easily extracted from this section as the distance between the junction peak and the dielectric top layer, and is found to be 184nm.
 Figure 10. Topography (left) and SSRM resistance (right) scan of a granular metal film. 500nm scan. |
In addition to silicon, compound semiconductors are also of great interest. For compound semiconductors, sample preparation is minimal compared to silicon — simple cleaving provides the best surface on complex samples and allows imaging of critical device properties after only minutes of sample preparation. Metal and metal-coated silicon tips prove to be sufficiently rigid for stable and reproducible SSRM measurements. For good signal-to-noise ratio, a relatively high bias voltage (several volts) in combination with a medium probe pressure (sub-mN) is required.
An example of the high-resolution carrier density profiling available with SSRM can be seen in the cross-sectioned InP-based heterostructure shown in Fig. 9. The resistance image (on the left) shows the different regions of the heterostructure (alternating Zn-doped p-type and S-doped n-type layers with different thickness values). The image reveals the 2-D nature of the layers toward the mesa area.
Conductivity mapping of other materials
SSRM can also be used for studying the electrical properties of nonsemiconductor materials. This includes applications for metals, semimetals, conductive polymers, and other intermediately conductive materials. For optimal performance, different materials often require different probe material and force setpoints.
In the example in Fig. 10, a Cu film is imaged. The granular structure of the film is clearly observed in the topographic data. The SSRM resistance data show that the resistivity of the grains is higher toward the edges, as compared to the center of the grains. Note that the average grain size is 30nm and the spatial resolution is on the order of 5nm.
Conclusion
Three new applications extend the capabilities of SPMs to the measurement of electronic properties. SSRM allows imaging of variations of sample resistivity or conductivity over a high dynamic range. Using SCM, the variation in carrier concentration inside silicon and compound semiconductor structures can be imaged through measurement of the dC/dV signal of the MOS capacitor formed by the probe and the semiconductor sample. The TUNA module allows measurement of ultra-low currents flowing through the tip to the sample held at a fixed DC bias. The capabilities are available as modules that can be easily installed and exchanged, allowing a wide range of measurements on the same SPM tool.
Acknowledgments
We are thankful to many people and laboratories around the world for providing the samples used in this work: T. Ahmed (Seagate, Minneapolis, MN), Ch. Ganpul and M. Ramesh (University of Maryland), M. Geva (Lucent Technologies), S. Landau (University of Frankfurt, Germany), A. Olbrich (Infineon, Munich, Germany), and W. Vandervorst (IMEC, Leuven, Belgium).
For further information, contact Peter DeWolf at Digital Instruments/Veeco Metrology Group, 112 Robin Hill Road, Santa Barbara, CA 93117; ph 805/967-2700, e-mail [email protected].