Technology News
08/01/2000
Sandia researchers produce tiny canals on chips with new technique
Researchers at Sandia National Laboratories, Albuquerque, NM, have created a new microchip processing technique that creates raised microscopic canals on chips through which liquids or gases can flow from one chip feature to another (see figures). This concept is useful for emerging families of minuscule gadgets called microfluidic devices that make use of the chemical properties of liquids or gases and the electrical properties of semiconductors on a single chip or among nearby chips.
Carolyn Matzke of Sandia's Compound Semiconductor Research Laboratory says, "The technique's compatibility with standard semiconductor batch-processing tools should allow future microfluidic devices to be made quickly and cheaply in a semiconductor factory."
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At Sandia, researchers have created raised, hemispherical canals, 8-100mm in diameter, on silicon, glass, and quartz. They have also made canals with tight turns, creating hairpin curves with radii as small as 8mm. The canals can be small enough and curvy enough so some liquids or gases pass easily through them and others pass more slowly. This ability to distinguish among fluidic materials is useful for chemical-separation applications, the most common emerging use of microfluidic devices.
The traditional method for creating canals on chips — called "trench and seal" — involves the careful joining of two pre-trenched wafers. But the 1000°C required for bonding can damage other chip features, and the care necessary to remove particles from the two halves increases the difficulty and cost of manufacturing.
To make the Sandia canals, researchers pattern a thin layer of photoresist on a wafer using conventional photolithography. Then they heat the wafer to 100°C for about 20 sec; this causes the photoresist lines to slump into hemispherical shapes. A 2mm-thick film of silicon oxynitride is deposited over the rounded photoresist. Finally, the wafer is soaked in an acetone bath until the remaining photoresist is dissolved, leaving hollow tunnels. Researcher Carol Ashby says, "The technique is 10 to 100 times faster than trench-and-seal techniques, and the resulting tunnels are virtually indestructible."
Terry Michalske of Sandia's Biomolec-ular Materials and Interfaces Depart-mnt, says, "Ultimately the technique could result in better detectors for air or water pollutants or for chem-bio warfare agents [e.g., one goal of Sandia's "microchem-lab-on-a-chip" development programs]. The low-temperature processing might allow fragile organic materials with useful properties to be integrated into the microfluidic devices."
Canal networks also could be used to separate and analyze DNA for crime-scene forensics, or proteins for biomedical research that seeks to understand human responses to toxins or diseases. In the pharmaceutical industry, such devices could help develop better drugs by analyzing responses of hundreds of proteins simultaneously.
"You could envision an elaborate microfluidic network on a chip that sorts, detects, and identifies individual chemicals or proteins," Michalske says. "Microfluidic channels might be embedded with electronic controls, micromachines, or novel materials to create an electrokinetic pump or tiny valves or filters. They could deliver cooling fluids to hot spots on today's tightly packed microchips. Or they might help create on-chip insulators that reduce electrical cross talk. We're now just beginning to think about all the potential applications for microfluidic devices using this technique," he says. Sandia researchers are now working to integrate the new canals with other microelectronic and micromechanical features. — P.B.
ARS 2000 encourages maskmakers to share the value added
With the semiconductor industry clearly in a recovery from its 1998 trough, the photomask industry seems to be well on its way with the application of reticle enhancement techniques (RETs) with existing (i.e., 248nm wavelength) deep-UV optical lithography at and beyond the 180nm technology node. This theme was clearly evident at the Advanced Reticle Symposium 2000 (ARS 2000) held June 6 in San Jose, CA. ARS 2000 was sponsored by Ultratech Stepper, KLA Tencor, Photronics, DuPont Photomasks, semiconbay.com, Numerical Technologies, and Solid State Technology and Microlithography World magazines.
At recent ARS symposia, the concern was over reticle making needs for next generation lithography methods, the ramping of RET (i.e., optical proximity correction, OPC, and phase shift masking, PSM) capability in the reticle industry, and who was going to pay for the associated developments needed. Presentations at ARS 2000 indicated that such concerns have lessened.
 Figure 1. Photomask volume forecast from the renewed growth cycle started in 1999. (Source: Rinnen, Dataquest) |
Addressing ARS 2000 attendees, Klaus-Dieter Rinnen, director of semiconductor manufacturing analysis at Gartner Group's Dataquest, said, "Our forecast of photomask unit volume shows that you are in a renewed growth cycle that started in 1999." Rinnen's plots showed mask volume rising steadily from 740,000 in 2000 to 900,000 in 2003; the percentage of these for below 180nm IC fabrication rises from ~2% in 2000 to ~10% in 2004 (Fig. 1). The Dataquest photomask revenue forecast shows a healthy long-term growth, following the 1998 decline, reaching near $4.5 billion by 2004, up from $2 billion in 2000.
 Figure 2. Value of subwavelength technologies. (Source: E. Chen, Chase H&Q) |
Addressing the industry's clear ramping of RET application, keynote speaker, Buno Pati, president and CEO of Numerical Technologies, said, "We are in the era of subwavelength lithography with the practical application of RET. This has created an enormous value for the semiconductor industry through photomask makers; photomasks have gone from commodity items to technology enablers." Pati's challenge to photomask makers was to come up with "a proactive plan to reflect this value back into the photomask industry." He offered the argument that because photomask suppliers have been taking on the associated risks, there is now an opportunity to change the business model. "There has to be more industry collaboration to share the value that has come with today's photomask technology," he said. (Read more of Pati's views in Industry Insights on p. 184.)
Rennin advised photomask makers to "grasp the chance to be an active element in lithography, master the cost and manufacturing challenges of OPC and PSM, master the cost challenge to provide the lowest cost solution to lithography problems, and realize the opportunity of value-based pricing." He added, "Align yourself with integrated device manufacturers (IDMs) and foundries and go beyond the mask-shop concept to the role of a solutions provider."
While NGL is still perceived as needed in the future, the current accelerating rate of change in lithography is in the optical arena, noted ARS 2000 chair, David Markle, CTO at Ultratech Stepper. Markle said, "Optical's 193nm lithography will be pushed to the limit using a wide variety of mask and illumination tricks. The next lithography will likely be 157nm lithography, but substantial hurdles remain." At the 50nm node an NGL technology will be required; the throughput advantages appears to be with extreme UV and e-beam projection lithography.
Dan Schurz provided ARS 2000 attendees with solid data that 157nm R&D is progressing, showing impressive SEMS of 130 to 110nm results. Schurz said, "These SEMs, which are from our first 6in. x 6 in. x 0.250in. patterned reticle, have been done without the stepper optics and illumination fully quantified (i.e., the Ultratech 157nm Microstep-per). We have found that fluorine-doped dry fused silica photomask blanks and standard chromium oxide thin films meet the requirements for reticle substrates at 157nm."
 Figure 3. Attractive results from early work with 157nm lithography. (Source: Schurz, Ultratech Stepper) |
Many of the "papers" presented at ARS 2000 addressed defect printability when applying RETs in advanced maskmaking. Linard Karklin of Numerical Technologies, said, "While in the past it has been 'inspect all, repair all,' with PSM a more viable approach in today's market is to 'inspect all, repair what prints.' This approach bases the quality of a photomask on the quality of the wafer results, not only on the quality of the photomask itself." Here, software modeling is going to play a very significant role. Karklin described results from a newly developed software module, based on simulation capability of the Virtual Stepper System, that can provide real time advanced defect printability analysis of attentuated PSMs. "This type of knowledge is crucial to ensuring that the right amount of intervention is applied to reticle quality issues. Spending time and effort inspecting, classifying, and repairing defects that do not impact the wafer result is no longer acceptable."
Similarly, Anja Rosenbusch, VP of US operations, Sigma-C, Campbell, CA, discussed how simulating RET effects in optical lithography, gives lithographers "strong assistance" in optimizing edge topography of alternating phase shift masks.
While the focus at ARS 2000 was clearly practically applied RET in maskmaking, attendees were given a view of the current state of NGL mask technology. David Walker from the Next Generation Lithography Mask Center of Competency (McoC) reported, "The early results show that similar image size uniformity and image placement can be achieved on the different mask types. This work is ongoing with modeling of the critical factors affecting image size and placement." McoC is the first independent commercial mask supplier dedicated to the development and manufacture of NGL masks and reticles; it is a partnership between Photronics and IBM, formed to accelerate development of manufacturing technology for all NGL candidate reticles. — P.B.
Selete: Two e-beam litho efforts, second-phase 300mm project underway Japan's Selete (Semiconductor Leading Edge Technologies Inc.) consortium has begun a feasibility study of e-beam projection lithography for the 70nm to 50nm nodes, and says e-beam direct write lithography is "almost ready" for the 130nm node.
Selete officials disclosed the e-beam development work, along with an update to its 300mm tool evaluation effort, at the Semicon Kansai gathering held May 31 to June 2 in Osaka, Japan.
For the e-beam direct write lithography, Selete said it has made good progress with exposure tool, mask, and resist development, though resolution enhancement at a larger current, stitching and overlay accuracy improvements, and a faster resist with higher resolution are needed.
In a presentation at Semicon Kansai, Selete said e-beam direct write lithography will "survive as the technology for advanced device development and as the versatile technology for small volume production." Industry observers note that e-beam direct write for wafers, along with e-beam mask writing, face significant throughput challenges. Looking ahead, throughput will become an even greater obstacle as circuit geometries shrink.
In addition, the Yokohama-based consortium has begun a feasibility study of e-beam projection lithography, with plans to start a full-scale program this year targeted at low-cost production for the 70nm to 50nm node.
Meanwhile, Selete has begun in earnest its 130nm/300mm Program, a successor to its four-year old 300mm program. The purpose of the 130nm /300mm program is to accelerate development of equipment and materials for the 130nm node, the device generation at which many chipmakers plan to be using 300mm tooling.
Rohm has joined the development effort, bringing the total number of member companies to 12. Other participants include Fujitsu, Hitachi, Matsushita, Mitsubishi, NEC, Oki, Toshiba, Sanyo, Sharp, Sony, and Korea's Samsung. The program will run through March 2003.
Selete's initial 300mm program, which was targeted to aid development of a full set of 300mm equipment and materials for the 0.18mm node, was completed at the end of March, said H. Komiya, executive vice preseident and chief operating officer of Selete.
In a final update to the first phase of the 20 billion yen (about US$185 million) project, Selete said a total of 137 units of 300mm equipment were evaluated. Generally speaking, evaluation results showed 300mm equipment performance at nearly the same performance level as 200mm equipment.
Separately, during the Semicon Kansai exhibition, International Sematech and Selete unveiled the second edition of the "Unified Equipment Performance Metrics for 130nm Technology" document, which includes 12 new process equipment types and 28 revised process equipment types. The first edition was published in November 1999. The 2nd edition is available from both organizations.—Staff reports
LSI processes/design to be studied under MITI
LSI design and process technologies were the hot topics discussed at the Workshop on Semiconductor Technology for the 21st Century, held recently in Tokyo. The symposium was sponsored by the Japanese government's MITI (Ministry of International Trade and Industry) and NEDO (New Energy and Industrial Technology Development Organization). NEDO is an MITI affiliate that funds energy related research in Japan.
The goal of the conference was to establish a consensus between the government, industry, and universities on the research themes for LSI design and process technologies over the next five years. Prof. Komiyama, University of Tokyo engineering dean, emphasized the need for a process technology knowledge base.
An emphasis of comprehensive research on both low k and high k materials and their applications to next-generation LSIs was discussed, as well as a proposal to increase the collaboration between industry and universities.
For lithography, the main theme will be research and implementation of F2 lithography as well as EPL using electron beams.
Another goal of the conference was to begin planning for the ASCA (Advanced System-On-Chip Acceleration) Project. ASCA, rumored to start next year, is a national project for MITI that is expected to strengthen the Japanese semiconductor industry.
Tentative ASCA member companies include: NEC, Toshiba, Hitachi, Fujitsu, Mitsubishi, Matsushita, Sharp, Sanyo, Sony, Rohm, and Oki. The proposed name of the research center is Next Generation Semiconductor Research Center. The center will be based in Tsukuba Science Park City in Ibaraki Prefecture.
MITI has already received 16.5 billion yen (approximately US$ 1.5 billion) from MOF (Ministry of Finance) for the construction of the center building, equipped with cleanrooms.
Separately, the president of Sony Core Technology and Network Company, Mr. Nakamura proposed that research be done on minifabs that employ single-wafer processing and single chambers (instead of multichambers). The minifab would have a production capacity of only a few thousand wafers a month.
MITI has reportedly approved the development of the minifabs to be a research topic within the ASCA national project.
Tech Briefs
Fujitsu Microelectronics says it will introduce a 0.11mm gate length ASIC process capability in the 3Q01. The chipmaker hasn't demonstrated the process to outside customers yet, but says it incorporates shallow trench isolation techniques, CMP for all planarization, and CoSi2 for transistor gate and source drain. The all-copper process also includes a spin-on dielectric material. Initial products using the process will support devices with as many as 56 million gates/chip.
International Sematech, Austin, TX, Carl Zeiss, Oberkochen, Germany, and the Extreme Ultraviolet LLC — an industry consortium that includes Intel, Advanced Micro Devices, and Motorola — are collaborating to build a small-field, two-mirror, high numerical aperture camera at the EUV Virtual National Laboratory. The optics will be used for laboratory demonstrations of scalability of EUV lithography to 30nm and below.
Photronics Inc., Jupiter, FL, and ASM Lithography (ASML), Veldhoven, The Netherlands, have agreed to cooperate in developing reticles for 0.1mm imaging technologies. The pact, the companies say, reflects the need for tighter integration of reticles and lithography systems in producing features increasingly smaller than the wavelength of the light used to produce them.
Under the agreement, ASML will provide patterns to be imaged onto reticles by Photronics' R&D team. Those reticles will be used to test ASML 248nm and 193nm lithography systems. With those systems, ASML chief scientist Bill Arnold expects to push the limits of optical lithography to production of feature sizes between 70nm and 50nm.
The joint effort will first focus on binary, chrome-on-quartz reticles employing ASML scattering-bar enhancements, then will extend to embedded attenuated and etched quartz phase-shift enhancements. Wafer results will be evaluated at both companies' facilities and at those of IMEC, where both companies are members. Nakamura also unveiled a new single wafer cleaning system that Sony has developed, which uses only ozonized water and hydrofluoric acid. — Staff Reports
Sandia National Laboratories has licensed the rights to manufacturing processes for LIGA micromachining technology to AXSUN Technologies, a Billerica, MA, photonics subsystems provider. The LIGA (lithography, electroplating, and molding) process makes parts that range in size between surface silicon micromachining and precision machining, in metals, metal alloys, plastics, or ceramics. It can produce straight and smooth vertical sidewalls as high as several millimeters. AXSUN's agile photonic subsystems utilize micromechanical alignment structures fabricated using the LIGA process. These subsystems manipulate light, through tuning or switching signals at the optical layer, increasing the usefulness of optical telecommunications networks. AXSUN intends to establish a LIGA foundry in the Livermore, CA, area to meet its own needs and those of its customers.
DARPA and the DoD are renewing an $850,000 grant to Symyx Technologies Inc. to support its continuing research focused on discovery of thermoelectric materials using the company's high-speed discovery technologies. Thermoelectric materials are solid-state heat pumps that provide temperature stabilization and cooling without noise or vibration. These materials are reliable and environmentally benign because they lack moving parts and do not require CFC refrigerants. Improved thermoelectric materials would appeal to a broader range of markets, including CPU cooling chips. Through previous DARPA grants, Symyx has developed high-speed synthesis and screening technologies capable of testing hundreds of candidate materials at one time.