Process development based on copper and low-k dielectric metrology
08/01/2000
Arun R. Srivatsa, Carlos L. Ygartua, Steve Weinzierl, Walter Johnson, Torsten Kaack, KLA-Tencor Corp., San Jose, California
overview
Copper and low-k processes require metrology using a variety of automated tools currently employed in the IC fab environment. Recent applications development work described here includes measurement of thin film properties with spectroscopic ellipsometry tools, etch depth measurement and CMP monitoring with high-resolution profilometers, resistivity measurements, and Cu contamination analysis with the corona-oxide-semiconductor technique.
Device shrinks, along with performance requirements, necessitate that the industry move toward interconnect technology based on Cu for metallization and the use of low-k materials for interlayer dielectrics. Successful adoption of these newer materials and process technologies requires "routine" monitoring methods for both simple and complex film structures and processes. To a large degree, metrology applications are being developed to satisfy these requirements by using existing tool sets or their evolutions. The introduction of new interconnect technology also imposes unique requirements, such as the need to monitor Cu contamination. The potential integration over the next few years of porous ultralow-k materials with dielectric constants below 2.0 will introduce added complexity.
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With more development fabs reporting improved copper yields, the industry appears to be on track for the large-scale adoption of Cu-based technology at the 0.13µm level. The evolutionary path for Cu and low-k technology integration is user-dependent and varied. Many users are initially focusing on Cu integrated with oxides and oxide-like materials with dielectric constants above 3.0. A few are also working on the integration of low-k materials with Al before switching to Cu. The low-k materials can be broadly classified into three categories: a) spin-on dielectrics such as BCB, SiLK, and FLARE; b) CVD films such as Black Diamond, Coral, SiOF, and BLOK; and c) ultralow-k porous films such as xerogels and aerogels. While the race in the near term is between the spin-on and CVD dielectrics, porous films will be required in the longer term for dielectric constants below 2.0.
The utilization of appropriate defect inspection and metrology technologies is critical to the maximization of yield. The technology challenges for inspection and metrology using Cu and low-k materials are varied and, in some cases, considerably different from those experienced in Al-based processing. Applications reviewed here include monitoring film quality and reproducibility in complex multilayered structures, measuring etch depth in moderate- and high-aspect-ratio structures, measuring dishing and erosion from CMP, monitoring resistivity changes in the metal due to room temperature annealing, and detecting copper contamination in oxides and silicon.
Monitoring film uniformity and quality using spectroscopic ellipsometry
With the introduction of production systems, spectroscopic ellipsometry (SE) has emerged in the past five years as a powerful nondestructive technique widely used throughout virtually all areas of the fab to monitor a variety of thin-film processes. Using this technique, rapid and robust measurements can be directly carried out on patterned wafers through the different stages of device fabrication [1-5]. In the following sections, we discuss some recent applications of this technique relevant to Cu and low-k processes.
Spin-on ILDs: monitoring the cure of SiLK with spectroscopic ellipsometry
SiLK is one of the promising candidate materials being studied for inter-layer dielectric (ILD) applications. The mechanical properties of this material, like most of the spin-on candidate materials, are dependent on the degree of cure. It is therefore critical to monitor the cure using a nondestructive technique. To determine the usefulness of SE for monitoring the cure process, we analyzed a time-temperature annealed wafer set provided by researchers from Dow Chemical, the developers of SiLK. The goal was to study the variation of optical dispersion — refractive index (RI) vs. wavelength — as a function of the degree of cure to determine the most sensitive regime for monitoring the process.
Wafer thicknesses, annealing conditions, and measurement results are summarized in the table on p. 55. The thickness of the SiLK films for all wafers was around 7300Å. A Bruggeman Effective Medium Approximation (BEMA) model was used, and the measurements were carried out on a thin-film measurement production SE system. Dispersion characteristics of the SiLK were also independently validated by analysis of spectra from a research grade spectrometer (GESP-5) using variable angle spectroscopic ellipsometry.
Before annealing, all samples, including the control, were exposed to a soft bake at about 320°C. The effect of the annealing was most pronounced on the optical properties of the SiLK in the wavelength region around 300nm, especially at 314nm. The variation in the dispersion (n, the real component of refractive index) profile in this region for three different anneal conditions is plotted in Fig. 1a. This shows that there are two peaks, both of which decrease with increasing cure. A consistent, gradual change in index is observed for the more extensive time-temperature anneal data summarized in the table. The effect of the anneal on the index at 314nm is also clearly seen in the plot in Fig. 1b, which includes a subset of the data from Table 1 showing the variation of the index with annealing time at a constant temperature. From this, it is seen that 314nm is best suited for monitoring the cure of SiLK. The total magnitude of the change in RI is around 0.08 at 314nm. While this is large enough to monitor the cure process in production systems, more statistical experiments need to be carried out to determine the repeatability of the cure process and the degree of resolution of the cure.
Measurement of multilayered dielectric film structures
 Figure 2. Dielectric film stack on copper with targeted thicknesses indicated. Wafer contour maps for the individual layers are shown on the right. |
The following applications examples illustrate multilayer measurement capability using SE. A seven-layer dielectric film stack was built up from the silicon substrate with the following target thicknesses: Si/oxide (5500Å)/nitride (1000Å)/BCB (7000Å)/oxide (1000Å)/nitride (1000Å)/ BCB (7000Å)/oxide (1000Å). The uniformity of the layers on this 200mm wafer was evaluated by doing a wafer map with a 10mm edge exclusion zone using a production SE system. In order to avoid correlations in this multilayer measurement, the thickness of the middle oxide layer was fixed. The thicknesses of the other six layers and the index of the bottom BCB layer (a total of eight parameters) were measured. As reported previously [5], the measured thicknesses are in line with the nominal thicknesses, and the ranges are consistent and similar to the thickness range observed for a three-layer stack with a single BCB layer.
Multilayer measurement capability on Cu is illustrated in Fig. 2.
A four-layer film stack with oxide/nitride/oxide/nitride on Cu was measured using a production SE system. The Cu layer in this case is thick enough to absorb light and serve as an "effective" substrate. Contour maps of all the layers were simultaneously obtained, with an edge exclusion zone of 6mm. As seen in Fig. 2, the contour map provides a means for mapping the deposition reactor "signature" profile. The contour maps for both of the oxide layers, which are formed on top of nitride layers, have similar characteristics. There are some differences between the two nitride contour maps, possibly due to the differences in deposition of nitride on Cu and nitride on oxide. The thicknesses of all of the layers were determined correctly (verified subsequently by cross-sectional analysis) despite the fact that nominal thicknesses were not provided prior to the measurement. The robustness of the measurement was also verified using a standard "precision" test — 30 repeated measurements without moving the wafer. The standard deviation (1o) for each of the layers was less than 0.15Å for a simultaneous measurement of all four layers.
Porous films — measuring void fraction
In order to achieve ultralow-k dielectric constants (<2), it appears to be essential to create a porous film by creating voids in the material. The dielectric constant of the films is a strong function of porosity. Further, the mechanical properties of these films depend on factors such as total porosity, pore size, and pore distribution. Nanoglass is an example of a porous, SiO2-based film. This type of material is typically formed by spin coating. A simple two-term BEMA model containing silicon dioxide and void can be used for the analysis of Nanoglass. The void fraction or porosity can be directly derived by analysis of the sample spectra using such a model.
Analysis of several Nanoglass samples revealed a linear relationship between the refractive index of the film (reported at 633nm) and the void fraction, as shown in Fig. 3. By measuring the RI of the film, it is possible to determine the void fraction. For Nanoglass and xerogels, the pore size and pore distribution are parameters of interest. While SE is extremely sensitive to small variations, a systematic study needs to be undertaken to determine whether these additional parameters can be monitored using this technique.
Monitoring the oxidation of copper
The presence of copper oxides can degrade adhesion between copper and silicon nitride. The oxidation state of Cu can be easily monitored using SE. There is a substantial difference between the optical dispersion plots for copper, cuprous oxide, and cupric oxide, as shown in Fig. 4. Therefore, by monitoring the dispersion of the film, it will be possible to identify the presence of either a pure single phase or mixtures of phases.
Etch depth using a high-resolution profilometer
Etch metrology most often addresses critical dimensions (CDs) and depth of the etched features. Scanning electron microscopes (SEMs) have been widely used to monitor both parameters. While appropriate for CD measurements, SEMs are cumbersome for etch depth measurements because of the need for cross-sectioning wafers. Atomic force microscopes (AFMs) have been proposed as solutions but have had limited success because of their limited lateral and vertical measurement ranges, low throughput, and short probe life.
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High-resolution profilometers (HRPs) are now available with a "dipping mode" of operation that permits etch depth measurements at about 4:1 aspect ratios for a 0.18mm line. In this mode, a sample is scanned in a series of discrete steps. The stylus is lowered to contact the sample surface, and a data point is obtained. The stylus is then lifted from the surface to a specified height and moved laterally to begin the next cycle. Since the stylus is not in contact with the sample during lateral motion, it is subject to negligible shear forces, permitting the use of a finer stylus for high-aspect-ratio measurements. The correlation for the HRP measurements to etch depth measurements by SEM (R2 = 0.9992) and RMS roughness measurements by AFM (R2 = 0.9996) is very good.
For Cu-based dual damascene processes, one of the important process steps is etch. Dual damascene etching is not only a timed process, but also pattern density-dependent, so it requires in-line metrology. HRPs have been used successfully as in-line etch depth monitors in dual damascene processing. In the scanning mode, an image of the scanned area can be produced by rastering the scanned surface. A high-resolution image of a post-etch dual damascene structure is shown in Fig. 5a. For production etch depth measurements, a simpler and faster measurement procedure can be implemented leading to measurements such as the one shown in Fig. 5b.
HRP for CMP metrology
The CMP process is strongly affected by feature size and density. Polishing a surface consisting of a single material is easier than polishing a surface that consists of different materials spaced at different step coverages. The key CMP monitor parameters include plug recess, dishing, and ILD erosion.
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The use of the HRP to measure erosion and dishing is illustrated in Fig. 6. In Fig. 6a, a 2-D scan shows the difference in oxide thickness between the field oxide and the oxide in the array. This difference, termed erosion, stems from the fact that the oxide in an array of metal is typically removed at a higher rate than the field oxide. Similarly, metal-filled features such as pads and dual damascene structures surrounded by ILD will have a higher erosion rate. The difference in step height between the oxide in the array and the metal inside the feature is called dishing. An HRP 3-D scan, shown in Fig. 6b, illustrates the copper dishing following a CMP process. The presence of residual barrier layer material is also seen.
Room-temperature Cu annealing
Sheet resistance measurements have been used routinely to monitor the thickness uniformity of metal films. Knowledge of the resistivity of the film being measured is inherent to the measurement of sheet resistance. The film resistivity is a strong function of the grain size of the film. Due to the rapid diffusion of Cu, significant grain growth can occur even at room temperature.
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RIGHT. Figure 6. a) Long HRP scan to measure post-CMP oxide erosion, b) HRP image of tungsten plugs in a high-density array, showing plug recess.
It has been observed that the grain size of a nominally 1.6µm-thick film "annealed" at room temperature changes from about 0.1mm 24 hours after plating to about 1mm 48 hours after plating [6]. Further, the transformation time is a strong function of film thickness. It is seen that thinner films take substantially longer to transform than thicker films. To obviate this issue, appropriate annealing treatments need to be carried out as part of a standard metrology procedure prior to sheet resistance measurement for determining the thickness of Cu films.
The FIB micrographs in Fig. 7a show the grain size increasing over a thickness range of 100-1500nm. These films had been fully annealed to stabilize the grain growth. This grain growth leads to a gradual reduction in film resistivity, illustrated in Fig. 7b. The resistivity for a polished layer of equivalent thickness to a plated layer is lower. This difference is believed to be mainly due to the initial plated thickness and correspondingly larger grain size of the polished layer. Clearly, the performance of the finished device depends on the resistance of the interconnect layers. The resistance can change based on processing history, requiring careful control and monitoring of the metallization process.
Contamination detection
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Due to the presence of mid-gap states, copper has a detrimental effect on the lifetime of carriers in silicon. Coupled with the high diffusivity of Cu, potential contamination of silicon is of serious concern in copper development. Currently, total reflection x-ray fluorescence is used to sample sites on monitor wafers for copper contamination. It is estimated that measurement of a single site about 1cm in diameter takes about 15-30 minutes. A full wafer map takes considerably longer, of course.
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Figure 8. Map of high-injection bulk recombination lifetime (in microseconds) of a Cu-contaminated wafer. Uncontaminated, high-quality wafers typically have lifetimes in excess of 1200 microseconds.
An alternate full-wafer measurement technique with high throughput and sufficient sensitivity (Cu level of 1010cm-2) is required. We are currently investigating the suitability of commercial systems using the corona-oxide-semiconductor (COS) technique for Cu contamination monitoring. Such systems are being used widely in the semiconductor industry for the routine monitoring of a variety of contaminants in the wet bench and gate oxidation areas. In simple terms, this is a noncontact technique based on deposition of fixed amounts of charge and monitoring of the response of the surface voltage. An optical excitation source can be used to create charge carriers and measure the voltage response as a function of time. Using an appropriate sequence of measurements, full electrical characterization of silicon and oxide parameters can be achieved. Parameters determined include oxide thickness, total charge in oxide, effective charge near the interface, and lifetime parameters in silicon (bulk high-injection recombination, near surface generation, etc.) [7, 8].
The copper contamination investigations are currently in progress and look very promising. The potential of the COS technique for copper contamination monitoring is suggested by the results from a full-wafer high-injection bulk recombination lifetime map shown in Fig. 8. The lifetime of the carriers in a Cu-contaminated wafer is lower across the entire wafer. Similar uncontaminated wafers have lifetimes usually in excess of about 1200 microseconds.
Conclusion
We have attempted to explain many of the metrology applications issues with Cu and low-k dielectric development. Several techniques are required to monitor different portions of the fabrication process. It was shown that by careful analysis, appropriate wavelengths can be chosen to maximize sensitivity to process variations using SE. The applicability of the HRP for monitoring etch and CMP processes was discussed. Resistivity of copper films was shown to be a strong function of grain size, which can vary with film thickness and annealing conditions. We also expect noncontact electrical measurements to play a significant role in monitoring Cu contamination.
Acknowledgments
An additional author of this work is Mustafa Oyumi, currently with Portal Software in Cupertino, California.
References
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Arun R. Srivatsa received his PhD in materials science and engineering from North Carolina State University in 1989. He has worked extensively in the areas of thin film processing and characterization and is currently a senior staff technologist in the FaST Div. at KLA-Tencor Corporation. His responsibilities include developing process control solutions for the FaST Div. for Cu and low-k processes, and supporting worldwide applications development for thin film measurements. KLA-Tencor Corp., 160 Rio Robles, San Jose, CA 95134; ph 408/875-2946, e-mail [email protected].
Carlos L. Ygartua received his MS degree in physics from the University of Texas and his MS in materials science and engineering from Stanford University. He is senior staff technologist for the FaST Division at KLA-Tencor Corp. He is responsible for supporting the technical needs of worldwide applications for developing refractive index dispersion modeling and other issues related to thin film measurements. His background includes integrated circuit process engineering at Texas Instruments and National Semiconductor, in areas such as diffusion, LPCVD, and parametric test.
Steven Weinzierl received his AB in physics and computer science from Vassar College, and his PhD from Cornell University. Since then he has worked at various semiconductor equipment companies specializing in contact and noncontact electrical characterization of semiconductor and dielectric materials. He is currently a senior staff technologist at KLA-Tencor's FaST Div., where he focuses on implementing in-line process control for advanced gates combining optical and electrical methods.
Walter H. Johnson received a BS degree in chemistry from San Jose State University. He is currently the systems design engineer for metals and ion implant films at the FaST Division of KLA-Tencor. He has been a key member of the OmniMap development team for the last 15 years and continues to work on future products and improvements to the resistivity product line. Starting in 1978 at IBM in San Jose, CA, he worked on thin film process development for the magnetic bubble memory program, developed applications for IBM Instruments Inc., and coordinated the installation and operation of the characterization lab and implant facility for the Bipolar Development program.
Torsten R. Kaack received his BS in materials science from Cornell University in 1982. He is a strategic marketing manager in the FaST Div. of KLA-Tencor, with responsibility for directing the division's activities in the area of process module control solutions. From 1982 through 1989 he worked at Signetics Corp. Since 1989 he has been with Prometrix Corp., Tencor Instruments, and KLA-Tencor Corp., with primary responsibilities in applications and system development support for thin film measurement systems.