AFM's role in debug probing
06/01/2000
David Fisher, Micron Force Instruments, San Jose, California
overview
New techniques using scanning probe technology are enabling circuit designers to break the optical barrier to internal node probing. Atomic force microscopy, coupled with low load electrical probe circuitry, offers designers and failure analysis engineers the ability to probe directly on the submicron level without the use of electron beam probing and its requirement for a vacuum chamber.
With the substantial cost of IC debug during the development of a major product line, says a technology manager at a large semiconductor company, it is a little surprising that the technology for addressing debug has not maintained a pace similar to advances for wafer fabrication. There were many reasons for this gap in the past, when geometries and clock speeds did not warrant the complex test technologies. As a growing number of the previous debug methods are running out of capability, however, the industry is starting to see a resurgence of R&D investment for debug, verification, and failure analysis. Many forward-looking IC manufacturers have seen the shortfall coming and are fostering investments either on their own, through Sematech, or both.
One of the most crucial pieces of debug is internal IC electrical measurement. The equivalent of a critical dimension measurement to a process engineer, the internal node waveform is still the best method of interrogation for a verification engineer. When a problem is determined at the I/O level of an IC, and production testers start showing low yield, or when an important customer starts to see excessive field failures, one of the best methods of diagnosis is to go inside the silicon and capture vital signs.
 Figure 1. A typical 1mm etched wire probe near 0.5mm interconnect lines. |
Debug and verification (DV) techniques run the gamut of purpose: the need to pack more cells/micron in RAM, decreasing clock skew across a large silicon real estate, finding spurious latch-up events, investigating power bus bounce, excess power usage, or just simply measuring the clocking limits of the design.
Every time a microprocessor moves up 100MHz or the supply voltage of a DSP IC drops to a new level, the limits of the design get tested. Also, some of the more challenging design problems, such as skew (loss of synchronicity due to the time it takes signals to propagate through the wiring), latching voltages, noise, electromagnetic effects, thermal effects and all of the other physicalrealities, start to crop up and cause chip dysfunction. On top of these functional issues are the typical process issues such as defects, process variance, etc.
Three processes
The processes for a DV engineer to capture internal node waveforms essentially consist of microscopy, milling, and probing. Certainly, recreating the operating conditions of the device requires its own set of tools, including testers, thermal cycling tools, chip navigation software, and measurement equipment.
All of the support tools are necessary infrastructure, but the goal is still to capture a number of electrical measurements on the IC, and when the measurements are out of specification, the search must begin to find the root cause of the problem.
Today, optical microscopy is being rapidly replaced with electron and ion beam microscopy. While laser milling has shown promise in specific applications, focused ion beam (FIB) technology dominates in functionality when it comes to precise milling for internal node measurements.
 Figure 2. A typical AFM tip shown inverted (interestingly imaged via scanning electron microscopy). |
The most common tool in use for internal probing is the venerable probe station. Equipped with an optical microscope, an xy stage for moving the device around, and a number of micro-positioners housing conductive wire probes, the probe station has been the mainstay for extracting waveforms from ICs. The probe station has been around for decades and thousands of them are in use today. The problem with these stations, whose primary technical strength is mechanical precision, is that their usefulness in internal probing has decreased dramatically as internal IC conductor geometries have shrunk below 1mm in width. With shrinking devices causing increased clock speeds and decreasing voltages, the probing aspect of DV has suffered from three critical shortfalls:
- Geometries are too small to see where to place a probe.
- Probes are too large to land selectively on a single feature; they can cause fatal physical damage to a device.
- The probe is electrically invasive to the circuit.
 Figure 3. AFM image of the 0.5mm metal traces shown optically in Fig. 1. |
As the device geometry shrinks below 1.0mm, the large tip diameter of needle and wire probes pose significant electrical contact problems. For sub-0.5mm circuit elements, contact with specific interconnect lines becomes almost impossible. As an example, Fig. 1 shows a photomicrograph of a typical etched-wire probe with a tip 1mm in diameter and a set of three 0.5mm interconnect lines with a 0.5mm spacing. This micrograph was taken with a Mitutoyo microscope having a 50x objective zoomed 2x.
The size of IC elements making up many ICs is under 0.25mm and cannot be seen using probe station optical microscopes. Under an optical microscope, even at substantial magnification, two 0.25mm devices, positioned 0.25mm apart, still cannot be resolved (most probing applications require a focal distance of greater than 10mm to allow physical access under the microscope objective for the needle probes and other accessories). Thus, microelectronic circuit elements are typically of a size where optical imaging systems are no longer capable of the resolution needed to place probes on the measurement point of a device under test.
These problems are not new, and, over the past 20 years, alternative technologies have been developed to assist in overcoming the associated challenges. For example, most prominent in non-probe station DV tools is the electron-beam prober. It was primarily developed to address the critical problems listed above, but it too has limitations. For example, an e-beam prober operates in vacuum, presenting the DV engineer with the added burden of building specialized test fixtures to get stimulation into the vacuum chamber for the device and heat out. In addition, an e-beam can only provide a relative voltage without a calibration source and suffers from limited accuracy at low voltage levels.
The beam itself creates a charging of the circuit that can alter measurements. Most important, however, is that e-beam probing has never enjoyed customer adoption at the scale that probe stations have, largely because of the significant cost of ownership.
 Figure 4. In this AFM image of an SRAM, the "cotton ball"-looking structures are the tops of vias that can be probed directly. |
Electrical probing on today's devices can cause physical damage when the probe contacts an interconnect. The probe can also be electrically invasive to the circuit. A number of design rules ago, a reasonable electrical measurement could be achieved by simply placing a wire or needle probe onto an internal feature and then hooking the other end of the wire to an oscilloscope. The problem is that the wire itself is not an ideal conductor and has significant capacitance, inductance, and resistance built in. It can also make for a pretty effective antenna under the right conditions. With today's clock frequencies, and tiny transistor size, when you add the capacitance of the wire to a small high speed circuit, the loading of the wire can completely overwhelm the circuits ability to drive it. What you see on the oscilloscope, appearing as a very slowly rising edge, may be nothing more than the indication that you have loaded down the circuit with your probe.
To get a sense of the magnitude of the problem, consider today's microprocessor running at an internal clock frequency of 1GHz. An internal circuit may have sub-100psec rise times and drive loads with <100fF of capacitance. A typical needle probe connected to an oscilloscope may present several pFs of loading. Specialized active probes may even present as much as 0.1pF of loading, over twice as much as the entire load of the circuit.
The AFM
Coupling an atomic force microscope (AFM) to a micromachined circuit probe platform provides new submicron probe capability that may provide DV engineers with a cost-effective approach to tackling the three critical problems listed above. This approach has the added benefit of maintaining some of the investment previously made in probe stations if it can retrofit to an existing probe station, allowing the DV engineer to add a powerful new microscopy tool to a familiar environment and protect the investment already made.
 |
To review briefly, a scanning probe, such as an AFM, operates by measuring the deflection of a micromachined tip on the end of a weak spring or lever as it scans over a surface. The method of operation is very similar to a phonograph, where the deflection of the needle as it scans the surface of the vinyl is converted to electrical signals to produce music. In the case of the AFM, the needle is many orders of magnitude smaller, and the deflection is used to produce topographic or surface information instead of music. As you raster the needle back and forth over a surface, you are able to define the three-dimensional image of the surface. Most AFM tips are micromachined from silicon and have a tip with a radius of about 10nm (Fig. 2).
Using an AFM instead of the optical microscope to reveal the set of 0.5mm metal traces shown in Fig. 1, which we want to probe, yields a dramatically different image (Fig. 3). Resolving the features is now quite feasible, and the AFM has considerable resolution left to zoom into even smaller features. Thus, in probing applications, the AFM does a good job of eliminating the problem of seeing where you are, and it does it in ambient air.
By processing the silicon-based micromachined tip to be conductive, the same tip used for image creation can also be directly used to make ohmic contact with the device. The advantage of using the AFM technique to solve the microscopy problem is that it allows dual use of the tip. It can be used for both a microscope and a micromachined "wire" probe. To make the tips electrically conductive, a number of processing steps are applied to the silicon tips, with special concern to make the tips as durable as possible, and to have minimal capacitance and resistance.
Compared to the traditional wire probes, micromachined AFM probes are a number of orders of magnitude smaller and, most important, an order of magnitude smaller than the features they are attempting to probe. For example, the probe shown in Fig. 2 can be used to image 10nm features.
Perhaps the greatest advantage, however, is that the touchdown of the probe to the surface of the device is all done under computer control. This allows the contact force of the probe tip on the circuit to be controlled precisely, eliminating damage to small interconnects. Because the AFM gathers precise positional information when it images the device, the system can use that same positioning information to position the probe on the device with a click of the mouse. Figure 4 shows the surface of an SRAM — with ~180nm feature sizes that were state-of-the-art for late 1999 — where individual cells can be probed to verify open conditions.
Addressing the invasiveness of electrical probing, the minuscule size of the AFM is again an advantage. The capacitance of the probe — assuming the micromachined lever is connected to a high-impedance, ultralow-capacitance signal path — is proportional to its surface area times the inverse of distance from the circuit. With the micromachined lever representing a surface area of <5000mm2, and with the application of some very high-speed, high-impedance conditioning electronics, it can be made to appear to the circuit as close to noninvasive. Comparatively, the conventional needle probe presents surface areas to the circuit 10-100 times larger.
When applying AFM to electrical probing, it is important to realize that not every application is the same; it is important to have a solution for all aspects of electrical probing, as well as for all aspects of chip interrogation. Uniquely, AFM allows the electrical and physical characteristics of the probe tips to be interchangeable by the user (Fig. 5). Using this modular approach to probing, a single probe system can be used for digital and analog, high speed or high power, low noise, DC, difficult access, and high longevity applications. The modular tip assembly and an example of various tips and their uses are shown below.
Conclusion
The challenges for AFM probing are more centered around the application of electrical probing than that of imaging or microscopy. AFM imaging has already proven feasible for imaging down past the 10nm level. In addition, further development efforts center around the use of this technology for flip chip and other backside probing, the use of multiple probes in a small area, and even further developments in noninvasiveness. The noninvasiveness aspect is perhaps the most interesting. Techniques under development today show promise of reducing the loading to the circuit down to <1fF. Loading at this level allows for signal testing in the tens of GHz range without running into invasiveness issues. With the boom in telecommunications, mixed signal, and wireless ICs on the horizon, AFM probing technology has the decided advantage of assisting DV engineers to keep debug lab time at a minimum. n
David Fisher holds a degree in electrical engineering from the University of Victoria, Canada, and an executive MBA from Stanford University. He is president of Micron Force Instruments, 2694 Orchard Parkway, San Jose, CA 95134; ph 408/432-3980, fax 408/432-3974, email [email protected].