Technology news
05/01/2000
Nitrogen put in GaAs for solar cells
Scientists at Sandia National Laboratories are looking at ways to use a new semiconductor alloy—indium gallium arsenide nitride (InGaAsN)—as a photovoltaic power source for space communications satellites and for lasers in fiber optics. The addition of 1-2% nitrogen in gallium arsenide dramatically alters the alloy's optical and electrical properties—it reduces the material's bandgap energy by nearly one-third. Sandia's Eric Jones says, "The new material allows designers to tailor properties for maximum current production with different bandgaps."
High efficiency rate InGaAsN has captured the interest of the satellite communications industry that sees it as a potential power source for satellites and other space systems. The new material has a potential 40% efficiency rate, nearly twice that of standard silicon solar cells, when put into a state-of-the-art multilayer solar cell.
The Sandia scientists make InGaAsN using an EMCORE metal-organic chemical vapor deposition (MOCVD) process at between 500 and 800°C. InGaAsN was developed in Japan about 10 years ago. Sandia got involved in the mid-1990s when Hong Hou, now CTO of EMCORE's Albuquerque operations, joined the Labs from AT&T Bell Labs; his PhD dissertation was about the material. At the time, the DOE Center of Excellence for the Synthesis and Processing of Advanced Materials, headed by George Samara at Sandia, selected InGaAsN as the focus of a new line of research in photovoltaic material.
Jones says that an InGaAsN solar cell that could provide power to a satellite will ultimately have four layers. The top layer would consist of the alloy indium gallium phosphide; the second of gallium arsenide; the third of 2% nitrogen with indium in gallium arsenide; and the fourth, germanium. Each layer absorbs light at different wavelengths. The first layer, for example, absorbs yellow and green light, while the second absorbs between green and deep red. The arsenide nitride layer absorbs between deep red and infrared, and the germanium absorbs infrared and far infrared. The absorbed light creates electron hole pairs. Electrons are drawn to one terminal and the holes to the other, producing electrical current.
The bandgap and crystal structure (i.e., lattice constant) of InGaAsN makes it an ideal material for solar cells in space power systems. It results in reduced satellite mass and launch cost and increased payload and satellite mission. "You get two times the power from the new material as from silicon," says Jones. "With InGaAsN, the size of the solar collecting package can be smaller, meaning the satellite will weigh less, come in a smaller package, and be cheaper to launch." But before InGaAsN can realistically be used in a photovoltaic system, researchers must better understand the material, and a higher quality alloy must be developed.
For another application, scientists in Sandia's Semiconductor Materials and Processes Department view InGaAsN as a candidate laser material that will produce the 1.3µm bandgap needed for short-distance fiber optics systems. Sandia researcher Peter Esherick says current fiber optics systems use a semiconductor alloy with a base of indium phosphide as a laser source because it can grow crystals in the right bandgap range. However, Esherick notes, "for a lot of reasons, including because it is cheaper, researchers would prefer to use gallium arsenide as the base substrate. Without the addition of nitrogen, gallium arsenide's bandgap is too high to serve as a laser source. But with the nitrogen, the bandgap falls within the usable range of 0.7-1.4µm.
Sandia researchers have successfully built an edge emitter out of the new material, which is the first step toward incorporating the new material into a VCSEL (vertical cavity surface emitting laser) structure. -P.B.
NIST's Potzick plans neolithography consortium
In an effort to create a virtual fab on the process designer's desktop, the National Institute of Standards and Technology's James Potzick wants to form a consortium of companies to develop full simulation of the entire lithography process.
In such a scenario, simulation software components from various suppliers could "snap together to form a comprehensive simulation of the entire wafer patterning process. In order to do that, you have to have all the [simulation] pieces in place, and all the pieces aren't there," says Potzick, who is spearheading the proposed consortium, dubbed the Neolithography Consortium. At NIST, he is responsible for supplying photomask linewidth standards.
Lithography simulation is becoming critical as feature sizes shrink below the exposure wavelength, particularly because, as Potzick points out, "the pattern transfer from photomask to wafer is nonlinear." Potzick's proposed consortium would help integrate existing simulation software components with each other and with metrology and exposure tools, and to identify areas where a robust simulation tool doesn't exist, such as etch, says Potzick. "I think it's probably too big of a job for any one company ... and the group of suppliers is still fragmented."
Chris Mack, long-time industry guru and head of the Finle division of KLA-Tencor, says Finle supports the effort to better integrate various simulation tools and data sources, and supports the development of better etch simulation to meet the needs of lithographers.
An initial goal of the Neolithography Consortium is to "figure out why people do not (or cannot) optimize their photomask design and their wafer patterning process in a virtual fab today, and to remove those impediments," Potzick said. The proposed consortium is still in its infancy; a handful of companies, including Finle, attended an informal gathering following the recent SPIE Symposium on Microlithography.
"At the preliminary meeting, we tried to identify some existing roadblocks," said Chris Mack, head of Finle. "Currently, intertool communication is good, with work to improve links between litho simulators and metrology simulators needed. On the model side, the biggest missing piece is etch simulation."
Potzick believes full lithography simulation could help process designers optimize both the photomask design and the parameters for projection, exposure, develop, and etch before printing the mask or any real wafers. "This global optimization can be designed to maximize the probability that all of the printed wafer features will be within their CD and placement specifications, despite normal uncontrollable variations in process and environmental parameters, and can be automated," he says. "After the optimized photomask is fabricated, it can be measured using exposure aerial image emulation, and its performance can be predicted by applying the aerial image measurement data to the remaining wafer process simulation."
Funding for the consortium would likely come from the member companies, Potzick said, particularly because NIST has no funds for this type of venture. Overall costs should be minimal, he noted. "Members may have to modify their products slightly to conform to the decisions made at the meetings . . .," he said. "I would expect these costs to be more than fully recovered through increased product sales and reduced product development effort by incorporating standardized interfaces, for example."
The consortium is open to all, and Potzick would like to see a broad participation of appropriate companies across the industry. He plans to hold three to four meetings/year, with the next gathering tentatively scheduled for Semicon West in July. For more information, contact Potzick at [email protected]. -C.L.
Successful ellipsometry at 157nm
Engineers at Sopra SA, Bois Colombes, France, have come up with a 145nm-to-300nm purged ultraviolet (PUV) spectroscopic ellipsometer, an instrument mounted inside a purged box designed to suppress interfering absorption by oxygen and water at these wavelengths. The instrument is also capable of reflectance and transmittance photometric and scatterometric measurements. This is the work of Pierre Boher, Jean Philippe Piel, Patrick Evrard, Christophe Defranoux, Marta Espinosa, and Jean Louis Stehle.
 Optical indices of 157nm photoresist measured compared with a gonio-ellipso-spectro-photometer (GESP) and a new PUV instrument. |
Reporting at the recent SPIE Symposium on Microlithography, Boher explained, "Ellipsometry at 157nm wavelength must be free of oxygen and water. In addition, we cannot use a standard optical path." The purged box solves the first situation. The newly designed optical path uses a double monochromator in the polariser arm just after a deuterium lamp to provide optimum stray light rejection and minimum beam path. The light beam then goes through a MgF2 Rochon double-prism polarizer, on to the sample, and the reflected beam passes through a Rochon analyser and is detected by a photomultiplier in photon counting mode. (In a Rochon design, the optical axis of the entrance prism is parallel to the incoming beam and axis of the second prism is perpendicular to the beam.)
These engineers have used the new ellipsometric method to characterize CaF2 substrates, thin oxynitride gate dielectrics, and 157nm photoresists:
- Characterization of CaF2 yielded the refractive index precisely determined between 150-300nm (e.g., 1.600±0.001 at 157.6nm) and the thickness of the top surface roughness (5.3nm). Optical indices agreed with the literature above 190nm. Below this, they found that a thin contaminant layer on top of the CaF2 substrate produced was responsible for discrepancies with theory.
- Work on thin oxynitride gate dielectrics, using grazing x-ray reflectance, showed that contrast between nitride and oxide produces interference fringes at a grazing angle around 1.5-2°. The angular position of these fringes is characteristic of the thickness of the layers and the amplitude of the fringes is related to the index contrast between the layers and then their composition. The uncertainty associated to different thicknesses is <0.1nm.
- Analyzing two experimental 157nm photoresists from Tokyo Ohka, the Sopra group found good correlation between the new ellipsometric method and standard ellipsometry in the common wavelengths (Fig. 1).
Boher said, "With these resists, the optical indices obtained in 150-300nm metrology range can be considered with a high degree of confidence. Photoresists have been intensively studied at 248nm and 193nm using spectroscopic ellipsometry. It is now possible to do similar work at 157nm, providing optimization of lithographic structure at each wavelength."
Longer-term Sopra is looking at the addition of a grazing x-ray reflectance (GXR) option inside the PUV system. "We think that x-ray information will be helpful in this wavelength range due to the thinner thickness and the great sensitivity to roughness and contamination," he says. -P.B.
Lucent demonstrates contact planarization
While the rest of the industry continues incremental improvements in CMP processes, researchers at Lucent Technologies are looking to leapfrog all of them with a process called contact planarization. In this approach, a compliant material is applied to the top of the wafer, and it is then flattened with uniform pressure. The planar surface can then be used as a starting point for uniform etching back down to the critical layers, with >95% degree of planarization if the material is chosen to have the same etching behavior as the layer that it is planarizing. Lucent has demonstrated this with prototype equipment and some compliant materials, and if the remaining materials and process challenges can be overcome, the cost of ownership of the process is expected to be 3-5 times lower than for conventional CMP.
Judith Prybyla of Lucent (Murray Hill, NJ) provided an update on the research at the American Vacuum Society's 2nd International Conference on Advanced Materials and Processes for Microelectronics. The first key to the process is selecting a material to apply to the top of the wafer. The material must be a low-viscosity material that can be applied with a spin-coater. Spin-coating does not provide the flatness required, so the material must also have a low enough modulus so that it can be pressed flat in a reasonable amount of time with a reasonable pressure. The material needs to be UV-curable into a hard film as well, so that it can be fixed rigidly in place while it is being pressed flat. Finally, the etching characteristics of the cured material must be very close to the material underneath, so that when it is etched back, the flat surface remains flat. They have identified liquid oligomers that meet these criteria for planarizing SiO2, but few specifics were revealed. Ideally, the dielectric material of the device would meet these criteria so that a new material does not need to be introduced into the process. Spin-on glass (SOG) and some low-k polymers meet the low viscosity requirement, and other aspects of their suitability are being evaluated.
The second critical part of this technique is application of the pressure in a uniform and controlled way. Lucent has designed a custom tool in which a pressure chamber applies pressure to the back of the wafer through a flexible mat, pushing the top of it against an optical flat. The UV-cure of the material occurs through the optical flat. Typical process parameters are 10-30psi, <30sec for application of the pressure, and <20sec for cure of the material. The most recent work was performed on a second-generation tool that should be easily automated.
Contact planarization is projected to be much more repeatable than conventional CMP, because polishing pads and slurries will not change behavior during the process. The cost could also be much lower, in large part because of the lack of consumables. The work that Prybyla presented included contact planarization of dielectric layers with product wafers from Lucent Technologies, and work currently under way is expected to demonstrate the feasibility of the process for copper interconnect layers. -J.D.
Spectrophotometry for SOI characterization
Nondestructive spectrophotometry has been used to characterize the layers in SOITEC's SOI wafers, and the results compare very well with cross-section TEM analysis. The work was performed by n&k Technology, and Executive VP Iris Bloomer reported the results at the Thin Film User Group session at the American Vacuum Society's 2nd International Conference on Advanced Materials and Processes for Microelectronics.
Key properties of SOI wafers include the thickness of the buried oxide (BOX) layer, the thickness of the crystalline silicon (c-Si) above that, the smoothness of the interface in between, and the thickness of the native oxide on top. Additionally, the stoichiometric nature of the BOX is critical, i.e., it must be SiO2 and not a suboxide. This information can be obtained with TEM and other techniques, but n&k's spectrophotometric procedure can do it very quickly (~two seconds) and non-destructively.
The technique is based on the Forouhi-Bloomer optical dispersion equations—n&k's president Rahim Forouhi and Bloomer are co-founders of the company—which allow the unambiguous determination of film thickness as well as refractive index (n) and extinction coefficient (k) over the spectral range of 190-1000nm. This information can be derived from the reflectance and transmittance of virtually any stack of thin films. An important feature for any such procedure is a high signal-to-noise ratio, and this is accomplished with all-reflective optics. Very little signal gets lost.
SOITEC supplied wafers with high-dose, high-energy implants of oxygen (4x1017/cm2, 120keV and 1.8x1018/cm2, 190keV) to create the SOI structure. n&k's results for film thickness and interface roughness were verified with TEM studies. The interface roughness was reported as an RMS roughness over the spot size (1mm), and one interface that had a relatively high roughness actually had an "island" anomaly near the interface. This shows that the RMS roughness does not provide all of the detail about an interface, but it will usually identify significant variations from the desired structure. The BOX was verified as being stoichiometric SiO2, and this is possible only because the measurement technique extends into the DUV range, where SiO2 is distinguishable from SiOx.
World's first diamond micromachines created at Sandia
Researchers John Sullivan and Tom Friedmann at Sandia National Laboratories, Albuquerque, NM, have created what are believed to be the world's first micromachines etched from a surface of amorphous diamond. They have used their technique to fabricate a diamond comb drive, a millimeter-square device consisting of two diamond combs on a flat surface with teeth facing each other (see figure).
One comb is bolted down. The other moves freely within the confines of a spring. A diamond rod is attached to the spine of the movable comb. When an electric voltage to the comb repeatedly cycles from positive to negative, the teeth attract and repel each other. This moves a comb back and forth and makes work—like driving a gear or piston—achievable.
This is the first demonstration of a micromotion drive using amorphous diamond. Further, the new technique is compatible with those used in silicon ICs and surface micromachine manufacturing.
In micromachine applications, diamond offers superior wear-resistant qualities and is resistant to stiction?a combination of stickiness and friction. (Stiction is the tendency of an object resting on another to stick, rendering the devices useless.) In addition, it is a biocompatible material that could be used inside the human body for medical purposes without generating an allergic reaction.
"The point," says Friedmann, "is to create a layering technology useful in increasing the life span and performance of micromachines, which, for their marvelously tiny size, are still machines. They're subject to wear, even if it's only at the micro level." Diamond is more wear-resistant than polysilicon. One estimate in the literature claims that diamond should last 10,000 times longer than polysilicon in wear applications.
Compatibility with silicon means that a diamond layer could be added to a silicon structure for additional strength and durability. "Or, amorphous diamond could one day be used as a complete replacement for polysilicon," says Friedman. Crystalline diamond for such applications is currently impractical because of the far higher temperatures needed to synthesize it and the surface roughness that precludes its use in a multilayer surface micromachine technology.
The tremendous internal stresses with amorphous diamond—hundreds of atmospheres—had rendered this material impractical to stand alone or to coat thickly on anything but the strongest substrates. However, Friedmann and Sullivan's proprietary process eliminates this problem. Currently, the proof-of-principle devices being fabricated at Sandia take three hours for diamond to deposit through pulsed-laser deposition. Annealing the diamond so that it has zero stress (to prevent warpage) can be done in minutes.
"Putting a machine specifically assigned to add a layer of amorphous diamond into the cleanroom in anotherwise silicon-fabrication facility is achievable, since diamond is chemically compatible with silicon," Friedmann says. "Such machines may soon become commercially available." -P.B.
Tech Briefs
Texas Instruments has licensed Numerical Technologies Inc. (San Jose, CA) iN-Phase design tool to support TI's 0.13µm manufacturing process. TI will integrate NumeriTech's patented phase shifting technology into design and manufacturing flows for TI's next-generation digital signal processing (DSP) and wireless devices. TI's roadmap estimates more than a five times increase in DSP instructions/second by 2005, and more than 25 times by 2010. Also, phase shifting technology and tools will play a critical role in reaching these performance goals. TI plans to release its 0.13µm CMOS process technology into production in the first half of 2001.
TSMC has qualified its 0.15µm process in its Fab 3 and shipped its first 0.15µm wafers to Altera. TSMC expects to roll out its 0.15µm process in three other fabs by the end of 2001; it has three other customers that have taped-out designs at 0.15µm with four additional customers expected to tape out within the next month. The new process should reach volume production in 3Q00. The 0.15µm process can support up to 7 metal layers and has an effective gate length of only 0.11µm.
JMAR Technologies Inc., San Diego, CA, has been awarded a patent protecting its diode-pumped solid state laser technology, which was created at its research division. The patent awarded, US Patent No. 6,016,324 titled "Short Pulse Laser System," allows JMAR 23 separate yet related claims to the new Britelight laser technology it developed as the basis for picosecond x-ray source (PXS) systems. JMAR believes that the PXS technology will pattern new generations of ultra-small semiconductors.
Semiconductor packaging and test services provider Amkor Technology Inc., West Chester, PA, has plans to add wafer bumping capabilities to its Korean facility by the end of 2000. The bumping capabilities added to the facility will support both large and small die size applications, future pitch requirements, and lead-based and lead-free interconnect solutions.
International Sematech, Austin, TX, has validated Applied Materials' Black Diamond low-k dielectric film for production of sub-0.18µm devices. Through its evaluation process Sematech successfully fabricated level-1 copper damascene test structures with Applied's Black Diamond low-k material. Additionally, the material was tested on structures built using existing etch and CMP processes and tools.
IBM achieves 0.13µm geometry using Dow resin
IBM recently announced a new semiconductor manufacturing process using SiLK semiconductor dielectric resin from Dow Chemical Company for production of advanced interconnect structures in 0.13µm devices. Integrating multilevels of copper metal in SiLK resin, IBM's CMOS 9S implements material with k<3.0.
 Courtesy: International Business Machines Inc. |
Dow specifically developed the SiLK resin as an interlayer dielectric (ILD) material for high-performance ICs. The spin-on, aromatic hydrocarbon polymer features a low isotropic dielectric constant of 2.65, 40% lower than that of silicon dioxide, the traditional ILD material.
The resins have no fluorine in their composition, which prevents contamination of metal barrier levels. SiLK resin is stable at temperatures up to 450?C, providing a wide processing window, and has a high glass transition temperature of >490?C.
Dow intends to work with IBM to develop porous materials with dielectric constants around 2.0 k as part of the National Institute of Standards and Technology Advanced Technology Program.
For more information, contact Dow at ph 800/441-4369, reference E#1-3l6G1, or visit the web site at www.silk.dow.com.