Issue



Pattern transfer into low dielectic materials by high-density plasma etching


05/01/2000







Gottlieb S. Oehrlein, Theodorus E.F.M. Standaert, Peter J. Matsuo, Physics Department, University at Albany, State University of New York, Albany, New York

overview

Directional plasma etching of low dielectric constant materials presents a rich spectrum of challenges owing to the multitude of inorganic, organic, and mixed organic/inorganic low dielectric constant materials being considered for multilevel interconnection applications. For organic materials we discuss generic patterning issues and describe process development for hydrocarbon and fluorocarbon-based dielectrics. Porous materials are candidates for ultralow dielectric constant material applications, and plasma etching of porous silica exhibits important differences in surface processes relative to conventional SiO2. Two important surface cleaning processes for plasma-exposed metal and/or barrier layers are also discussed, as are their extendibility to high-aspect-ratio features and compatibility with the low-k material.


Figure 1. Two approaches for producing aligned trenches and vias of an intermediate dual damascene structure prior to metal deposition. Sequence a-d is called "via first," and sequence e-h is called "trench first."
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In order to reduce RC delays of multilevel wiring that connects individual devices of silicon ICs, the industry is currently making a transition to copper metallization and low dielectric constant insulators. Advanced multilevel metallization structures are fabricated by the damascene technique [1]. A dielectric material is deposited onto the planarized substrate, which is normally a multilevel metallization structure in progress. To produce the metal wiring in the dielectric, trenches are etched into the dielectric by lithographic and plasma etching techniques. The trenches are subsequently filled with the metal, and the wiring inside the dielectric is defined by removing the excess metal using chemical mechanical planarization (CMP) techniques. Different wiring levels are connected vertically by metal studs.

The dual damascene approach combines the fabrication of metal wires and studs [1]. It is based on repeated pattern transfers into the dielectric to produce the required trench and via structures prior to metal deposition and CMP steps [1, 2] (Fig. 1). The two most important approaches for completing the etching of trench-via structures (shown in Fig. 1) employ resist masking and Si3N4 etch stop layers. Via and metal levels are also separated by an etch stop layer.

In the via-first approach (Figs. 1a-1d), the resist is patterned to produce vias in the trench level and the via level dielectrics in one etching step. The etch is terminated on the second Si3N4 etch stop layer on top of the Cu metallization. After stripping the via resist pattern, resist masking is applied for trench etching (Fig. 1c). Trenches are etched into the dielectric down to the Si3N4 etch stop layer (Fig. 1d).

In the trench-first approach (Figs. 1e-1h), the resist is patterned to produce trenches in the trench level dielectric (Fig. 1e). The trench etching terminates on the Si3N4 etch stop layer (Fig. 1f). After stripping the trench resist pattern, resist masking is applied for via etching (Fig. 1g). Vias are subsequently etched into the via level dielectric (Fig. 1h). The constraints in terms of the alignment of the trenches and vias are similar to those for the via-first approach.

The patterning of the dielectric layers by plasma etching techniques is essential to the damascene approach. The move to low-k materials produces many material-dependent challenges for the pattern transfer by plasma etching. Table 1 presents an overview of important low-k dielectrics that are being considered for use in multilevel interconnect designs. For pattern transfer, the most important difference between the materials shown in Table 1 is the classification into inorganic and organic materials. The former are related to SiO2, whereas the latter consist of hydrocarbon or fluorocarbon structures that may also contain oxygen. The hybrid materials contain both carbon and silicon groups.

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SiO2-related materials are conventionally patterned by the transfer of lithographically defined resist masks into the dielectric using fluorocarbon etching plasmas. Organic materials are etched using SiNx or SiO2 hardmasks and low-pressure O2-based high-density discharges. The reactivity of the low-k dielectrics varies significantly, with the SiO2-related materials showing little reactivity without ion bombardment, and several polymeric materials being among the most reactive. This difference is shown in Table 2, which compares the net etching yield (number of silicon or carbon atoms removed/incident ion) for SiO2-related and organic low-k materials. For the oxide-related materials, the net etching yields are low, indicating that etching does not occur to a significant extent without ion bombardment. For the organic materials, the net etching yields are much higher, reflecting the fact that neutrals are important in the etching process. Consistent with these data is the observation that for SiO2-related materials, profile control can be achieved in a relatively straightforward fashion. On the other hand, etching of polymeric materials in O2 discharges occurs spontaneously because of the greater importance of neutrals for the volatilization of most materials, and undercutting of the hard mask and profile control are the major challenges. The studies described here were performed using inductively coupled, high-density plasma reactors, currently a standard reactor technology for directional etching of dielectrics [3].

Directional etching processes for organic low-k materials

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Figure 2. PTFE and PAE-2 etch rates as a function of self-bias voltage for two O2/Ar flow ratios (40sccm total flow, 4mTorr, 600W).

For etching of organic materials using O2-based discharges, the etch rates depend strongly on the ion energy and the number of oxygen atoms available for etching reactions. This is shown in Fig. 2 for poly=arylene ether (PAE-2) and polytetrafluoroethylene (PTFE) as a function of self-bias voltage (a measure of the average ion energy), and for two Ar/O2 flow ratios. The choice of these materials is motivated by the data of Table 2, which indicate that the directional etching of PAE-2 in Ar/O2 (and Ar/O2/N2, although not shown here) is very similar to that of a number of other hydrocarbon-based organic low-k materials. Its etching behavior is representative of these. On the other hand, PTFE may be viewed as the extreme example of a fluorine-containing polymer, and its etching behavior may be used to illustrate the behavior of those materials. Figure 2 shows that very high etch rates can be achieved for PTFE relative to PAE-2, (an etch rate of about 5µm/min at -80V self-bias voltage, for example). Also, for PTFE, the etch rate is relatively insensitive to the amount of O2 flow beyond the first 6%, whereas PAE-2 shows a strong dependence of the etch rate on O2 flow.

Preventing undercutting of the etch mask is the major challenge for faithful pattern transfer into organic materials. One way to enable directional etching of organic materials that spontaneously react with the neutral etchants of a plasma process is the use of sidewall passivation [4]. The addition of N2 to O2 discharges is useful in suppressing lateral etching of organic low-k materials. This is shown in Fig. 3. For an N2/O2 ratio of 10:1, straight sidewalls were obtained (Fig. 3b), whereas for smaller N2/O2 ratios, some mask undercutting is observed (Fig. 3a). The vertical PAE-2 etch rate also decreases slightly at higher N2/O2 flow ratios.

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Figure 3. a) PAE-2 etched in N2/O2 (1:1), and b) in N2/O2 (10:1), (40sccm, 4mTorr, 600W source, 50W rf bias); c) PTFE patterned in Ar (40sccm, 4mTorr, 600W source, 200W rf bias) and d) after O2 strip at low source and bias powers.

For PTFE films, etching rates >500nm/min can be achieved in pure Ar plasmas by ion-induced activation of the fluorocarbon material to produce volatile products. This makes it possible to transfer hard mask patterns into PTFE films in a pure Ar-discharge [5]. Figure 3c shows that for a pure Ar discharge, straight sidewalls can be obtained. The photoresist pattern is still visible in the micrograph. Attempts to remove the resist mask in a pure O2 plasma at low source and bias powers were successful, but they highlighted a common problem seen for features after directional etching, i.e., persistent sidewall residue layers or "veils" (Fig. 3d). Prolonged exposure to the O2 plasma ultimately resulted in the removal of the protruding parts of the veils, whereas the parts of the veils covering the sidewalls were hard to remove using a dry etching chemistry. In addition, the removal efficiency was strongly dependent on feature size, since the veil thickness reflects the total amount of redeposition and therefore varies with feature size.

Fluorocarbon-based etching processes

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Fluorocarbon plasma etching processes used for SiO2 [6] can be used with minor modifications to pattern the SiO2-related materials shown in Table 1. Standaert et al. [7, 8] have described fluorocarbon etching processes for fluorinated SiO2, hydrogen silsesquioxane (HSQ), and methyl silsesquioxane (MSQ) SiO2-like films using an inductively coupled high-density plasma reactor, and compared their data to conventional SiO2. Using CHF3 as the feed gas, they demonstrated successful pattern transfer of features into these low-k materials.

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Figure 4. Etch rate (ER) and corrected etch rate (ER x (1-P)) of SiO2 and Xerogel as a function of self-bias voltage in CHF3 (50 sccm, 10m Torr, 1400W).
Porous silica materials are characterized by a dielectric constant that decreases with the degree of porosity to values <2 [9], while also satisfying other requirements on the dielectric. Porous silica films can be patterned in fluorocarbon discharges using resist masks. Porosity and residual impurities, primarily hydrocarbon groups, are expected to play an important role in the etching of these materials. Etching of Xerogel material was examined [10] in inductively coupled discharges fed with CHF3 (50sccm) at a pressure of 10mTorr and employing 1400W of inductive power. Figure 4 shows the etch rates of two Xerogel films with porosities of 30% and 69% in comparison to rates measured for conventional SiO2 [10]. These materials differed in pore size, but were similar in terms of the residual carbon impurities. Below a threshold voltage of 50V, only fluorocarbon film deposition takes place. Above the threshold voltage, the Xerogel films etch faster than SiO2. Figure 4 also shows data that account for the effect of porosity by multiplying the etching rate with a factor (1 - P), with P being the porosity. With this correction, the etch rates of the Xerogel materials become actually lower than those of SiO2, and strongly dependent on porosity. Surface analysis of Xerogel films after plasma etching has shown surface modifications that are quite different from those seen for SiO2. In particular, a great deal more fluorocarbon material exists on Xerogel surfaces, and this has been explained by fluorocarbon deposition into the Xerogel pores [10]. This difference varies with residual impurities in the Xerogel films, which are primarily carbon-based groups, and with pore size.


Figure 5. Trenches and vias etched in 30% porous Xerogel films using a CHF3 discharge maintained at 1400W source power and 10mTorr pressure. The self-bias voltage was set at -125V.
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Figure 5 shows scanning electron micrographs of trenches and vias obtained with porous silica films after pattern transfer. The profiles are directional, but a certain amount of bowing (rounding) of the sidewall profile is noticeable. Although the reason for this profile imperfection has not been established, similar bowing has previously been noted for HSQ [8], perhaps indicating a role of hydrogen in causing bowing.

Hybrid materials

For organic materials that also contain silicon groups, (e.g., benzocyclobutene (BCB), a hydrocarbon-based, silicon containing material), use of a simple O2 etching chemistry produces an SiO2-like passivation layer on the surface, which leads to low etching rates and surface roughness [11]. To improve the gasification of the silicon, a small amount of a fluorocarbon gas must be added to the O2 etching chemistry.

Post-etch mask stripping and via cleaning processes

Following the dielectric etch, the metal lines and the connecting studs need to be cleaned to minimize the contact resistance between these plasma-exposed metal surfaces and subsequently deposited metal layers. For an organic dielectric patterned using an O2-based etching chemistry, an oxidized surface layer that can be removed by pre-metal Ar sputtering is produced. For fluorocarbon-based etching, a fluorocarbon residue is produced on the conductor surface. The simplest approach to removing the fluorocarbon residue from the conductor surface is to perform in situ resist stripping in the plasma etching reactor, employing O2 following the etching process. This process produces an oxidized surface layer, and this can be removed by pre-metal Ar sputtering.


Figure 6. Cu(2p) XPS spectra for Cu at a grazing electron emission angle for a) an as-received Cu surface, b) after fluorocarbon plasma exposure, c) after the O2 plasma cleaning step, and d) after the final Ar+ sputter [12]. (The intensity in panel d) has been divided by four.)
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The cleaning efficiency of O2 and Ar processes for a fluorocarbon-based etching process in which a copper surface is contaminated by a fluorocarbon film has been studied [12]. Each stage of the process sequence was examined by x-ray photoelectron spectroscopy (Fig. 6). Initially a Cu surface with a native oxide is exposed to the fluorocarbon plasma environment for 15 sec to simulate overetching during the dielectric etching step, and a steady-state fluorocarbon layer is formed on the Cu surface (Figs. 6a, 6b). (The presence of the fluorocarbon layer is demonstrated by carbon and fluorine-related signals, which are not shown in Fig. 6b.) To remove the fluorocarbon layer, the sample was exposed to an O2 plasma. The O2 exposure removed the fluorocarbon layer, and a thick oxide layer began to grow on the Cu surface (Fig. 6c). The oxidized layer is subsequently removed by Ar+ sputtering, and the Cu surface returns to its clean state (Fig. 6d).

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Figure 7. Panel a) shows the sputter rate of BPSG in an Ar plasma vs. aspect ratio. The Ar ions were accelerated over a bias potential of 25V. The chamber pressure was 6mTorr, while the inductive power was 440W. Since this is a completely ion-driven process, we can conclude that the ion energy flux is not measurably altered up to an aspect ratio of three. In panel b), the removal rate of a passively deposited CFx film vs. aspect ratio is shown. The films were grown using CHF3 gas chemistry. The removal of these films was evaluated after O2 plasma exposure without rf bias. The inductive power was 1000W, and the pressure was 6mTorr. For both of these panels, etch rates were determined by SEM analysis.

The demonstration of in situ cleaning technologies for blanket substrates must be extended to high-aspect-ratio structures. Both via bottom and sidewall issues must be addressed, e.g., the veils shown in Fig. 3d must be removed. Figures 7a and 7b show the etch rate of SiO2 and of a fluorocarbon film inside trenches formed in SiO2. The etch rate was measured by scanning electron microscopy. These data show that the Ar+ sputter-induced removal of SiO2 exhibits a very weak aspect ratio dependence, whereas the fluorocarbon cleaning efficiency decreases rapidly with aspect ratio. The Ar+ ions are highly directional, and their flux is less reduced than that of reactive neutrals, which will collide more frequently with the sidewalls. The reduced fluorocarbon cleaning efficiency for higher aspect ratios is indicative of the importance of line-of-sight arrival of reactive neutral species in the O2 discharge.

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Figure 8. X-ray photoelectron emission spectra illustrating the instability of methylsilsesquioxane (MSQ) under O2 plasma exposure [12]. Such a cleaning chemistry extracts carbon from the dielectric, leaving behind a more SiO2-like layer. These modifications are seen very deep in the film (up to a depth of 300nm). The O2 plasma exposure was at 10 mTorr, 1000W inductive power, and a flow rate of 40sccm.

The cleaning processes should not modify the properties of the low-k dielectric in a detrimental fashion. The changes in the properties of MSQ, when exposed to an O2 discharge used to remove fluorocarbon contamination layers from metal surfaces, have been measured [12]. A dramatic change in the composition of the MSQ film was observed, leading to a loss of the carbon groups to a depth in excess of 100nm, and oxidation of this material to an SiO2-like material with a much higher dielectric constant (Fig. 8). For MSQ-like low-k materials, alternative surface cleaning processes are clearly required.

Even for organic dielectrics, a resist strip may be necessary in practical situations, since the O2-based etching step may not completely remove the resist mask on top of the hard mask layer. The task of removing the resist layer without attacking the organic low-k material is challenging, and no simple universal solution has emerged.

Conclusion

The survey of pattern transfer processes for several prototypical low-k materials highlights both generic and material-specific issues that require solutions before these materials can be successfully integrated into a multilevel metallization process sequence. Post-etch via/trench cleaning is an essential part of the overall process, and compatibility of the low-k material with the surface cleaning approaches needs to be ascertained and may require novel, material-specific approaches.

Acknowledgments

The work described in this article has been supported by the Semiconductor Research Corporation, Air Products, and W. L. Gore. We also acknowledge helpful discussions and collaboration with J.L. Plawsky, W.N. Gill, P.C. Wayner, J.L. Langan, W.R. Entley, C.T. Rosenmayer, J.W. Bartz, and T.J. Dalton.

References

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Gottlieb S. Oehrlein received his PhD in physics from the State University of New York, Albany in 1981. He was a research staff member at IBM's T. J. Watson Research Center in Yorktown Heights, N.Y. until 1993, and from then until 2000, he was a professor of physics at the State University of New York, Albany. He is now a professor of materials science and engineering at the Department of Materials & Nuclear Engineering and Institute for Plasma Research, University of Maryland, College Park, MD 20742-2115; ph 301/405-8931, fax 301/405-6327, e-mail [email protected].

Theodorus E. F. M. Standaert received his MS from the Eindhoven University of Technology in the Netherlands in 1996, and in 1999 he received his PhD from the State University of New York, Albany, for characterizing the patterning of several low-k dielectrics in high-density plasmas. He is employed by IBM as a reactive ion etching engineer.

Peter J. Matsuo received his PhD in physics from the State University of New York, Albany, in 1999. During his time at the Plasma Research Laboratories, his areas of research included plasma-based cleaning and stripping. Following his doctoral work, he incorporated Fysix Corp., an internet publishing company, where he is the VP of Development.


Wet cleans still needed

As the authors point out, dielectric pattern transfer requirements using high-density plasma etching is critically important to deep sub-micron interconnect integration. High-density plasma processes need reduced hard mask erosion and controlled polymer formation to obtain acceptable via/trench sidewall profiles. In addition, highly anisotropic profiles can also be produced using reducing gas mixtures (i.e., H2/N2). Distinct selectivity and lithographic advantages during etching can be realized using combined inorganic-like (silicon-based)/organic (carbon-based) low-k materials in multi-layer dielectric stacks. Although in situ dry etch cleans are highly desirable, it appears that post-etch wet cleans will still be required to remove unwanted etch residues prior to subsequent interconnect processing.

Michael Thomas, CTO, Wafer Fabrication Materials, Honeywell Electronic Materials