Thermal Processing: RTP temperature calibration using titanium silicides
02/01/2000
Ingrid Jonak-Auer, Austria Mikro Systeme International AG, Unterpremstätten, Austria
A large, efficient wafer fab is likely to have each RTP step performed on more than one system. Small variations between systems, whether or not they are from the same manufacturer, can cause identical process recipes to produce silicon with significantly different properties. Correlation between RTP systems can be improved with two emissivity-independent methods for comparing and adjusting wafer temperatures: monitoring titanium silicide sheet resistivity or measuring titanium film stress.
Thermal processing is the predominant method for controlling the phase structure, material properties, and electrophysical parameters of materials for semiconductor devices. The duration of conventional thermal processing varies from several minutes to several hours. Rapid thermal processing (RTP), in which the time is typically measured in seconds, provides many advantages. Higher throughput is an obvious potential benefit, but other ones include: 1) better uniformity, which decreases the defect generation caused by thermal gradients; 2) a simple and efficient implementation with the use of incoherent light from halogen and arc lamps; and 3) diminished redistribution of dopants due to diffusion. These benefits have led to an enormous growth in the applications of RTP, including annealing of ion implant damage, dopant activation, gettering, silicide formation, metal contact alloying, glass reflow, oxidation, nitridation, and chemical vapor deposition.
Process transfer between RTP systems
The large number of process steps to be carried out on RTP equipment requires their availability on more than one RTP system, in order to enhance throughput in wafer fabrication, improve the flexibility in the manufacturing flow, and guarantee uninterrupted production in the case of down-events on individual pieces of equipment. The tight process temperature windows of various RTP steps impose an additional challenge on the process transfer from one RTP system to another. Austria Mikro Systeme International AG is an ASIC supplier, and, like many other manufacturers, has a large variety of processes and products. In such a situation, flexibility in wafer fabrication is a vital issue.
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Figure 1. Schematic overview of Ti/Si reaction products at various RTP temperatures in N2. (Note: The C49 phase of TiSi2 has a mean grain diameter of 30nm with high resistivity, and the C54 phase has a mean grain diameter of 2µm with a resistivity of about 15µomega RTP temperature calibration using titanium silicidescm.)
Significant difficulties can arise during the transfer of RTP process steps from one RTP system to another. Due to different process chamber designs and/or nonmatching pyrometers, wafers are exposed to different temperatures during the RTP step, even though the same recipe parameters are applied. For example, in recent work, problems arose when the RTP nitridation step of the formation of a titanium nitride (TiN) diffusion barrier in 0.8µm and 0.6µm CMOS processes was transferred from an AST SHS 1000 to an AG Heatpulse 4100 system. Simply duplicating the recipe resulted in voids and cracks on the wafers processed on the AG Heatpulse 4100 system and, subsequently, in a deterioration of electrical parameters such as contact resistivities, metal resistivities, and leakage currents. These effects are attributable to changes in thermal stress due to different RTP temperatures.
Temperature calibration
While conventional thermal processing involves heating by convection and conduction, where the wafers are in thermal equilibrium with the furnace surroundings, RTP is based on the energy transfer between a radiant heat source and a wafer, where the wafer is not, typically, in thermal equilibrium with the reactor wall. The response of a processed Si wafer to near-surface radiant energy deposition is a highly complex process in which the absorption of the energy depends on its wavelength, as well as its reflection, diffusion, refraction, and transmission within the RTP chamber [1].
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Figure 2. Dependence of TiSix sheet resistivity on RTP temperature for wafers processed on AST and AG for a) MEMC epi p-type 14-24Wcm substrates, b) Wacker non-epi p-type 14-24Wcm substrates, and c) Unisil non-epi p-type 14-24Wcm substrates.
Typically, wafer temperatures in an RTP system are measured with a noncontact optical pyrometer, which determines the wafer temperature from the emitted radiation energy. For our RTP systems, the pyrometer wavelength is 2.7µm. To cancel the effect of radiation from the quartz tube and other sources, the AG Heatpulse 4100 system uses a second pyrometer. Measurements taken from this pyrometer are combined with measurements from the pyrometer sensing the wafers to correct for tube emissions. The total emissivity of Si in an RTP system depends on the optical properties of the starting wafer, the dielectric or conducting layers that may exist on the wafer surface, buried layers within the wafer, and the specific optical properties of the reflective chamber and the components inside [2]. In a case where there is no thermocouple-instrumented wafer at hand that can be used in both RTP systems under investigation, or in a case where its installation is accompanied by a lengthy reconstruction of the systems, accurate temperature calibration — a vital condition for RTP process transfer — is hard to obtain.
Many of the challenges of RTP temperature calibration are solved with an alternative technique that uses sheet resistivity measurements on various silicon wafers sputtered with titanium, where the TiSix formation is induced by RTP. For all RTP process steps that include silicidation, this RTP temperature calibration procedure offers the advantage of being carried out exactly on the layers whose temperature treatment is most important during processing. This method bypasses all difficulties of temperature measurement that result from a dependence of the measurement on the optical or thermal properties of the measured system. Moreover, a very accurate temperature profile over the wafer can easily be obtained by simply performing multipoint sheet resistivity measurements.
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Figure 3. Dependence of TiSix-Ti film stress on RTP temperature for wafers processed on AST and AG for a) MEMC epi p-type 14-24Wcm substrates, b) Wacker non-epi p-type 14-24Wcm substrates, and c) Unisil non-epi p-type 14-24Wcm substrates.
We performed our experiments in the 680-800°C temperature range, which is of particular interest for RTP nitridation of titanium as a diffusion barrier. Temperature differences of the two RTP systems can be deduced from different sheet resistivity values of wafers processed at the same nominal temperatures as read on the respective pyrometer scales on AST and AG equipment. Comparison of mechanical stress imposed on the wafers by titanium deposition and the subsequent RTP-induced silicidation yields exactly the same temperature difference. Both methods offer fast, reliable, and sensitive tools to observe and correct for potential temperature differences of different RTP systems.
Titanium silicide as a temperature monitor
Aluminum and aluminum alloys are still being widely used as the primary contact material and the second-level interconnection metals in MOS technology. However, the problems associated with the formation of hillocks and junction spiking are major concerns. Diffusion barrier layers such as bilayers of Ti/TiN are currently being used to reduce junction spiking and contact failures [3]. During the process of TiN layer formation, a layer of TiSix is formed at the Si/Ti interface. Silicide formation processes are exclusively thermal in nature, controlled by the induced temperature and processing time only. This makes them viable for temperature monitoring.
Figure 1 shows a schematic summary of Ti/Si reaction products at various RTP temperatures in N2 [4]. Titanium initially becomes contaminated with oxygen from the annealing ambient before becoming nitrided at the surface and silicided at the interface. The oxygen is eventually expelled from the growing silicide into the face-centered cubic d-TiN layer forming at the surface. The TiNxO1-x surface layer provides a good diffusion barrier against Al junction spiking.
At low temperatures, a metal-rich silicide is formed, and under proper kinetic conditions, the silicidation proceeds until the whole metal film is consumed. Then a silicide phase with a larger silicon content is formed. The richest silicon phase, which is the disilicide, becomes the only one produced at 800°C and higher, whereas at lower temperatures multiphase layers are formed [5]. In contrast to conventional furnace annealing, three or even more phases can coexist in the silicide layer synthesized by RTP. Phase composition and crystalline structure have a direct influence on the sheet resistivity of the silicide layer. Variation of the resistivity of a silicide layer as a function of the processing temperature and time is determined by the phase composition of the layer, bulk resistivities of the phases, and structure transformations.
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Figure 4. Dependence of TiSix sheet resistivity on the AG emissivity value for MEMC epi p-type 14-24Wcm substrates and comparison to wafers processed on AST (E not variable).
The volume change associated with the metal-silicon reaction leading to silicide formation is simply the difference between the volume of the individual metal atom plus two silicon atoms, and the metal disilicide [6]. These volume changes can be used as a temperature monitor as will be shown in the following section. For all metal disilicides, the volume decrease is very large and can lead to large tensile stresses in the silicide films during the silicide formation. This leads to concerns about the mechanical stability of the structures at the siliciding temperatures or later during further processing. At room temperature, the stress is mainly due to the difference in the thermal expansion coefficients of the silicide and silicon; the contribution from the lattice mismatch is less important. The thermal expansion coefficients for silicides are considerably greater than those for metals or silicon [7].
Experimental procedure
We performed sheet resistivity and film stress measurements on various TiSix films sintered by RTP in an AST SHS 1000 system and an AG Heatpulse 4100 system in the 680-800°C temperature range under N2 ambient. The interaction between Ti and Si was used as a way of controlling RTP temperature during the nitridation process step.
RTP temperature calibration measurements using the methods described above were all performed on unpatterned test wafers. The substrates used for test wafer preparation were all 14-24omega cm, 10cm dia., p-type (100) Si wafers, which is the standard substrate material for the CMOS processes under investigation. To account for possible differences in backside emissivities that might influence the pyrometer results, we performed our measurements on substrates from different vendors, including Wacker and Unisil non-epi wafers and MEMC epi wafers. For the MEMC epi wafers, the approximately 3000Å thick oxide layer on the back-side was removed prior to sample preparation, a step that is also present in the CMOS process under investigation.
Test wafer preparation for sheet resistivity and stress measurements was performed according to the following procedure:
- The stress on the untreated substrate wafers was measured using a Tencor P-10 surface profiler.
- An in-site sputter clean was done to remove native SiO2.
- 70nm of Ti was sputtered.
- RTP (with an equal number of wafers in an AST and an AG system) was performed at temperatures varying between 680°C and 800°C in steps of 20°C; with a process time (defined as the actual time at the process temperature regardless of overhead times such as preheating and cool-down times) of 15 sec; with an optimized ramp rate of 30°C/sec under N2 ambient; and with an emissivity value (a variable parameter on the AG system) set to the default value of 76 (a relative percentage value).
- The stress induced by Ti deposition and silicide formation was measured.
- The unreacted Ti was selectively etched in a mixture of NH3, H2O2, and H2O (1:1:5) for 20 min to expose the bare TiSix for resistivity measurements.
- TiSix sheet resistivities were measured using four-point probe measurements on RS50-Omnimap, at nine sites/wafer.
TiSix sheet resistivity
Figure 2a-c shows the dependencies of TiSix sheet resistivities on RTP temperature for wafers processed on AST and AG RTP systems for three p-type 14-24omega cm substrate materials. For the investigated temperature range, the silicide sheet resistivity decreases with increasing temperature up to approximately 740-760°C. For higher temperatures, sheet resistivities become essentially unaffected by temperature. Clear sheet resistivity differences between the two RTP systems can be seen for temperatures below 740°C. Between the three substrate materials from different vendors, no significant resistivity difference can be detected. As can be deduced from Fig. 2, an RTP temperature of 700°C for wafers processed on the AST system corresponds to 709-711°C for wafers processed on the AG system.
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Figure 5. Dependence of TiSix-Ti film stress on the AG emissivity value for MEMC epi p-type 14-24Wcm substrates and comparison to wafers processed on AST (E not variable).
For metal-on-silicon systems, lower process temperatures lead to metal-rich silicides growing in thickness at the expense of the metal. At higher temperatures, silicon-rich phases form at the expense of the metal-rich phases. Intermetallic formation at higher temperatures causes the lower resistivity. At high temperatures, the most stable silicon-rich silicides form, resulting in the stable and lowest resistivities [6].
Titanium film stress
The behavior of room temperature stress, resulting from Ti deposition and high temperature sintering of Ti on silicon, is shown in Fig. 3. Over the investigated temperature range, the film stress is tensile and increases with increasing RTP temperature up to approximately 760°C. For temperatures higher than that, the film stress becomes independent of the temperature, an effect that has been attributed to the formation of stable disilicides. For low-temperature sintering (< 500°C), stress for Ti tends to be compressive, an effect that has been attributed to the interstitial silicon and/or oxygen diffusion in the metal [6]. Figure 3 shows that wafers processed on the AST system with an RTP temperature of 700°C exhibit the same tensile stress values as wafers processed on the AG system with RTP temperatures between 709°C and 710°C. This result corresponds very well with the silicide sheet resistivity measurements described in the previous section.
RTP temperature adjustment
Instead of raising the temperatures in all AG RTP recipes for the titanium nitridation process step by 10°C to make up for nonmatching pyrometers, we chose to adjust the wafer temperatures on our RTP systems by varying the emissivity parameter on the AG system.
To do this, an additional test was necessary, where the emissivity E of the AG system was varied at fixed RTP temperature. Since no difference between the three substrate materials could be detected in the experiments described above, we restricted our RTP temperature adjustment measurements to MEMC 14-24omega cm epi wafers. The experimental procedure was the same as described above, except that the RTP temperature was fixed at 700°C on both RTP systems, and the emissivity parameter was varied between 69 and 79 on the AG system.
Figures 4 and 5 show the effect of emissivity E on sheet resistivity and film stress, respectively. From both figures, it can be seen that the emissivity value on the AG system would have to be raised from 76 to 79-80 to get the same values for sheet resistivity and film stress. These results were also verified for the temperature of 760°C. Adjustment of the RTP temperatures resulted in an assimilation of the relevant electrical parameters of CMOS wafers processed on the AG Heatpulse 4100 system to those processed on the AST SHS 1000 system.
Conclusion
In this article, we describe a procedure for temperature adjustment of different RTP systems by making use of the thermal features of titanium silicides. Process transfer of the RTP nitridation of titanium to form a diffusion barrier from one RTP system to another, for example, can cause severe problems, because temperature differences of alternatively used RTP machines may lead to process instabilities and yield loss. We present two emissivity-independent methods of comparing and adjusting wafer temperatures of different RTP systems, monitoring TiSix sheet resistivities, or measuring titanium film stress. In the case of the Ti nitridation process, these methods offer the additional advantage of being performed on the layers whose temperature treatment is most important for successful processing.
Temperature comparison of two RTP systems yielded a temperature difference that was compensated by adjusting the emissivity parameter of one system, a procedure that immediately resulted in an improvement of the relevant electrical parameters of CMOS wafers. Sheet resistivity and film stress measurements both offer fast, reliable, and sensitive tools to observe and correct for potential temperature offsets between different RTP systems. These techniques, therefore, provide efficient means to reduce process and yield problems, facilitate equipment backup strategies, and enhance throughput.
Acknowledgments
The author would like to thank all the wafer fabrication engineers and operators at Austria Mikro Systeme International AG who supported this project.
References
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Ingrid Jonak-Auer received her MS in physics and mathematics from the University of Vienna and her PhD in materials science from the University of Leoben, Austria. She works as a process transfer engineer at Austria Mikro Systeme International AG, Schloss Premstätten, A-8141 Unterpremstätten, Austria; ph 43/3136-500-187, fax 43/3136-525-01, e-mail [email protected].