Technology News
10/01/2001
OLED displays gain on LCDs
An organic light emitting diode (OLED, Fig. 1) display technology has been developed that exhibits up to 16 million colors. Based on Kodak patents, the full-color active matrix OLED developed by eMagin Corp., Hopewell Junction, NY, contains more than 1.5 million individually addressable picture elements.
For objects to look "real," a display must be able to render a wide range of colors and shades. With a limited color gamut, for example, images may look slightly washed out, appearing more pastel than vibrant. eMagin's displays have a balanced full-color spectrum that adjusts the red, green, and blue relative intensities to create an acceptable-looking white, stated Webster Howard, eMagin's VP of technology. Optimal white balance may vary with individual preference, but the overall effect is fuller, deeper colors, exceeding that of current notebook-type LCDs.
While LCDs dominate the flat panel display (FPD) market, there is room for improvement, such as better color range and dynamic response for fast-action videos like sports broadcasts. For TV applications, improvement in viewing angle is needed but often conflicts with the response time. And from a cost perspective, they are 2-3x more expensive than cathode ray tubes (CRT).
Most R&D laboratories still use CRT displays, and miniature CRTs are frequently used in camcorders and other viewfinder applications. CRTs have better temperature and pressure ranges than LCDs. However, size, weight, high-voltage requirements, color resolution limitations, and high cost make them a less attractive microdisplay solution unless extreme operating conditions are required, such as being outdoors during the winter.
 Figure. 2. The wider range of colors demonstrated by eMagin OLED displays makes objects appear more real and colors more vibrant. |
With the advent of laptops, FPDs have offered low power, high luminance, lighter weight, easy integration with optics, and more recently, the capability for integration on silicon ICs to provide systems-on-a-chip. High-resolution images make them suitable for mobile information products such as portable computers, wireless Internet viewing, portable DVD players, gaming platforms, and wearable computers. Most direct-view color OLEDs use three independent emitting materials to obtain red, green, and blue primaries. In microdisplays, the color subpixels are only a few microns wide. Filters are patterned at these dimensions and OLED pixels are made correspondingly small. To enhance color quality (Fig. 2), eMagin modifies the color filter structures using a proprietary process, said Howard.
eMagin's 0.62-inch (diagonal) active screen has more than 1.5 million potential color subpixel elements (600 x 3 x 852 pixels) and 52 more imaging columns than standard SVGA displays. The large numbers allow the display to run either 600 x 800 pixels in order to interface to the analog output of portable computers or 852 x 480 pixels in a 16:9 widescreen entertainment format. Color and luminance information at each pixel element is stored in the display array, decreasing flicker and color breakup.
In the next few years, the industry can expect improvements in life, efficiency, cost, and penetration of OLEDs into market segments currently dominated by LCDs, noted Howard. Large-screen OLEDs will take longer to appear.
Don't "go copper" without barrier knowledge
Nondestructive laser-induced sonar technology is proving valuable for simultaneously measuring thicknesses of tantalum (Ta) and tantalum nitride (TaN) layers being developed as barriers in copper dual-damascene processing. As the accompanying wafer maps show, this can be done accurately with either film on top. The technology is also capable of metrology throughputs as high as 60 wafers/hr with a standard deviation <0.4% and provides film density values that indicate the quality of compound barrier films such as TaN. Density fluctuations can indicate process parameter changes such as gas flow rate, nitrogen content, or temperature.
Briefly described, the technique focuses or "pumps" a 10-13 sec pulse on a wafer surface that causes a fraction of a nano-Joule of energy to be absorbed, thus generating a sound wave that bounces back and forth inside the underlying structure. When the sound wave encounters a film interface, part of the wave is reflected and returns to the surface as an echo. This causes a small change in optical reflectivity that is measured by a second "probe" pulse from the same laser.
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Sean Leary, advanced applications engineer at Rudolph Technologies, Flanders, NJ, tells Solid State Technology, "For films whose thickness is comparable to the laser absorption length — a couple hundred Å— the picosecond sonar response is in the form of damped oscillations because the initial uniform heat distribution sets the film into vibration. So, the thickness of the film is determined from the period of the oscillations and the density is determined from the damping decay rate." The reflection from the underlying oxide occurs at a later time than is needed for barrier determination, as the oxide is usually much thicker than the barrier.
Ta and TaN refractory-metal barrier layers are crucial to copper dual-damascene to prevent copper mobility in oxides and low-k dielectrics, which lead to electrical leakage and silicon contamination. They may also promote preferential grain orientation and thus enhanced electromigration resistance of subsequent copper depositions (see www.novellus.com/damascus/tec/tec_05.htm). Barrier layers also promote adhesion between an oxide or low-k dielectric and the copper; adhesion must be sufficient to prevent metal line peel-out during CMP.
However, it is imperative to monitor the thicknesses of these barrier layers so that less resistive copper occupies the maximum cross-sectional area in a device. Ta and TaN combinations have resistances of 150-300µΩ-cm compared to copper's resistance of 1.7µΩ-cm; lower resistance produces faster, more energy-efficient devices. "Process engineers must obtain the thinnest possible barrier layer with sufficient mechanical strength. Different combinations of Ta and TaN layers are currently being explored," says Leary.
To test this technique, engineers at Rudolph Technologies used wafers with Ta and TaN on oxide; the films were deposited from a single sputtering module, with the TaN film reactively sputtered in ionized nitrogen plasma because the stoichiometry and density of this film depends strongly on gas flow rate, nitrogen content, and temperature.
The nine-point map (see part a of the figure) of TaN on Ta reveals both films are center-thick and edge-thin. These data show that the laser-induced sonar technique measured a thickness of 127Å for the underlying Ta film and 326Å for the top TaN film. The density of the TaN was 13.0±0.1 g/cm3, which is consistent with density results from x-ray reflectivity measurements on single-layer TaN films.
 Wafer contour maps of a) TaN on Ta and b) Ta on TaN as simulanteously measured by the Rudolph MetaPULSE, which uses nondestructive laser-induced picosecond sonar. |
The 49-point high-resolution map (part b of the figure) of Ta on TaN shows significantly more detail. For example, the underlying TaN film varies from the thick center to the thinner edges in a symmetrical circular pattern. The top Ta film is less symmetrical, and is thinner in the middle than on the edges. These data show a Ta film thickness of 88Å over 339Å of TaN.
Rudolph engineers used repeated static measurements at the center of tested wafers to determine the repeatability of the laser-induced sonar technique (see table). The TaN-Ta combination showed percent standard deviation <0.4% while the Ta-TaN combination was <0.3%, excellent repeatability results that clearly demonstrates the capability of measuring thin bi-layer barrier stacks. — P.B.
Overcoming stiction in MEMS
A coating technology has been developed by Specialty Coating Systems (SCS), Indianapolis, IN, to overcome stiction — interfacial adhesion between contacting microstructure surfaces — a phenomenon that can disable mechanisms in microelectromechanical systems (MEMS).
Using a vacuum-deposited poly-para-xylylene (parylene) as a means of modifying surface properties and reducing stiction, SCS has demonstrated encouraging preliminary results.
Because of their micron-size components, MEMS microengines have virtually no inertia and therefore can theoretically be operated at speeds of >500,000 rpm. However, static forces, surface tension, friction, and capillary forces traced to manufacturing liquid residues or ambient humidity can impose mechanical limitations. At the atomic level, a force known as stiction can attract MEMS elements to one another, effectively limiting their motion. The mechanical activation forces in a MEMS device may be too weak to overcome this stiction, particularly in devices incorporating sliding components with relatively large surface areas.
Organic polymers with low surface energy, such as parylene, can potentially alleviate stiction forces in MEMS construction. Parylene, a thin transparent polymer film, is applied to substrates in an evacuated deposition chamber by means of gas phase polymerization. The raw material, di-para-xylylene, a white crystalline powder, is vaporized at ~150°C, molecularly cleaved or pyrolyzed in a second process phase at 680°C to form the diradical, para-xylylene. The diradical is then introduced as a monomeric gas that polymerizes on substrates in the vacuum chamber at room temperature. Substrate temperatures remain near ambient. There is no liquid phase —no pooling, bridging, or meniscus properties on coated surfaces. The coating grows as a conformal film on all exposed surfaces, edges, and in crevices. Since no curing is required, no cure-related hydraulic or liquid surface tension forces occur in the process.
And the process does not require catalysts or solvents.
A complementing benefit of parylene for MEMS applications is dry film lubricity. The material exhibits static and dynamic coefficients of friction in the range of 0.25-0.33 (ASTM D 1984). The configuration of a MEMS device will determine coefficient of friction requirements, based on the surface areas in contact.
The mechanical dampening and loading effects of parylene films are small due to its extreme thinness and the resulting low mass. The thickness of the film is related to the amount of vaporized dimer and dwell time in the vacuum chamber. Typically, coating thicknesses from 0.1-75µm can be applied in a single operation at a typical rate of 5µm/hr. Accuracies to ±10% of final thickness have been demonstrated. Further, SCS has developed a process which has produced a minimum parylene film thickness of 500Å, which is an order of magnitude thinner than that achieved by conventional parylene deposition methods. At these thicknesses, film mass and mechanical loading effects are minimal, while lubricity and anti-stiction characteristics are imparted to coated parts. In addition to silicon, the polymer can also be deposited on glass, metal, paper, resin, plastics, ceramic and ferrites.
Currently, parylene vacuum deposition is a batch process; however, SCS is developing new methods for integration with other MEMS production steps. The goal is to continue partnering with MEMS developers to address the physical challenges that are associated with manufacturing small electronic devices.
Higher-density packaging innovations continue
Addressing ongoing needs for greater microelectronics density in end products, leading back end fabs, including Amkor and ChipPAC, are continually coming up with innovative uses of conventional processes that stack more ICs into a given package form.
For example, even with the ability to stack up to three chips within a package, Amkor Technology, Chandler, AZ, is now stacking very thin packages themselves, using a BGA package dubbed etCSP. Because stacked packages are fully tested and burned in (i.e., "known good devices"), they provide reliability and flexibility to designers who need to add product performance without increasing size.
Individual etCSPs are made with a thin-core organic laminate using 0.3mm-dia. solder balls on a 0.5mm pitch. Conventional mold compound holds wire-bonded die in the "bottomless" cavity of the package.
Amkor's Product Manager David Zoba said, "Stacked etCSPs allow a 'system in a stack' approach to mixing different technologies such as memory, logic and mixed signal in a thin or small form factor. Because individual packages have already been tested and verified, the system in a stack approach provides much greater flexibility when integrating various devices into an optimized system, such as Bluetooth."
Stacks of two packages have a height of 0.7-1.0mm, three packages 1.1-1.7mm. Package thickness depends on the number of circuit layers required at the bottom of the stack. The initial adoption of etCSP was for PCMCIA Type II removable hard disk drives. Now they are being evaluated for MP3 players and Flash memory cards.
Another new package option is ChipPAC's three-die-stacked SiP (system in a package). Without increasing package size or thickness, SiP increases functionality within the same board space and reduces handling, assembly and test costs. According to Marcos Karnezos, CTO at ChipPAC, Fremont, CA. "This technology is ideally suited for integrating DSPs or ASICs with two memory chips (e.g., Flash plus SRAM), primarily for handheld and wireless handset markets."
Dennis McKenna, CEO of ChipPAC, noted, "Wireless communications, the semiconductor industry's fastest growth market segment, is expected to grow at an 18% CAGR over the next 3 to 4 years. To compete successfully in this arena, cell phone and PDA suppliers are going to need 256Mb of Flash and 128MB of RAM memory. The fastest, most cost-effective way to achieve these densities is to continue to produce proven lower-density devices, with their higher yields, and stack them in a package."
Briefly described, the ChipPAC process begins with thinning wafers to 140Åm; thicknesses <100Åm are being developed, enabling even higher packaging density. The assembly process uses reverse wire bonding and loop control. Here, a gold ball is placed on the die pad and then wire bonding is completed by stitching from the substrate to the ball, thus eliminating any need for larger die bonding pads die and reducing wire loop height, which would add to package thickness.
ChipPAC is already in volume production with 2-die-stacked SiPs. Three-die-stacked SiPs with 1.4mm height are available now; 1.2mm versions will be available in 1Q02.
Karnezos noted that the industry will certainly want to go beyond three die, but because the yield of individual die begins to bring down the yield for these "multichip modules," packaging innovations with more than three die will most likely be done by stacking packaged and tested die. "We are in the process of developing this while still maintaining the overall thicknesses that the industry will need," he says. — P.B.
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Tech Briefs
Shallow, but heavily doped junctions required for sub-70nm transistors cannot be made easily by conventional thermal processing; the slow temperature ramp of the entire wafer causes dopant ions to diffuse. Laser thermal processing (LTP) offers a potential solution: melt just the surface of the wafer with laser pulses, leaving the interior cold! A new joint research center in San Jose is intended to develop just that technology, with Varian Semiconductor Associates Inc. providing the required pulsed-plasma implant technology, Ultratech Stepper's Verdant subsidiary developing the LTP technology, and Tokyo Electron Ltd. providing the PVD capping layer that keeps everything in place.
Ultratech CEO Art Zafiropoulo anticipates that the die-by-die annealing process will produce 300mm wafers at a 50-60 wph rate. The center should be open functionally this year, said Zafiropoulo. "Within the next year, we should have software and hardware solutions for 70nm," he said. While the work will focus on ultra-shallow junctions, it may extend beyond to gates as well, he predicted.
The biggest step to get low-k dielectrics into fab lines is also a breakthrough in management, not technology. Dow Chemical Co. has organized an alliance of suppliers to speed up development of all the processes that will have to be integrated to make low-k materials workable. "SiLKnet seeks to prime the pump so all these different companies can get wafers in parallel," explained Dow Chemical's Mark McClear, global business director of advanced electronics materials. "We've secured a source of wafers we can process up to a certain level and then send them out to companies to develop the process, so they don't have to wait for months for the wafer to pass through the process." The SiLKnet alliance includes Arch Chemicals, Ashland Specialty Chemical, Dainippon Screen, EKC Technology, Ferro Corp., Planar Solutions, Supercritical Systems, Tokyo Electron, and Verteq. Discussions with more suppliers are continuing.
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 Brittlestars, relatives of the starfish, have an eye design that may be useable for future lens construction. (Courtesy of Bell Labs) |
Brittlestar eyes: Key to future microlenses?
Scientists from Lucent Technologies Bell Labs have discovered that chalk-like calcite crystals in the skeletons of marine creatures called brittlestars have a dual function — acting as armor as well as optical receptors for an all-seeing compound eye. Researchers said the calcite microlenses expertly compensate for birefringence and spherical aberration, and they hope to mimic nature's success and design microlenses based on the brittlestar model. Such lenses may prove useful in chip design, where they could possibly improve optical lithography techniques. The lenses focus light about 5µm below their surface. Nerve bundles run through the skeleton underneath the lenses, which are thought to pick up the light signal. Thousands of the crystals form a primitive compound eye that covers much of the organism's body, possibly to help detect and escape predators. The discovery of the use of calcitic crystals as optical detectors by brittlestars was made by a team of researchers from Bell Labs, the Weizmann Institute of Science in Israel and the Natural History Museum of Los Angeles County.