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CaF2 birefringence workshop reaches consensus


09/01/2001







CaF2 birefringence workshop reaches consensus
Attendees of a worldwide workshop on "intrinsic birefringence" in CaF2 — a key material for future 157nm lithography — agreed that this phenomenon does not constitute a showstopper. One International Sematech workshop participant at the Semicon West conference observed, however, that "the problem is worse than they are admitting," and predicted a one-year delay in developing 157nm exposure tools. Since other programs are lagging the exposure systems, however, such a delay is unlikely to impact the roadmap.

Intrinsic birefringence in high-symmetry materials such as CaF2 results from the atomic nature of matter. In crystals, the atoms are organized in planes with a spacing much less than the wavelength of light, making these materials appear homogeneous and isotropic. However, 157nm light is not so much larger in wavelength than the spacing between certain planes, so that atomic effects are not entirely absent. Sematech's Materials Research Program, under Chris Van Peski, contracted with NIST to investigate this theoretical possibility.

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Worst-case birefringence for light propagating through a) CaF2 and b) BaF2 along the [110] crystal axis as a function of wavelength. The vertical axis shows the difference in indices of refraction for light polarized along the [-110] and [001] directions.

Round-robin measurements reported at the workshop confirmed an intrinsic birefringence of 12nm/cm for CaF2, in general agreement with theory, and a birefringence of the opposite sign for BaF2. The effect scales with 1/wavelength2, apparently becoming insignificant for most 193nm designs. Light propagating in the (110) crystal directions encounters the largest effect, which may necessitate re-orienting the crystal axes in future lens elements. Interestingly, the problem was determined to be twice as bad as was originally thought; a lens coating in the metrology equipment used to measure the error had a mitigating effect.

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Lens designers and exposure tool manufacturers have multiple techniques to minimize the impact of birefringence on imaging at 157nm, according to the workshop's final report. Optical Research Associates is modifying Code V, its sophisticated lens design software, to incorporate this new effect and expects to have revised code available in 4Q01. Proprietary design software at optics houses reportedly already includes intrinsic birefringence, but requires manual optimization of lens designs. Nikon reportedly showed an impressive simulation where imaging effects of this new aberration were cancelled by "clocking" lenses, or turning them at various angles to each other.

Still, phase measuring interferomentry systems for full-scale lenses and lens elements do not yet exist at 157nm, and they will have to be developed to evaluate this and other imaging imperfections. Lens elements may have to be split into groups with elements having different crystal orientations, adding surfaces and complicating designs. While not a showstopper, intrinsic birefringence does appear to make the design and construction of the low-aberration projection lenses (total error <4nm) needed for low k1 imaging at 157nm even more laborious.

One participant predicted that meeting the resolution requirements will now require even better optical material and crystal blanks cut along different axes. However, identifying this problem early will facilitate developing timely solutions, and Sematech deserves credit for spearheading that effort. —M.D.L.

A new spin on quantum computing
For almost 10 years, David Awschalom, director of the Center for Spintronics and Quantum Computing at UCal-Santa Barbara (UCSB), and Nitin Samarth, professor of physics at Penn State University, have collaborated on topics including the optical and electronic properties of 2-D systems and a variety of matter structures. In particular, they have been trying to integrate magnetics into semiconductors.

Two papers, one in Science (6/29/01), the other in Nature (6/14/01), describe their latest discovery (see figure) — a revolutionary approach to quantum computing by preparing a superposition of spin states of electrons in semiconductor materials (i.e., a superposition of the wave equations representing the spin states). "Both of the UCSB experiments are based on novel time-resolved optical techniques developed by the group during the past few years," notes Awschalom. "The experiments were conducted using very new femtosecond-resolved optical techniques to directly monitor the spin dynamics as a function of time. The Nature paper shows it is possible to prepare a superposition of states and physically 'drag' them through semiconductors and heterostructures [junctions]. The Science paper announces a technique for manipulating quantum electron spin states on ultra-fast timescales for quantum computing."

By applying an electric field to a carefully prepared sample of GaAs, the spins of the carrier electrons were aligned in a particular manner and, as the electron cloud moved across the interface into the ZnSe portion of the sample, the spin alignment carried over to the ZnSe side. The spin states were maintained by using ultra-fast laser pulses to manipulate them. "The materials chosen to conduct the series of experiments were particularly crucial in achieving unambiguous results," states Samarth. "By coincidence, ZnSe has an energy gap and carrier electron spin precession frequency that are very different from GaAs. However, the lattice spacing of ZnSe is very similar to GaAs and their crystal structures are identical so the chances of dislocation faults, lattice disruptions, and other defects are minimized. If the precession frequencies of the two materials weren't very different, it would be difficult to unambiguously distinguish the origin of the electrons as their movement between interfaces is monitored."

When asked why this phenomenon hadn't been observed before, Awschalom says that the project's success was the direct result of having the right materials and the right experimental technique at the same time.

"People didn't look for this before because theoretical studies indicated that it would be difficult to achieve the result," explains Awschalom. "But we tried it anyway."

Quantum devices require a quantum state. Some schemes that have been tried in order to achieve quantum states in quantum devices are nuclear spins, atoms, or trapped ions. But according to Awschalom, in order to develop a scalable semiconductor system, quantum devices must be able to achieve a specific state on demand and do so very quickly — within the lifetime of the quantum state itself. Spintronics fulfills these requirements and, as Samarth notes, it has the added benefit of leveraging the extensive knowledge already in place regarding the intrinsic properties of semiconductors. The fact that the researchers on this project were able to make the spin states survive for long times relative to the coherence time — the length of time that electron spins stay aligned before being affected by environmental influences — is key to the usefulness of the discovery when applied to scientific, industrial, or consumer applications.

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Optical control of spin. a) The electron's motion about a nucleus may be visualized in analogy to the Earth's orbit around the Sun. As the Earth rotates on its axis during orbit, so too does an electron "spin" about on axis as it moves. b) The axis of an electron spin points in a variety of directions that are constantly changing. However, because the electron's spin behaves as a miniature bar magnet, alignment is possible by applying magnetic fields. c) Research into "spintronics" (spin-based electronics) approaches spin in two ways: Classical, in which spins are either "up" or "down" with respect to an applied field (like computer bits "1" and "0"); and Quantum, in which spins can be combinations of up and down ("qu-bits" for instance, can be 35% "1" and 65% "0"). d) Using intense laser pulses, electron spins in semiconductors can also be oriented, controlled, and measured. e) The time it takes to "tip" the electron spin is limited by the laser pulse width (100femtosec—1 trillionth of an eye blink). Source: UCal Santa Barbara, College of Engineering.

While both physicists have emphasized that there is much work to be done with their findings in order to produce useful devices, it is expected that the discovery will lead to ultra-high speed computers with extremely high-density storage capabilities all with the added bonus of needing very little power. "Flipping spins takes very little power and generates very little heat vs. using electronic currents," notes Awschalom.

"By using spintronics to combine magnetism and semiconductors into a single device comprising both logic and storage, you might never need to reboot your computer again. A company in Japan is already prototyping a high-frequency optical modulator for use in switching telecommunications equipment — frequencies of 1THz might be possible. Electron spin is one of the most promising methods to achieve quantum computing. If successful, it will lead to exponential increases in processing speeds."

CMP's 'center spike': A wafer problem
A long-standing CMP related yield
eliability puzzle — a thickness spike appearing at the wafer center after polishing — has been identified as a wafer problem. In a paper presented at Semicon West in San Francisco, Yehiel Gotkis, David Wei, John Boyd, and Rod Kistler from Lam Research Corp. discussed study results that point to a specific silicon wafer defect, occurring when the bare wafer has a narrow diplike defect, as the source of the center spike. The yield cost of the center spike is several dies/wafer, significant for high-value and large-size products.


Figure 1. Post-CMP optical images on the wafer center for wafers a) with a center spike and b) without a center spike support film thickness measurement results.
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The problem investigated in this study involves the upper layer film, which is highly uniform in the wafer center area prior to CMP. However, after polishing, a 3000Å (in most cases about 4-6mm dia.) thickness spike can appear, sporadically and unpredictably. The spike is located in the wafer center and shows little response to CMP process parameters. This phenomenon has been observed with all three CMP techniques — rotary, orbital, and linear — and appears both in oxide and Cu CMP. The problem is typically associated with specific lots, appearing in a number of the wafers, though it may also occur randomly for isolated wafers. Until now, the center spike has been attributed to the CMP process, though lacking in substance. The sporadic nature of the spike has made it a difficult problem to tackle.

For oxide processes, the spike is clearly observed, even visually, as a well-shaped, dark colored circle at the wafer center. The Cu-CMP process is particularly sensitive to the center spike problem because it requires serious over-polish for most of the wafer area, affecting most of the wafer dies when the spike appears.

To investigate the origin of the center spike, wafers with the spike and normal ones without were selected from a single lot and tested. Each underwent a pre-CMP ILD optical film thickness measurement, oxide film planarization, post-CMP optical film thickness measurement, surface profilometry, HF oxide etch and surface profilometry.


Figure 2. Following an HF etch to remove the oxide film, surface profiles comparing wafers a) with center spike and b) without indicate a dip at the center of the bare wafer surface in the case of a spiking wafer.
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Pre-CMP oxide film thickness measurements for both spiking and normal wafers showed extremely uniform and nearly identical thickness distributions in the center wafer section. But post-CMP film thickness profiles demonstrated sharply different behavior, the spiking wafers showing extremely low removal rates at the wafer center, resulting in a center thickness spike. Optical images of the central area (Fig. 1) demonstrated a colored, well-shaped circular spot in the wafer center indicating local thickness increases, supported by the optical film thickness measurements. The normal wafer did not show any color change in the central area.

Surprisingly, surface profilometry did not reveal any height increase in the spike location, according to Gotkis; both spiking and normal wafers showed reasonably flat surface profiles in the central section. The only explanation was that the thickness increase is associated with an oxide intrusion into the depth of the silicon wafer. To verify this assumption, the oxide film was HF etched and the silicon surface profiled. The results shown in Fig. 2 clearly indicate a diplike defect or a narrow oxide filling in the center of the bare silicon wafer, not a spike.

Oxide deposition, having high step coverage properties, follows the profile of the bare silicon wafer and fills the dip, uniformly covering the wafer surface. Subsequent optical thickness measurement tools, being insensitive to height variations, do not detect the dip. When the uniformly thick, but topographically non-flat, upper film is transformed by CMP into a planarized flat-top film, inevitable thickness variations result as the topography of underlying silicon surface (thin elevated sections and thick low sections) remain unchanged. CMP is performing as intended. The higher the CMP planarization efficiency and the narrower and deeper the defect, the more pronounced the spike pattern. According to Gotkis, given the proposed origin, yield failures related to the center spike are most likely associated with ILD under-etched plugholes resulting in electrical opens.

One potential reason for the central dip was investigated: thermal shrinkage of the over-stressed silicon. If this were the case, the depression would appear on the wafer backside as well. The backside of the spiked wafer was slightly polished to reduce the surface roughness (and related profilimeter noise) and the back surface profiled. However, no signs of depression were observed in the wafer center, most probably indicating that the depression at the center of the spiked wafers is not due to thermal shrinkage. While more studies are underway to find the cause of the spike, identifying it as a diplike defect in the center of the wafer gives fabs additional information in addressing yield issues.