Picosecond sonar used to characterize copper processes
09/01/2001
Guray Tas, Chris Morath, Michael Colgan, George Collins, Jana Clerico, Rudolph Technologies Inc., Flanders, New Jersey
overview
In an industry where process control has always been critical in maximizing yield, the switch to copper interconnects makes process control even more challenging. Proven aluminum processes must be abandoned in favor of the processes required by copper, and the dual move to smaller design rules and larger wafers brings challenges of its own. To facilitate the transition, accurate and detailed characterization is necessary. This article discusses picosecond sonar, a noncontact optical technology used to characterize individual layer thicknesses of multilayer stacks in the range from 40Å to 5µm.
During full production, tight process control becomes the priority. With the move to copper, each step must be optimized to maintain high yields. The addition of 300mm increases the cost of process excursions; a finished 300mm wafer is expected to be 1.5 times as expensive as a comparable 200mm wafer [1, 2].
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Traditionally, much of the process control has been achieved through use of test wafer metrology. Single-layer blanket films on test wafers are measured using sensitive and repeatable metrology techniques, but these involve large spot sizes and are limited to a single layer. With 300mm wafers, the expense of the test wafers and the production capacity lost to processing them has made this approach prohibitive.
Cluster tools also reduce the effectiveness of test wafers. By grouping together tools of sequential wafer-processing steps inside a single vacuum environment with robots handling the wafers, the potential for contamination and mishandling between process steps is eliminated. Wafer handling can generate up to 50% of the defects [3].
Optimal process control calls for a metrology system that can nondestructively measure, at high speed, the tiny test site structures that exist in product wafer scribe lines. In order to measure on product wafers, the metrology system must also be immune to interference from underlying structures. One such technology that meets these requirements is picosecond sonar.
Picosecond sonar metrology
Picosecond sonar is a noncontact optical technology capable of simultaneously measuring individual layer thicknesses of a stack with up to five layers. Resolutions are in the range from 40Å to 5µm, with typical accuracies of 1-3%, precision of 0.5-1%, and long-term repeatability of ±1% or better. In many cases, picosecond sonar can also characterize film density, roughness, adhesion, and stoichiometry [4].
Picosecond sonar uses an ultrashort, 10-13-sec laser "pump" pulse of a fraction of a nanojoule of energy, focused to a 10 x 15µm spot. Partial absorption of the laser pulse creates a sound wave that travels down through the multilayer structure. When the sound wave encounters an interface, part of the wave is reflected and returns to the surface as an echo, the arrival of which causes a small change in the surface's optical reflectivity. A delayed portion of the original pulse, termed the "probe" pulse, measures the change in reflectivity and detects the return of echoes to the surface of the film stack [5].
For a thin film with a thickness comparable to the laser absorption length (a few hundred angstroms), the picosecond sonar response is a damped oscillation due to the initial uniform heat distribution, which causes the film to vibrate. The thickness of the film, d, is determined from the period of the oscillations, t, by
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where n is the sound velocity of the film. The damping rate of the film, G, can be used to determine the acoustic impedance of the film via:
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where Z = rn defines acoustic impedance, r is density, and Zf and Zs are the acoustic impedances of the film and the substrate, respectively [6]. The acoustic impedance is correlated with film density.
Typically, in thin film measurement techniques, like surface acoustic wave and x-ray-based opaque film metrologies, signals from all layers, levels and structures within the probe beam's penetration depth arrive simultaneously at the detector. In picosecond sonar, however, as sound waves move down the stack, echoes from sequentially deeper interfaces return to the surface separated in time. Responses from layers underlying those of interest can be excluded by simply not collecting the later-arriving echoes. Also, the incident pulse's focused spot size allows individual tests of structures as small as 50 x 50µm and high-lateral resolution measurements out to the wafer's edge.
Copper dual-damascene process
Unlike aluminum, copper has proven to be difficult to etch directly, which led to the development of the dual-damascene process for copper interconnects. In this process, trenches and vias are plasma-etched into a dielectric, covered with a barrier layer, then filled with a layer of copper. The excess copper is removed by chemical mechanical polishing (CMP). The copper lines are separated into individual wires by the dielectric. The dual-damascene process flow reduces the number of steps in building multilevel copper stacks by ~30%, thus reducing costs relative to aluminum-based metallization [7]. A single cluster tool typically deposits both barrier layer(s) and copper seed layer. For product process control, picosecond sonar can measure these bilayer or multilayer stacks. High-lateral resolution scans of electroplated copper layers up to 5µm thick, needed to characterize and control the electroplate process, can also be achieved. Results for picosecond sonar dual-damascene measurements are shown in the table on p. S15.
Barrier layer measurements
Copper has a very high diffusivity in silicon and silicon dioxide. Copper penetration into device active regions can cause device failures through increased leakage currents and unacceptably high carrier recombination rates [8], and diffusion into the interlayer dielectric (ILD) can degrade dielectric properties. To prevent diffusion and provide sufficient adhesion between the ILD and copper lines to inhibit line tear-out from the mechanical stress of CMP, both the trenches and vias must be lined with a uniform and conformal barrier layer. The barrier layer must also have good thermal stability and step coverage. Currently, the most suitable candidates are tantalum (Ta), TaN, and Ta/TaN, with tungsten nitride (WN) showing promise.
As design rules shrink, total resistance of a line, determined by the cross-sectional area of the barrier layer and the copper sandwiched inside it, can increase. Ta and TaN combinations have resistivities of 150-300µW-cm compared to copper's resistivity of 1.7µW-cm [9]. To lower total line resistance for faster devices that are more energy efficient, the thickness of the barrier layer must be minimized and the cross-sectional area of the copper maximized. Smaller design rules also result in higher aspect ratios (the ratio of line depth to line width), so barrier conformality becomes more critical to achieve the desired bottom and sidewall coverage [10]. A thick top layer can cause uneven copper fill and present challenges in the CMP step. Also, copper agglomeration on either the top or the sidewalls may generate voids in the line structure [11]. The ability to monitor a wide range of thicknesses and to provide a conformal profile of the barrier layer becomes increasingly important.
Picosecond sonar results from four different types of barrier layers: Ta, TaN, Ta/TaN, and WN are shown in Fig. 1. Measurements were taken with Rudolph Technologies' MetaPULSE, a picosecond ultrasonic laser sonar (PULSE) technology. The examples chart the change in optical reflectivity vs. time in picosec., as echoes from the laser pulse return from film interfaces to surface. In each chart, the black line is the measured response and the red line is the best fit from a modeling algorithm, showing the results' reliability. The algorithm can simultaneously determine multiple film parameters by taking into account sound velocity, density, and optical constants of the film and substrate. Results for the Ta and TaN layers of 100-2000Å thickness show 0.6% precision, 0.7% long-term repeatability. WN layers of 200-2000Å thickness have 0.25% precision, 0.3% long-term repeatability.
The diffusion barrier can also be a bilayer stack, for example, a thin Ta layer covered with a thicker TaN layer. The combination may provide better barrier and adhesion characteristics than a single layer of comparable thickness. Figure 2 shows the simultaneously determined thickness profiles of a two-layer film, 325Å TaN over 100Å Ta, based on nine measurement points on a 200mm wafer. The standard deviations of 10 static repeats at the center of the wafer were 0.8% and 0.6% for the Ta and TaN layers, respectively. From the best fit, the density of the TaN layer was determined to be 13g/cm3. This is in good agreement with the density results from high-resolution x-ray reflectivity measurements on single-layer TaN films.
Simultaneous measurements
The copper seed layer acts as the cathode for the subsequent copper electroplating. The uniformity of the copper seed layer is a key determinant for the uniformity of the electroplated layer [12]. Therefore, step coverage, conformality, and texture are important properties in the seed layer just as in the barrier layer. The barrier and copper seed layers are usually deposited in a single cluster tool to avoid barrier oxidation for low barrier resistivity and good adhesion between the layers.
 Figure 4. Forty-nine-point thickness uniformity maps of individual layers from a copper seed/TaN barrier stack on a 200mm wafer with a) 1650Å Cu seed and b) 200Å TaN. |
Comparisons of echoes from five different copper seed/barrier stacks (the 1683Å Cu/351Å Ta is repeated twice for clarity) are shown in Fig. 3. The top row of reflectivity profiles was obtained from barrier layers covered with a copper seed layer ~1700Å thick. Underneath the seed layer, are Ta barriers of 200, 275, and 350Å (left to right). Note that, as the Ta layer gets thicker the shape of the echoes changes. In the reflectivity profiles shown in the bottom row, the underlying barrier layer is ~350Å and the copper seed layer thickness is 1050, 1700, and 2100Å (left to right). As the copper layer gets thicker, the position of the echo in time increases (note the changes in the time scale). In all the graphs, the black trace is the measured echo and the red one is the best fit determined by the forward modeling algorithm with the indicated thickness combinations. These time/depth-resolved changes in sonar echo shapes and times are easily observed. Multilayer metal stacks such as these can be measured with 0.4% precision and 0.5% long-term repeatability for copper layers from 200-3000Å, and with 1.0% precision and repeatability for underlying Ta or TaN layers from 60-500Å.
 Figure 5. Thickness uniformity maps of 1.0µm electroplated copper deposited by a) multiple-point electrode deposition and b) continuous ring electrode deposition. |
Figure 4 shows high-lateral resolution conformality maps of both a 1650Å copper seed layer and a 200Å TaN underlying barrier layer. These maps were obtained simultaneously from a 200mm silicon wafer using a 49-point pattern. The measurement locations are indicated by (+) and (-) on the map. The average copper seed thickness variation from center to edge is approximately 15%, while the TaN thickness variation is approximately 18%.
Measurements of electroplated copper
The next step in the dual-damascene process flow is filling and covering the vias and trenches with a thick, electroplated copper layer. The excess copper is then removed by polishing down to the top of the trenches by CMP. Most current generation ICs have 4-6 copper interconnect levels, requiring the entire barrier, seed, electroplate, and CMP process be repeated several times on a single wafer. In order to achieve good planarization for the succeeding level, it is crucial that the electroplated copper layer be uniform all the way to the edges of the wafer. Poor overall thickness uniformity, or a thick edge profile, may cause the CMP process to erode trench structures in some areas of the wafer while not removing all the copper and/or barrier in other areas.
Therefore, uniformity and edge profile measurements with the required speed, accuracy, spatial resolution, and immunity to interference from underlying levels or structures are needed.
Two common geometries for placing the electroplating electrodes are multiple point and continuous ring. The electrodes contact the copper seed layer at the periphery of the wafer. Thickness uniformity maps of electroplated copper layers deposited with the multiple-point (Fig. 5a) and continuous ring methods (Fig. 5b) were taken before either process was optimized. The target thickness of the copper layer on both wafers was approximately 1µm. The 49-point maps clearly show a different pattern in copper deposition. The maps indicate it is possible to determine where the individual electrodes were connected to the wafer, with Fig. 5b displaying a more circular pattern from the continuous ring electrode. This type of information can be used to optimize the electroplating process by adjusting electrode placement, the chemistry of the plating solution, and the electroplating current-ramp. The characterization/ optimization process has been shown to produce smooth electroplated copper films with a thickness uniformity of 1% or better. Information about electroplated copper uniformity also provides valuable feed-forward information to help minimize CMP process excursions.
The thickness profiles in Fig. 6 are characterized on a line perpendicular to the notch of the wafers shown in Fig. 5 (before optimizing the electroplating process). The line scans were measured from -98.5 to +98.5mm on the wafer with 1mm resolution. The copper layers deposited using both electrode configurations is relatively uniform across most of the wafer. Approximately 10mm from the edge, however, the copper thickness increases dramatically. This is the region where the electrodes contact the copper seed layer. The change in thickness is probably due to the current density being higher in these locations relative to the rest of the wafer during the early stages of the electroplating process. More than just the surface profiles obtainable with a profilometer, the actual thickness of the copper layer at each point has been measured. This allows measurements of copper thickness over dense line arrays such as might exist in the patterned area of a wafer.
In the example shown in Fig. 7, the plating rate increased substantially over the 0.2µm, 50% dense copper line array. The resulting electroplated copper layer was determined to be approximately 2500Å thicker over the patterned than over the nonpatterned area. This information was used to refine the electroplating process to minimize the pattern-stimulated overfill effect.
Conclusion
We have demonstrated applications of the picosecond sonar technique for characterizing and monitoring the barrier seed and copper metallization processes involved in dual-damascene technology. Its ability to measure ultra-thin films makes the technique ideal for single-layer and multilayer Ta and TaN barrier process optimization and control. This multilayer film measurement capability also allows for the simultaneous characterization of seed copper/barrier film stacks, eliminating the need to use costly monitor wafers for each individual layer. Edge profiles of the electroplated copper layers up to 5µm thick and the degree of copper overfill over dense structures can be measured with high lateral resolution, in preparation for the subsequent CMP step. Picosecond sonar is also capable of developing and optimizing the CMP process and of monitoring the wide variety of process control problems that can arise during high-volume production [13].
Acknowledgments
MetaPULSE is a registered trademark and PULSE is a trademark of Rudolph Technologies Inc.
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Guray Tas received his PhD in condensed matter physics from Brown University. He is manager of advanced systems development at Rudolph Technologies.
Chris Morath received his PhD in physics from Brown University. He is the section manager of metrology and advanced systems development at Rudolph Technologies.
Michael Colgan received his PhD in physics from Rutgers University. He is metrology group leader at Rudolph Technologies.
George Collins received his PhD and MBA from Rutgers University. He is director of marketing at Rudolph Technologies Inc., One Rudolph Rd., Flanders, NJ 07836; ph 973/691-1300, fax 973/691-5480, e-mail [email protected].
Jana Clerico received her BS in electrical engineering from Stevens Institute of Technology, and her MBA from Fairleigh Dickinson University. She is director of marketing communications at Rudolph.