Issue



Fine control of low-temperature CVD epitaxial growth


07/01/2001







Virginie Loup, Jean-Michel Hartmann, Marie-Noëlle Séméria, CEA/LETI, Grenoble, France
Arkadii V. Samoilov, Lori Washington, Applied Materials, Santa Cl2ara, California

overview
In new generations of semiconductor devices, the composition of silicon-based epitaxial films becomes increasingly more complex, with the addition of not only dopants such as boron, arsenic, or phosphorus, but also germanium and, in some cases, carbon. Precise knowledge of deposition rates and atomic incorporation of various species into silicon is critical. Indeed, the continuing miniaturization of devices imposes more and more stringent requirements on the control of thickness and chemical composition of deposited films. Grading of incorporated species, such as germanium, in silicon-based films in exact conformance with a desired concentration profile is another challenge in device fabrication. Reduced pressure epitaxial CVD systems are demonstrating that they can achieve the required device profiles.


Figure 1. Typical temperature ranges of Si and SiGe selective epitaxial growth (SEG), blanket SiGe, and SiGeC processes in RP-CVD systems such as the Epi Centura. At right is a schematic of the Epi Centura system for low-temperature deposition. All the data in this paper were obtained on 100 200mm Si wafers.
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Typical temperature ranges of various epitaxial processes in reduced pressure chemical vapor deposition (RP-CVD) systems are shown in Fig. 1. The temperature range of Si deposition is limited by thermal budget restraints at the higher end of the range and by throughput restraints due to diminished growth rates at low temperatures. Selective processes use HCl2 to grow films on open Si areas, with no deposition on dielectric films. HCl2 reduces the silicon growth rate. It thus shifts the lower end of the temperature range to higher temperatures. The range of SiGe epitaxial growth is restricted due to formation of surface undulations and dislocations at high temperatures. At the same time, adding Ge to Si significantly increases growth rates and extends the practical interesting range of SiGe deposition down to lower temperatures. Finally, SiGeC is characterized by the lowest deposition temperatures among all epitaxial applications due to the specifics of carbon incorporation into silicon, which will be discussed below.

In selecting epitaxial process conditions for device manufacturing, one needs to consider, among other factors, thermal budget and throughput requirements. For increasing throughput without compromising on the thermal budget, single wafer cluster CVD tools with multiple deposition chambers such as the Epi Centura (Fig. 1) have proven production-worthy [1]. A dedicated chamber for pre-epitaxial cleaning further reduces the overall thermal budget and increases throughput as described elsewhere [2]. This article presents a detailed characterization of reduced-pressure, low-temperature CVD Si, SiGe, and SiGeC epitaxy and reports a novel method of CVD control.

RP-CVD epitaxial silicon deposition
Figure 2 shows the growth rate of epitaxial silicon as a function of inverse absolute temperature. For processes based on both dichlorosilane (SiH2Cl22) and silane (SiH4), there are two regimes [3-7]. At high temperatures, the growth rate is mass-transport-limited. Indeed, one can see from Fig. 2 that doubling the dichlorosilane (DCS) flow results in a doubling of the growth rate, whereas temperature does not significantly change the growth rate. A slight increase of the growth rate with the increasing temperature in this regime may be associated with an enhanced diffusivity of the reactant species in the gas phase at high temperatures.

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Figure 2. Epitaxial silicon growth rate as a function of inverse absolute temperature (Arrhenius plot) at a pressure of 20torr for two precursors, silane (SiH4) and dichlorosilane (DCS). Inset diagrams show hydrogen termination of silicon surfaces at high temperatures (mass-transport-limited regime) and at low temperatures (reaction-rate-limited regime).

The second regime is at lower temperatures, where the deposition rate decreases exponentially with the increasing inverse absolute temperature. The deposition is reaction-rate-limited. The activation energy inferred from the Arrhenius plots of Fig. 2 is approximately 2eV. This number for the activation energy, which appears to be characteristic of low-pressure silicon epitaxial processes [4, 5], is bigger than the value (1.5eV) found for both silane and DCS in atmospheric pressure processes [3]. The exponential temperature dependence of the growth rate is related either to temperature activation of chemical reactions in the gas phase or to desorption of hydrogen from the silicon surface in order for silicon atoms to be incorporated [6, 7].


Figure 3. Boron and phosphorus incorporation as a function of mass flow ratio of dopant source/silicon source for a) silane-based Si epitaxial growth at 725°C and b) DCS-based growth at 775°C. The growth pressure was 20torr.
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Next, we proceed with the characterization of dopant incorporation in RP-CVD. The dopant mixing system is able to change the dilution of dopant source gases (such as diborane, B2H6, arsine, AsH3, or phosphine, PH3) through the addition of hydrogen over a range of more than two orders of magnitude. This allows control of the electrical properties of deposited films over a broad range of resistivities (Fig. 3). Two methods were used to measure dopant concentration: secondary ion mass spectroscopy (SIMS), which probes the total atomic concentration, and four-point probe resistance measurements that are sensitive to electrically active dopant ions. Figure 3 presents the dependence of the dopant concentration on the dopant gas flow. For boron, the incorporation is linear with the flow, and the SIMS data is in close agreement with the resistance data, indicating that all the boron atoms are electrically active. For phosphorus, the atomic incorporation is also linear with the flow. However, active atom concentration inferred from the resistance measurements exhibits a peculiar behavior, increasing very abruptly with the increasing flow at the phosphine/silane flow ratio of 10-6 (Fig. 3a) and at the phosphine/DCS flow ratio of 10-5 (Fig. 3b). With a further increase of the flow, the active phosphorus concentration augments at a sublinear rate. As suggested previously [8], this is due to a parasitic gas phase reaction (2PH3 = P2 + 3H2) at high dopant partial pressures that decomposes the hydride into dopant and hydrogen and reduces the incorporation rate.

Epitaxial SiGe deposition
Advantages of SiGe derive from the fact that the band gap of SiGe is smaller than that of silicon. The band gap offset can be further increased by growing a strained SiGe film on a silicon substrate. Strained SiGe can be grown on Si provided that the thickness of the SiGe alloy is kept below a critical value [9]. In bulk SiGe, the lattice constant is larger than that of Si. When a thin SiGe film is deposited onto a Si substrate, the in-plane lattice parameter of the film matches the substrate lattice parameter. This match tetragonally deforms the SiGe lattice and makes the difference between the out-of-plane lattice parameters of SiGe and Si even bigger than for bulk materials. For films that are thin enough, the mismatch in the lattice constant between the SiGe layer and Si wafer can be accommodated elastically. No dislocations are formed in this case, and the SiGe layer is strained. In order to ensure that the SiGe layer remains strained, SiGe-based processes require low deposition temperatures.

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Figure 4. a) Atomic concentration of Ge in SiGe and b) SiGe growth rate, both as a function of mass flow ratio GeH4/H2. Silane-based growth is at 650?C, and DCS-based growth is at 750?C. The growth pressure was 20torr in all cases. c) XRD profile of a sample with a 41nm thick Si0.849Ge0.151 layer.

The band gap offset is primarily due to the offset in the valence band, with a conduction band offset being negligible. The valence band offset prevents holes from moving from the P-doped SiGe base to the N-doped Si emitter, increasing the gain of the NPN transistor. In p-MOSFET SiGe applications, the valence band offset at the Si-SiGe interface can be used to spatially localize the holes inside the SiGe layer. The mobility of the two-dimensional hole gas formed at the Si-SiGe interface is greater than in conventional Si p-MOS structures. This is due to the lower effective mass of holes inside SiGe and to the spatial separation of the carriers from the ionized dopants on one side and from the silicon dioxide on the other side of the transistor [9, 10].

Another benefit of SiGe can be obtained by engineering a graded Ge profile through the base of a bipolar transistor. Because the band gap is a function of the germanium content, it will vary spatially in the base, resulting in a drift electric field. This field will accelerate electrons through the base, reducing the transient time and improving the high-frequency performance of the transistor. With cut-off and maximum oscillation frequencies of several dozen GHz and even above 100GHz [11], SiGe-based bipolar transistors enter the area that has been an exclusive domain of III-V devices. High frequency can be traded off for lower power consumption in applications where maximum speeds are not required.

SiGe deposition is done by adding germane (GeH4) to the silicon source. As shown in Fig. 4a, the growth rate in the reaction rate regime, i.e., at low temperatures, is a rapidly increasing function of the germane flow. This growth rate increase may be related to the decrease of the activation energy associated with the desorption of hydrogen from a germanium-rich surface as compared to the desorption from a silicon surface. It is interesting to note that the growth rate of SiGe appears to be independent of the silicon source flow rate. Figure 4b shows the germanium concentration increase as a function of the increasing germane flow. For a fixed germane flow, a decrease in the silicon source flow (either DCS or silane) results in an increase of the germanium concentration in the film.

The Ge concentration can be obtained from SIMS analysis. It can also be obtained from x-ray diffraction (XRD). This technique can probe the out-of-plane lattice constant of a deposited film. Figure 4c shows an XRD profile of a high-quality SiGe film. From the separation between the substrate and SiGe peaks, one can obtain the Ge concentration of 15.1%. From the loci of the thickness fringes and the full width at half maximum of the SiGe layer peak, one can calculate the SiGe film thickness of 41nm.

New method of CVD control
In many applications, it is necessary to deposit films with a variable concentration of germanium through the thickness of the film, i.e., to fabricate graded SiGe structures. Wafer process chambers, including the Epi Centura, use mass flow controllers (MFC) to introduce process gas species. In general, MFCs are used to supply either a constant flow rate or a linearly variable flow from one set point to another.

One common SiGe grade is a linear grade. However, because the growth rate of SiGe varies strongly with the Ge concentration (see Fig. 4), a linear flow ramp will not produce a linear profile of Ge in the film. A linear Ge profile requires a rapidly changing flow of germane at large Ge concentrations and a slowly changing flow at low Ge concentrations. One method to fabricate graded structures is to divide the deposition recipe into several steps each of which will have a linear flow ramp. Figure 5a shows a SIMS profile for a wafer that was processed using three linear flow ramp steps. The SIMS data shows a deviation from the desired linear slope. A method to control an MFC to produce a precise Ge concentration profile, whether it is linear or nonlinear, is therefore important.

Figure 5b is a simplified block diagram of a system for forming a film having a desired concentration profile. The information supplied by the user includes the target concentration profile of the film and a set of experimental data similar to those reported in Fig. 4, i.e., the Ge concentration and the SiGe growth rate as a function of the germane mass flow rate. Once the input data is supplied, the system logic calculates the germane flow that is to be used for a predetermined time interval (typically 0.1 sec) to obtain a given Ge concentration.


Figure 5. a) SIMS profile of boron-doped graded SiGe structures. The ramp was divided into three portions, each of which had a linearly changing flow of germane. b) Block diagram of the new method of CVD control. c) SIMS profile of a wafer processed using the new method of CVD control.
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The system logic also computes the associated SiGe growth and uses it to determine what film thickness is going to be deposited during the same time interval. The system logic then compares the calculated Ge concentration profile with the desired one. If the desired input thickness with the desired concentration profile has not been achieved, the system logic calculates a new value for the film thickness representing the additional thickness amount needed to obtain total desired thickness. For the newly calculated value of the remaining thickness, the logic computes the corresponding concentration value. The process repeats itself until the desired concentration profile thickness is achieved. Once the desired thickness is reached, the processor discontinues the loop and completes the actual film formation by sending a signal to the MFC to regulate the flow of germane.

Figure 5c shows a SIMS profile for the wafer that was processed using this new CVD control method. This wafer's profile matches the desired Ge profile. We note here that the same method can be applied to control other CVD processes, beyond SiGe applications.

High doping in SiGe processes
Selective growth is achieved by using DCS with the addition of HCl2 at reduced pressure (typically, 10-20torr) to suppress nucleation of silicon on the dielectric films. Examples of selective applications are ultra-shallow junction formation, including elevated source/drain fabrication in which an excess amount of silicon needs to be grown before silicidation, and contact plug fill for DRAM applications. Adding Ge to these structures increases dopant incorporation and therefore lowers the sheet resistance.


Figure 6. a) SIMS results for a 730°C SEG of SiGe with a high incorporation of phosphorus. b) Sheet resistance versus thickness for samples with a high concentration of boron (p-doping) and phosphorus (n-doping). Blue, green, and pink semitransparent boxes show SIA Roadmap requirements for resistance and depth of ultra-shallow junctions at 0.13µm, 0.10µm, and 0.07µm technology nodes, respectively.
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Results of selective SiGe growth are given in Fig. 6. The SIMS analysis (Fig. 6a) reveals a Ge concentration of approximately 29.6% and a phosphorus concentration of approximately 2 x1020 atoms/cm3. The slope of the phosphorus profile at the interface between the SiGe layer and the substrate is approximately 5nm/decade. Our study has shown that the value of this slope only weakly depends on the SiGe deposition temperature. This observation indicates that the interfacial phosphorus profile is largely affected by the SIMS measurements due to the "mixing effect." This effect manifests itself as a broadening of thickness profiles under the influence of 2keV cesium ions that are used in the SIMS analysis. Therefore, the actual phosphorus profile should be even more abrupt than 5nm/decade.

Figure 6b shows sheet resistance versus thickness data for phosphorus- and boron-doped selective SiGe. The thickness was obtained by either SIMS or spectroscopic ellipsometry measurements. Boron-doped films had Ge concentrations of approximately 15% and boron concentrations of 1.2 x1021 atoms/cm3. Blue, green, and pink semitransparent boxes present SIA Roadmap requirements for resistance and depth of ultra-shallow junctions for 0.13µm, 0.1µm, and 0.07µm technology nodes, respectively. One can see that the selective epitaxial growth (SEG) approach can satisfy the requirements of 0.1µm and, potentially, 0.07µm technologies.

SiGeC deposition
SiGeC is a low-temperature epitaxial deposition application that has recently attracted a lot of attention. If incorporated interstitially, carbon acts as an impurity that deteriorates the quality of epitaxial layers. However, carbon incorporation can be substitutional if the deposition temperature is low enough. Substitutional carbon atoms provide an extra degree of freedom in band gap engineering. In particular, they generate a conduction band offset in tensile-strained Si/SiC systems that can be used for high-mobility, two-dimensional electron gases in the channel of NMOS devices [12]. Also, carbon atoms in SiGe decrease the lattice constant of SiGe, making it closer to the lattice constant of silicon. This diminishes strain and allows growth of thicker SiGe films without strain relief by creating dislocations. Another important advantage of carbon is the reduction of boron diffusion, which helps to form abrupt doping profiles [13].

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Figure 7. a) XRD profiles for SiGeC films grown at 600°C and 20torr with various SiCH6/(SiCH6 + SiH4 + GeH4) mass flow ratios. Ge concentration is 18.2%, film thickness is 13nm. Progressive strain reduction in SiGe films on silicon substrates with increasing carbon concentration in the film can be seen from the shift of the film peak closer to the substrate peak with the increasing methylsilane flow. b) Concentration of substitutional carbon in SiGe vs. the methylsilane mass flow. Carbon concentration was obtained by fitting XRD data in Fig. 7a.

One of the most common carbon sources in CVD SiGeC processes is methylsilane (SiCH6). The deposition temperature is in the 550-680°C range. At higher temperatures, undesired interstitial carbon incorporation becomes important and SiC nanoprecipitates are formed. One can estimate substitutional and interstitial incorporations by comparing SIMS and XRD data. SIMS probes the total concentration. In contrast, XRD measures lattice constant changes that are sensitive only to substitutional carbon concentration. We have determined that at 600°C more than 90% of all carbon atoms are substitutional.

Presented in Fig. 7a are XRD scans of seven SiGeC films grown at 600°C using the same germane flow values and with different methylsilane flows. The small thickness of approximately 13nm of these SiGeC films explains why the structure on the left side of the substrate peak is less pronounced than the SiGe peak of the much thicker film of Fig. 3. The remarkable feature of Fig. 7a is the progressive shift of the SiGeC peak toward the substrate peak with the increasing flow of methylsilane. This observation proves the fact that carbon decreases the mismatch between lattice constants of Si and SiGe, and therefore reduces the amount of strain in thin SiGe films grown on Si substrates.

From the position of the SiGe peak at zero methylsilane flow (the lowest curve), we can estimate the Ge content in the films to be 18%. From the displacement of the peak under the influence of the carbon incorporation, we can determine the carbon concentration (Fig. 7b). It increases linearly with the methylsilane flow at low flows and at a sublinear rate at higher flows of methylsilane. It is possible by a further increase in the carbon flow source or by a decrease in the germanium concentration to cross over from a compressive strain mode (with the SiGe peak at smaller angle values than the Si peak) to a tensile mode (with the SiGe peak at larger angle values than the Si peak). Thus, carbon incorporation provides a very convenient way of tuning lattice parameters, strain, and, consequently, energy band properties of epitaxial films.

Conclusion
Epitaxial CVD techniques at reduced pressures and low temperatures span a wide range of applications and have demonstrated the tight control of the incorporation of species (such as Ge, C, and dopants) into Si films that is required for the frontend steps in the fabrication of advanced devices. In conjunction with new pre-epi cleaning technologies [2], epi CVD systems such as the Epi Centura are enabling the transition of SiGe technologies from R&D to mass production.

Acknowledgments
Additional authors of this work are Patrice Loiodice of LETI, and Lance Scudder and Paul B. Comita of Applied Materials. The authors are grateful to G. Rolland (LETI) for XRD and SXR analysis, and to F. Laugier and P. Holliger (LETI) for SIMS analysis. The PhD thesis work of Virginie Loup is jointly funded by Applied Materials and LETI.

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Virginie Loup received her MS in physics from the Physical Engineering School, Polytechnical National Institute of Grenoble (INPG). She is currently a PhD student at LETI. Her thesis is co-funded by Applied Materials as part of a joint development agreement with LETI.

Jean-Michel Hartmann did his thesis at CEA/Grenoble from 1994 to 1997 on solid source MBE of optically oriented II-VI heterostructures. He is in charge of SiGeC CVD activities at LETI. Prior to joining LETI in 1999, Hartmann worked as a research assistant at Imperial College, London.

Marie-Noëlle Séméria is the head of the thermal treatment and implantation laboratory in the silicon technologies department at LETI-CEA/Grenoble. Prior to joining the CEA R&D center in 1996, she was a senior architect for field emission display at PixTech. Séméria has six patents and more than 30 technical publications.

Arkadii V. Samoilov is a program manager of the Silicon Epitaxy Technology Development Laboratory in the Epi Substrate Division of Applied Materials. Prior to joining Applied Materials in 1998, he was a Robert A. Millikan Senior Research Fellow at California Institute of Technology. Samoilov has 40 technical publications. Applied Materials, 3050 Bowers Ave., M/S 0115, Santa Cl2ara CA 95054; ph 408/235-6148, fax 408/986-2865, e-mail [email protected].

Lori Washington received her BS and MS in materials science and engineering from Stanford University. She has worked for Applied Materials since 1995, and is currently the applications laboratory manager in the Epi Substrate Division, where she characterizes low-temperature epitaxy for production.