MRS Spring Meeting: More science, less art

06/01/2001

The bright promise for many new materials entering chipmaking is tempered by more realism as research progresses. The latest science coming out of this work drew intense interest — and some debate — at the Materials Research Society Spring Meeting in San Francisco. Key topics in wafer processing included low-k dielectrics, CMP processes, and ion implantation.

Low-k debates continue
Much of the discussion related to low-k dielectrics focused on the mechanical properties of the films and the extendibility of processes. According to Jeff Hedrick of IBM, it is actually a trade-off between the two. He stated that porosity is needed to get below about k=2.4, and that porous materials will be needed at the 100nm technology node and below. The porosity unavoidably results in issues related to robustness, with, for example, the CMP process alone eliminating 70-80% of candidate materials.

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Hedrick presented some advantages he sees for SiLK, Dow Chemicals' organic polymer. He thinks that spin-applied materials in general provide more options for decreasing the dielectric constant further, with the CVD options being primarily extensions of SiCOH processing. (Other speakers had some different ideas, though; see below.) He also said that to get to k=2.0, only 20-25% porosity is needed in SiLK, which falls under the typical 25% porosity level where the pores still form a closed cell architecture. Above that point, the pores start to become connected, which can result in reliability and performance problems. According to Hedrick, SiLK is the only porous low-k material that survives conventional low-k BEOL processing.

To handle the stresses associated with packaging and assembly processes, IBM uses FSG for the top two levels (the transmission lines) above SiLK in its integration scheme. With its CMOS9S process, IBM also uses a "sea of vias" approach, with arrays of dummy vias under bond pads to provide support during wire bonding and other assembly processes.

The modulus of the low-k material was shown to be an important factor in resisting the stresses of CMP. Hiroyuki Hanahata of Asahi Chemical showed that with a porous silica film, a cap layer above it survives CMP if the modulus of the low-k layer underneath it is 1.5GPa or higher. If it is softer than that, then the harder cap layer on top of it can fracture. The results suggested a threshold mechanism rather than a continuous degradation of the reliability of the structure as the modulus decreases. Hanahata also provided the caveat that the measurement of low-k film modulus has not been standardized, so all results need to be examined closely for relevance.

Honeywell also presented some spin-on low-k results. Shilpa Thanawala reported on a scheme that uses a spin-on material (an experimental SOG) for the etch-stop and cap layers for a Nanoglass (k=2.2) interlayer dielectric. Other spin-on low-k materials still need CVD etch-stop and cap layers, so Honeywell's approach would provide the advantage of reducing the total number of tools and transfer steps in BEOL processing. This SOG material has a dielectric constant of 3.0, so the k_eff of the dielectric is not compromised as much as with other materials. The comparison point presented was a k_eff of 3.5 with Honeywell's scheme vs. 5.0 for a CVD scheme using cap and etch-stop layers with k=6.2.

Low-k CVD rebuttal
IBM researchers weighed in on both sides of the spin-on vs. CVD low-k debate, with work by Alfred Grill of IBM on PECVD SiCOH films being presented. His team's work showed some impressive results controlling the microstructure of CVD SiCOH by selecting precursors and annealing processes that leave repeatable nanopores in the films. This year's work extended the researchers' previous work by eliminating a problem with the collapse of the porous films. This was accomplished with a different precursor in the reactor, and the dielectric constant was controlled with an optimized flow rate. Films with k as low as 2.0 were created with this process.

Applied Materials was also on hand with an update on Black Diamond and BLOk, its low-k CVD material. Hichem M'Saad of Applied reported results showing that BLOk, a hydrogenated amorphous silicon carbide, had electrical leakage and Cu diffusion performance similar to a silicon nitride cap layer. It has a lower k than SiN, and it is also a compressive film, which facilitates crack-free integration with tensile low-k films. M'Saad said this allows BLOk to be used with other low-k films to strengthen them. With some IC manufacturers working with more than one material set, it will be interesting to see if there are announcements of low-k materials from more than one supplier being used together.

Low-k films' porosity measurements
It is widely agreed that there is a need for porosity in low-k dielectrics to continue the reduction of the dielectric constant of the film. A critical part of progress here is metrology. There are many ways to measure the average porosity (typically reported as a percentage), but grasping details of the air gaps in the film presents a bigger challenge. Dielectric behavior depends on the pore size and connectivity, for example.

Small angle neutron scattering (SANS) is one technique that was presented as a way to measure the pore connectivity. In a poster presentation by Hae-Jong Lee of NIST, a method for measuring the fraction of interconnected pores in a porous low-k material relies on the higher neutron scattering cross-section of d-toluene. When a film is immersed in d-toluene, the fluid penetrates into the network of pores that is connected to the exterior, so the relative intensity of the scattering allows an estimate of how much d-toluene is in the pores of the film. This work was done with HSQ-based low-k materials.

Cu CMP: more science, less art
The understanding of the mechanisms of CMP is becoming more sophisticated, with research uncovering many of the subtleties of the process. The properties of a Cu film, for example, can have a significant effect on the removal rate during CMP, but not always how it has been predicted. Yuchun Wang of Applied Materials had some data showing that the hardness of a Cu film does not affect the removal rate during CMP, but the roughness and oxide thickness do. Wafers with a thicker oxide and lower RMS surface roughness of the Cu had a lower removal rate. The experiments so far have not decoupled the effects of the oxide thickness and surface roughness, but the researchers were finding it possible to optimize the slurry composition to decrease the variation in removal rate and increase the size of the process window.

Work done at Ebara explored the relationship between the Cu annealing process and CMP removal rate. Copper is typically annealed after deposition to give it a better crystalline structure with larger grains, which decreases its resistivity. This process will happen at room temperature, but most often it is accomplished with a better-controlled process at an elevated temperature.

As shown by Wang's Applied work, CMP removal rate is a function of grain size, but David Watts of Ebara presented results showing that there is more going on here. He showed that removal rate increases with annealing temperature up to about 200°C, but then decreases after that as temperature is raised. One would expect a monotonic function if the removal rate depended only on grain size, so again more work is needed.

Lam Research showed the effect of H₂O₂ concentration on the removal rate. H₂O₂ is normally added to slurry as an oxidizer during Cu CMP, and its concentration determines the properties of the surface oxide species. Without H₂O₂ present, the removal rate is very low. As the concentration increases, the removal rate increases to a maximum and then decreases. X-ray photoelectron spectroscopy analysis shows this correlates to the type of oxide formed at different concentrations, with Cu2O being formed at lower H₂O₂ concentrations and CuO at higher ones.

Sudipta Seal of the University of Central Florida presented yet another set of data showing the complexity of the process. His work also involved H₂O₂ concentration, but he showed how the effect of H₂O₂ concentration was opposite at high and low pH. At a pH of 2, the Cu removal rate decreased as H₂O₂ concentration increased, but at a pH of 12, the removal rate increased with the concentration. The mechanism to explain this results from a pH-dependent oxide formation reaction. In a low pH environment, the reaction leads to oxide formation, which leads to the lower removal rate. At a higher pH, a dissolution reaction occurs, increasing the removal rate.

Ultra low energy implantation
Some surprising data from Axcelis showed that the drive toward ever-lower energy for ion implantation might be misguided. When dopant species impact the surface of a wafer, some atoms are ejected from the surface. A metric for this sputtering effect is the ratio of sputtered atoms to implanted atoms, known as the sputtering yield. The data presented by Aditya Agarwal of Axcelis (who termed his co-workers the "Bell Labs Diaspora") shows the sputtering yield for very low energy ion boron implantation is an order of magnitude higher than theories predict. Also, the theory predicts the sputtering yield will be lower at lower energies, and this is contradicted by the new data.

This unexpected result for ultra low energy implantation might be explained by a few effects: 1) the projected range for sub-keV B is much smaller than believed; 2) there are energy-sharing or matrix effects causing B to be more loosely bound; and 3) the actual surface-binding energy is different from the current theories.

Whatever the cause, one of the outcomes is that a higher energy implant can achieve the same results as the ultra low energy implant. For example, Agarwal said that a 0.5keV implant with a 1.7E14 dose has the same sheet resistance as a 0.2keV implant with a 3E14 dose. Because of the difficulty of getting high beam currents at ultra low energies, using the 0.5keV implant instead of 0.2keV results in a 3.5X throughput advantage in implantation equipment. More device data is needed, though, to identify differences that might not appear in the sheet resistance of implanted material.

One quirky result in that same session came from work by Hans-Joachim Gossmann of Lucent. While comparing indium to boron as a dopant, he found repeatably that a 15-min anneal gave a deeper In profile than a 60-min one, providing another example of the need for more work in this area. — J.D.