CCD-controlled in situ interferometry for dry etch process monitoring
06/01/2001
Wilfred John, Leonhard Weixelbaum, Harald Wittrich, Joachim Würfl, Ferdinand-Braun-Institut für Höchstfrequenztechnik im Forschungsverbund, Berlin, Germany
Gottfried Frankowski, GF Messtechnik GmbH, Berlin, Germany
overview
A novel method for in situ depth and reflectivity measurements during dry etching is presented. The method is based on laser interferometry with a CCD chip as the detecting element. This allows for a process alignment to typical critical layout structures using optical markers. Using the same arrangement in the reflectivity mode (thin film interference), the lateral resolution is given by the pixel density of the CCD image and the optics itself. The method is now routinely applied for dry etch process control in MESFET, HBT, and laser diode technology.
The extensive demands on reliability and reproducibility of processes in microelectronics and microsystem technology require suitable methods of production process control. Therefore, noncontact measurement methods with nanometer-scale resolution are required. In nearly every case, only optical methods are able to fulfill these extremely stringent demands on resolution and accuracy [1-5].
Many different methods are known for process control in plasma etching. They give information on either the plasma properties or the wafer surface, or they indicate the endpoint of the etching process. For precise control of plasma etching, the critical factors are the actual etching depth, time dependence of the etch rate, and endpoint detection. The exact and reproducible knowledge of these parameters determines the stability of the process. Even in the case of selective etching techniques, it is important to know the actual etching depth in order to control lateral undercut in the presence of the etch-stop layer.
 Figure 1. Setup of interferometric measurement process-monitoring system. |
The interferometric method described in this article provides a direct in situ control of etch depth and rate during dry etching. It can also be used to control the process by measurement of surface reflectivity and interference on thin layers. Modern process technologies demand nanometer-scale depth resolution and micron-scale lateral resolution. The NanoMES in situ measurement system in combination with pixel-resolved in situ interferometry meets these requirements. We have developed a method for endpoint detection with micron-scale lateral resolution that is suitable for etching processes where layers to be structured are either reflecting (dual beam interferometry) or transparent (pixel-resolved thin film interferometry) for the analyzing laser diode.
Principle of measurement
The dual beam interferometry technique is implemented in the NanoMES measurement device. As shown in Fig. 1, light of a monochromatic coherent pulsed source (632nm laser diode) is first collimated and then split into two beams, an object beam and a reference beam. The two beams interfere at the focal plane of a CCD camera. Since the two beams have different optical paths, interference patterns are obtained in the detection plane. Specially designed long focal length optics depict a ~1mm2 image of the wafer surface on the CCD matrix. If the object beam is projected on a flat wafer surface and the reference mirror is not tilted, the phase shift with respect to the reference beam is the same for all pixels of the CCD matrix. In the presence of any topology on the wafer, altitude differences directly translate into different phase shifts of the respective pixels.
 Figure 2. The measurement technique for in situ depth monitoring during etching. |
Pixels that are used for depth evaluation have to be defined before starting the measurement. For this purpose, several markers with lateral dimensions of 10µm x 150µm are available. They electronically define regions of interest on the wafer surface. A schematic of this procedure is shown in Fig. 2. For in situ control of dry etching, the reference markers are set on top of the etch mask, and the markers for etch depth evaluation are placed in regions that are to be etched during the process. An x-y table additionally allows for placing particular wafer regions into the CCD image.
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In an etching process, the altitude between the masked and the unmasked wafer surface is changing with etching time. This results in an increasing phase shift between the light reflected from the reference and the measurement region. In order to make this phase shift directly visible and accessible for electronic data processing, the reference mirror is slightly tilted before starting the process. The tilt results in interference stripes all across the wafer as shown in Fig. 2. The tilt is arranged such that each marker contains a number of interference stripes.
 Figure 3. Typical process printout of emitter dry etching for GaAs/AlGaAs HBTs. |
During etching, the interference stripes on the reference and the measurement markers shift with respect to each other. A real-time processing routine directly transforms this phase shift change into the altitude difference between the reference area and the measuring area. If the etching rate of the mask is negligible or very small compared to the etching rate of the etched material, the phase shift difference directly represents the etch depth. The accuracy of determining the phase shift between the interfering waves relates to the minimum measurable altitude difference. Using appropriate techniques and algorithms, it is possible to determine phase shift differences with an accuracy of 1/500th of the wavelength used [6, 7].
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Figure 4. SEM micrograph of a dry-etched InGaAs/GaAs/AlGaAs structure using the NanoMES for in situ process control. The Ti/Pt/Au emitter metal layer masks the dry etch process.
For a reproducible and reliable operation of the system, it is crucial that the optical length of both interferometer arms is maintained absolutely constant during the integration time of the CCD camera (~40msec). Disturbances can be caused by different influences such as temperature changes and mechanical shocks. To minimize these influences, stroboscopic measurements using a pulsed laser diode are applied.
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Figure 5. Dry etching of distributed Bragg reflector mirrors in VCSEL technology.
The same setup also features thin film interferometry on transparent films and reflectometry on nontransparent films. In this case, only the object beam is required for measurement. If the object beam is projected onto a flat wafer, each pixel of the CCD matrix gives the intensity caused by interference in a transparent layer, or the intensity of reflected laser light from a nontransparent surface. We have developed software that offers the options of setting four markers on the surface region depicted on the monitor. In principle, each pixel can be used as a measurement spot. Thus, the smallest markers are limited by the pixel size (1µm x 1µm on the wafer surface). During etching, the functions of intensity vs. time and the first derivative of intensity vs. time of selected pixels are displayed. This allows micron-scale lateral resolution.
Implementation into RIE systems
A SENTECH Instruments plasma etcher (SI 591 parallel plate reactor with loadlock) was modified to facilitate the corresponding in situ characterization during etching. A central hole in the upper electrode of the plasma etcher (30mm dia.) allows for the optics of the NanoMES system. Control measurements showed that the electrode perforation does not influence the etching homogeneity of the system.
The capability of the NanoMES measuring system is now routinely implemented in most of the dry etching processes running at the FBH. The degree of process control that can be obtained is illustrated with two examples: 1) the emitter dry etching step of a heterojunction bipolar transistor (HBT) fabrication process, and 2) Bragg mirror etching of vertical cavity surface-emitting laser diodes (VCSELs).
Dry etching of HBT emitter structures
The goal of HBT emitter etching is to reproducibly etch down the complete emitter structure with a material-selective stop on either the AlGaAs or GaInP wide bandgap emitter layers. Additionally, the degree of emitter undercut has to be controlled and kept stable all over the wafer and from wafer to wafer. The inset in Fig. 3 shows a cross section of the HBT emitter layer structure. The dry etch process consists of three single etch steps, each of which utilizes different functions of the in situ characterization system (see the table). Etching is masked by a patterned Au surface on top of the homogeneously deposited WSiNx emitter contact layer.
Figure 3 depicts a process printout of the complete emitter dry etch process. The individual processing steps are indicated in the diagram.
During WSiNx etching (the first step), the NanoMES monitors the surface reflectivity of the as-etched surface. As soon as the InGaAs surface has been approached during etching, the reflectivity values change from higher values (WSiNx surface) to lower values (GaAs surface). Thus, there is a visible, well-defined endpoint is visible that can be used to abort the WSiNx dry etch process.
In steps two and three, the NanoMES acts as a dual beam interferometer and depicts the etching depth with respect to the reference marker. During the process, the actual etching depth and the corresponding etch rate are depicted together on a monitor. Therefore, etch depth can be continuously followed on screen. This allows process modifications to be made as a function of the actual depth. For example, in the HBT emitter-etching process, the parameters are switched over from InGaAs- to GaAs-etching conditions after the InGaAs layer has been penetrated.
Finally, the etch stop on InGaP or AlGaAs is manifested as a sharp decrease of the etch rate, which can in turn trigger a certain overetching time to control emitter undercut. Figure 4 is a SEM micrograph of an emitter structure fabricated using this technique. The undercut all over the wafer is precisely controlled. Variations of the undercut can be limited to those inhomogeneities typical for the etching system and the etching parameters themselves.
Dry etching of DBR mirrors for VCSELs
Precise dry etching of distributed Bragg reflector (DBR) structures is a critical and demanding process step for VCSEL fabrication, since etching has to be stopped within a well-defined position of the vertical epitaxial layer structure. Figure 5 is a SEM image of a dry etched DBR mirror with the corresponding printout of in situ measurements taken during the dry etch process. Each individual layer can be monitored so that etching can be easily aborted within a specified region of the layer stack.
Conclusion
For the first time, it is possible during dry etching to make reproducible real-time dynamic measurements of etch depth, as well as pixel-resolved in situ measurements. The depth resolution of the interferometer is about 3nm, and the only requirement on the probed material is a sufficient surface reflectivity. No other material data (e.g., refractive index) is needed for the evaluation. The control of the time behavior of etching provides additional important information on the stability and peculiarities of the process, such as induction periods, etching rate variations, and material inhomogeneities. The NanoMES system is routinely applied in HBT, MESFET, and laser diode processes.
References
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Wilfred John received his MS and PhD in chemistry from the University of Leipzig, Germany, in 1982 and 1985, respectively. He is responsible for plasma process engineering at the Ferdinand-Braun-Institut.
Leonhard Weixelbaum received his MS in physics from Humboldt-University, Berlin, in 1971, and his PhD from Ernst-Moritz-Arndt University, Greifswald, in 1975. Weixelbaum is responsible for plasma deposition engineering at the Ferdinand-Braun-Institut.
Harald Wittrich received his MS and PhD in chemistry from Humbold-University, Berlin, in 1966 and 1970, respectively. He is manager for plasma and deposition techniques at the Ferdinand-Braun-Institut.
Joachim Würfl received his MS and PhD in electrical engineering from the Technical University of Darmstadt, Germany, in 1983 and 1989, respectively. He heads the process technology department at the Ferdinand-Braun-Institut, Albert-Einstein-Strasse 11, D-12489 Berlin, Germany; ph 49/30 6392 2690, fax 49/30 6392 2685, e-mail [email protected].
Gottfried Frankowski received his MS and PhD in materials science from the Technical University of Magdeburg, Germany, in 1973 and 1983, respectively. Frankowski is president of GF Measurement Techniques Inc.