Upbeat Europe aims to upgrade its chip technology
12/01/1998
Upbeat Europe aims to upgrade its chip technology
Robert Haavind, Editor in Chief
The sky is not falling in Europe.
Recent visits to a wide range of semiconductor fabs, research facilities, and process tool companies across Western Europe revealed an optimistic, forward-looking mood at most facilities, quite unlike the gloom and doom found in recent times at similar sites across the US and much of Asia. With a new Euraccess initiative, and a push toward sub-0.1-?m process development under a new program called Plato (sounds like "plateau"), major players in Europe hope to catch up with the leading edge of semiconductor fabrication capabilities in the US, Japan, and Korea, and perhaps move ahead of the world in some areas.
The main reason for the more upbeat mood is that European semiconductor companies are not major competitors in either DRAMs or microprocessors for PCs, according to Michael Brillouet, technical director for STMicroelectronics` modern fab nestled among mountains at Crolles, near Grenoble, France (Fig. 1). The markets for embedded processors, and a variety of other devices favored by European chipmakers, have remained more stable, avoiding the plummeting prices and excess capacity that have created havoc in the US and Asia. One exception in DRAMs was Siemens, Munich, Germany, which reacted swiftly to the market crunch by shutting down its almost-new fab in England (it is expected that another European company will soon take over this well-equipped plant). Siemens later announced a spin-out of its whole semiconductor unit.
To meet future needs, STM is planning a major expansion to its Crolles plant (Crolles 2), adding 40 hectares (98.84 acres) to the present facility. Planned for full production in 2000, the added fab will employ 600 people and perform advanced chip research (with a $500 million/year budget). Crolles 2 will start with 0.15-?m, 6-layer metal ICs, putting 15 million transistors/cm2 onto system-on-chip (SOC) designs with 1.5-V supplies. A library of cells is under development, with a large group of designers (many from Philips, Eindhoven) already moving into the existing fab to work with process developers. The high performance SOCs made by Crolles 2 will be for telecom, multimedia, and computer products, said Brillouet. Although planned for 300-mm production, the fab may be affected by a temporary slowdown in the shift to larger wafers.
The current fab, which produces mainly high performance logic, uses low-k dielectrics (porous silicon) to add erformance, with k of 2.7. For 0.18-?m logic, in contrast to high-performance microprocessors, low k is preferred for cutting time delays, partly because it cuts down crosstalk, Brillouet explained. At 0.13 ?m, copper interconnects will be added, and the Crolles fab is already installing copper equipment in a segregated area (Fig. 2).
Next to the STM plant in Crolles is another sign of European confidence - a nearly completed $60 million Soitec plant to make silicon-on-insulator (SOI) wafers. By 2000-01, the new plant will be capable of producing a million wafers/year with only 10 high speed hydrogen ion implanters that can process 17, 200-mm or 25, 150-mm wafers/hr, according to Andre-Jacques Auberton-Herve, president. The company plans to use its own Smart Cut bonded wafer approach as well as the Simox method, and it has forged an alliance with SEH in Japan, a supplier of some 25% of the world`s silicon wafers, for distribution.
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Figure 1. STMicroelectronics` fab in Crolles, France.
Some plants are busy
Even some fab equipment and instrument vendors were curious about why the mood outside of Europe is so pessimistic. While business has flattened out, and dipped a little for some with major sales to Asia, many fab supply firms see only a minor slowdown that they expect will be followed by a surge of new business. At the leading edge of tool technology, ASM Lithography will be shipping the industry`s first 193-nm step and scan systems to IMEC in Leuven, Belgium, and STM in Crolles as well as LETI in Grenoble, over the next few weeks.
Even Asia is not a lost cause at the very busy Balzers Process Systems (BPS) plant at Balzers, Liechtenstein. A major order from Taiwan for tools to make large flat panel displays had the production floor humming. "Taiwan sees an opportunity to take market share away from Korea as panel sizes increase," according to Martin E. Bader, VP semiconductors for BPS. Because of the financial crunch in Korea, companies there can not afford to put in larger tools. BPS has welcomed major buys from Taiwan because Asia has represented some 36% of its business, compared to 34% from the US, with only 26% in Europe and 4% elsewhere.
BPS is a world leader in coating systems for data storage disks and minidisks, and also makes electron beam evaporators and rf etch equipment for read/write heads, including giant magnetoresistive (GMR) types. A new cluster tool under joint development with a leading head vendor will provide up to 18 different processes in one tool, according to Wolfgang Rietzler, product manager, cluster systems. The company also uses its evaporation, rather than sputtering, technology for equipment to make surface acoustic wave filters, which determine frequency for mobile communications sets. This market is expected to more than double in the next three years.
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Figure 2. Copper equipment has been installed at STM`s Crolles plant. Cassettes and gowns are green in this isolated copper sector.
Major growth is also expected for BPS`s C4 process, using evaporation and other methods to provide a blanket layer under bumps for flip chip technology. From 1999 on, Intel, for example, plans to move to chip-scale and chip-on-board technologies for its processors, mainly to permit higher clock speeds, said Bader. Since 1997, Citizen Watch has been building some 800,000 flip chips/day, he added, although these have only 5-10 I/Os compared to 1500 I/Os for a microprocessor.
Another European company developing unique processing for flip chip packaging is Karl Suss, Munich, which makes probe stations, mask aligners, flip-chip bonders, coating machines, and other devices for packaging and microelectromechanical systems (MEMS). Karl Suss soon plans to introduce a microlens lithography system for advanced packaging and MEMS, according to Franz Richter, managing director.
Euraccess, Plato aimed at sub-100-nm ICs
Innovation is also becoming more widely encouraged and evident throughout European industry. While there have been numerous programs to lift the level of technology there (Esprit, Jessi, Medea, Gressi, etc.), the latest are marked by new levels of cooperation between various research labs and advanced chip companies, with an emphasis on spawning new start-ups, like Silicon Valley. While these programs are government planned and directed, officials at LETI claimed that venture capital firms are beginning to set up offices in the Grenoble area, where much of the innovative work is centered, to help launch start-up companies with new technology.
The Euraccess initiative, which incorporates the Plato program aimed at identifying and solving potential processing problems below 100 nm, is a good example of this strategy. This is a follow-on to the European Gressi program, which is a joint venture between LETI, a French government laboratory, and CNET-France Telecom, which has been investigating 0.18- and 0.15-?m CMOS, with advanced process modules in development for 0.12-?m CMOS and 0.25-?m nonvolatile memories (256-Mbit generation). Earlier Gressi work on 0.25-?m CMOS was transferred to the STMicroelectronics fab in Crolles, which has a large contingent of workers from other European companies, particularly Philips. STM itself is over 50% owned by the French and Italian governments, with 43% of ownership in public stock.
Equipment for a new advanced development fab is being installed at LETI in Grenoble as part of the cooperative Plato program. With different process capabilities scattered across Western Europe at laboratories and commercial fabs, there is a need to ship wafers from site to site to implement different process steps, according to Jean-Charles Guibert, program manager in LETI`s Microelectronics Department, and a Euraccess organizer. Single wafers will be transported in newly designed FOUP cassettes that can be pumped down and nitrogen-filled. These "FOUPs for one" can be stacked so that multiple wafers can be shipped if necessary.
In line with the push for new high tech industry, Incam Solutions (for Individual Nitrogen Conditioning for Advanced Manufacturing) is a new company being spun out of LETI to commercialize this new cassette transport system, according to Claude Doche, chairman and CEO of the new start-up in Grenoble.
LETI closely coordinates its work with IMEC in Belgium, which is funded 40% by the Flemish government, as well as major European companies. IMEC works with companies worldwide, developing new technologies that are transferred out into industry. For example, it is clear that in the next few years, a change in silicides will be needed, according to Ludo Deferm, director of process integration at IMEC. TiSi2 is difficult to scale down, and CoSi2 may have to replace it to reduce stresses in submicron circuitry. For eight years, IMEC has been working on a process to do this.
While Philips in the Netherlands is closing a third of its plants worldwide because of rough times in its consumer and components business, Philips Analytical in Almelo is expanding beyond its x-ray diffraction business through acquisitions. The latest, Active Impulse Systems Inc., Natick, MA, adds a fast measurement method for thin metal film thickness and other properties using a pair of lasers (Fig. 3). Developed at MIT over 10 years, the AIS technology uses a 600-psec pulse from a small neodymium-YAG laser to cause rapid thermal expansion of the top film, sending an ultrasonic pulse through a film stack. Refracted light from a CW laser scanning the surface provides data on thickness and other properties of each layer from the reflections from each film interface.
Film thickness instruments, including ellipsometers and film thickness probes, will also be built in a new plant being constructed in Berlin by Sentech, with some support by the German government, according to Helmut A. Witek, director. The company also has funding to develop a prototype of a maskless direct-write lithographic system developed by Fraunhofer Institute in Dresden (see SST, June 1997, p. 175). A beam from a 248-nm excimer laser is raster-scanned over the wafer, using a spatial light modulator (a viscoelastic elastomer over an array of rectangular electrodes) as an electrically programmed reticle. The circuit pattern is stitched over the wafer surface with 100-nm overlay accuracy with a reduction ratio of 100 or more, patterning three 6-in. wafers/hour.
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Figure 3. Philips Analytical`s Impulse 300 for fast film thickness and other properties.
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Figure 4. Wafer analysis at Philips Analytical.
Philips Research Labs in Eindhoven, meanwhile, not only develops a wide range of technology for the entire company, but also has gone into the business of manufacturing and selling CCD imaging chips for professional applications. While CMOS imaging chips have made great strides recently, they can not match CCDs in image quality, with resolution even higher than silver halide film. "Customizing CMOS designs makes them almost as costly as CCDs without matching their performance," according to Albert J. P. Theuwissen, imaging devices department head. The group sees great potential in CCD devices even in high-end consumer applications, such as video and electronic still photography. The labs are also making important progress in conductive polymers, creating flexible circuitry, according to Marianne H. Vincken of the research deptartment.
Smaller footprints, fewer parts
While business has slowed down for many fab suppliers, they are busily improving their technology for the expected future surge. A good example is Alcatel`s Vacuum Technology division in Annecy, France. A combined dry pump and roots blower, for example, has a new rotor design that takes four pieces versus 10 in an earlier version, with 5? the shaft rigidity, according to Bertrand Siegeot, dry pump team manager. The ADP122 has a new flexible design that allows access points to be installed on the back or top, to help minimize footprint. Alcatel has been working with a Silicon Valley company, using sophisticated modeling, to design an improved maglev pump to go on the market in 1Q99, according to John Little, maglev team manager. While these pumps might cost 25% more than ceramic bearing types, COO analysis shows payback in 12-18 months, according to Little.
Alcatel has built a demonstration facility at their Annecy site using a variety of its advanced vacuum systems to show capabilities and to allow potential customers to try out new processes.
Ashing technology developed in Austin, TX, and in Germany is used in microwave batch etchers developed by Technics Plasma GmbH in Munich. Plasmas in the GHz range are more reactive than the rf plasmas of barrel etchers, and therefore perform better in removing hard resists, according to Gerhard Liebel, VP marketing for semiconductor front-end products. Wafer damage has become a problem for rf plasmas, but in the GHz region, heavy ions can`t follow the speed of polarity variation, so they have lower self bias and don`t build up internal capacitance in the plasma, and thus don`t damage the surface, Liebel explains.
Clean Systems GmbH near Munich is working on resin systems to clean up gas effluents, including new formulations for volatile organic compounds and PFCs, said marketing manager Roland Pohl-mann. It may take up to 15 different resins to turn all constituents of a gas stream into stable salts. Used modules are sent to service stations for refilling. New process chemistries use dry resins for gas abatement rather than wet scrubbers, which use huge amounts of water. Pohlmann says that more is spent on gas abatement in Korea and Taiwan, where water is scarce, than in the US. Gas abatement systems at Hyundai`s Fab 7, for example, are 60% dry.
ESEC, Cham, Switzerland, is working on moving wire bonding down to a pitch of 70 ?m from today`s 100 ?m. A few companies are already achieving 80-?m pitches, according to Heinz Burkhalter, wire bonder VP, and 70 ?m is being done in the laboratory. To go to 50 ?m, ESEC is developing new molding compounds with lower viscosity to avoid voids, and improving wire quality. The company also has a new machine (Micron SC) for microBGA and flip-chip packaging.
Sequential cluster tools, including CVD, RTP, and wafer cleaning, are being developed by Steag`s AST Division, Dornstadt, Germany. The company is also working on smaller footprint RTP systems that rotate wafers surrounded by what`s called a "virtual" cross-grid of linear lamps, according to Helmut Sommer, director of operations.
With Europe looking forward to the Euro and the lowering of cross-border restrictions, companies there anticipate playing a much stronger role in global semiconductor and process tool markets.