Hiroshima SSDM meeting overview
11/01/1998
Hiroshima SSDM meeting overview
The International Conference on Solid State Devices and Materials (SSDM), held in Hiroshima, Japan, recently, featured a rump session on future silicon substrates, which included a panel discussion of 300-mm, 400-mm, and ball-shaped materials.
Dr. Tokunaga of Hitachi showed that his company is expecting that 300-mm equipment prices should be 1.1 or 1.2 ? those of 200-mm equipment, but are presently running about 1.5 ?. Prices for 300-mm wafers (per cm2) should be half those of 200-mm wafers, but are presently 4.5 ?, according to Hitachi. No one in the audience saw compelling reasons to move to 300-mm production; emphasis will be on device shrinks without investment in new plants. The panel discussion was generally not fruitful or vigorous, reflecting the very severe DRAM recession in Japan and fab shutdowns and spending cuts at many companies.
Looking to the future, K. Takada, director of the Super Silicon Crystal Research Institute (SSi), Annaka, Japan, made an invited presentation on progress toward 400-mm wafers, prototype examples of which were shown at the conference. His presentation updated an earlier talk, and provided some new insight into manufacturing processes for the 1150-mm diameter wafers. Takada disclosed that SSi will not introduce chemical etching or lapping for 400-mm wafer shaping, but will unveil a ductile mode grinding process. The consortium will also introduce a single-wafer wet-cleaning method instead of the conventional immersion type batch cleaning.
SSi`s progress is on schedule, he said, with financial support from the Japan Key Technology Center, a MITI affiliate, and domestic silicon manufacturers. He said the technologies developed at SSi will be open; the group has already filed for more than 150 patents.
Takada outlined progress toward several goals:
crystal weight: 400 Kg (currently
200 Kg),
effective crystal length (usable for wafer making, excluding top and bottom): 120 cm (currently 30 cm),
flatness: = 0.13 ?m (not yet achieved),
particle size: = 0.04 ?m (not yet achieved), and
metal impurity: = 108 atoms/cm2 (not yet achieved).
epi layer thickness: 2-3 ?ms, with ?3% uniformity (epi growth is in development now)
In addition, A. Ishikawa, president of Ball Semiconductor Inc., Allen, TX, gave an invited talk on spherical silicon crystals and use for ICs. Ishikawa discussed the manufacturing process for ball ICs, with an emphasis on fabrication of single crystal spheres. Polycrystalline granules are sorted by weight and size to get appropriate raw material for 1-mm single-crystal spheres. The granules are preheated and melted by a high-energy plasma source. The melted granules are then dropped through a long tube for cooling. Presently, crystals are not consistently ball-shaped or single crystalline.
Ishikawa plans to achieve sphere fabrication and address other device fabrication issues over the next few years, though most audience members felt this would be difficult. Ishikawa insisted that Ball is leading a revolution in the semiconductor industry with a simple idea. But most attendees could not understand why the ball is better than flat wafers, a very basic concept, and there were many questions on the crystal orientation(s) on the ball surfaces - MOS devices are generally made on <100> surfaces while bipolar are made on <111>. Ishikawa said he had heard such a question many times, but no clear answers were given.