NEC opens new R&D fab

10/01/1998

NEC opens new R&D fab

Japanese chip giant NEC has formally opened its new semiconductor R&D facility at its plant in Sagamihara, outside Tokyo. Known as the UC Plant, the facility is designed to handle process development for geometries from 0.18 to 0.07 ?m over the next decade.

NEC said it plans to start production of 0.18-?m logic devices by the beginning of 1999, 0.15-?m logic by the beginning of 2000, and 0.13-?m logic by 2001 at the new fab. The company`s DRAM roadmap calls for manufacturing of 256-Mbit devices in 1999, sampling of 1-Gbit devices at the beginning of 1999, and sampling of 4-Gbit chips in 2001.

The UC Plant has a current capacity of 3000, 200-mm wafers/month; this will rise to 5000 wafers/month when fully equipped. In the first phase of work, research will cover such areas as lithography using 248-nm, 193-nm, and e-beam techniques; interconnect using copper and tantalum pentoxide as well as low-k dielectrics; and a high-speed transport system and CIM technology to reduce cycle times. The line will offer both R&D and pilot production, to speed transfer of processes into manufacturing. A cogeneration system and fan filter unit air conditioning are designed to reduce energy consumption; better water recycling and waste collection are also incorporated.

Individual 300-mm machines will be installed on the floor for evaluation and basic process development starting this year; NEC expects to begin volume 300-mm production in 2000 or 2001. In the facility`s second phase (slated for the 2000 time frame), a full 300-mm/0.13-?m process line will be installed. In about 2003, a 0.07-?m line will be put in place.

Investment for the first phase was 50 billion yen ($357 million); total spending over 10 years is pegged at 200 billion yen. Total floor space in the building is 25,000 m2, including three 6500 m2 cleanrooms on different floors. - P.N.D.