Issue



Y2K optical lithography


10/01/1998







A SOLID STATE TECHNOLOGY SERIES

Y2K optical lithography

Michael W. Powell

With this issue, Solid State Technology begins its 1998 special focus on optical lithography for the year 2000. Looking ahead, the current Asian contagion or financial turmoil is expected to affect revenues and profits in the semiconductor industry for several years. Elsewhere, the approach of the Y2K problem, or software bug associated with the year 2000, is attracting much attention. For optical lithography, the equivalent concern is: What are the potential Y2K technology issues that could limit the extension of Moore`s Law?

By 2000, advanced wafer fabs must have a productive 193-nm step-and-scan tool for 9-in. reticles in order to produce their initial 1-Gbit DRAM designs with 0.15-?m resolution. In addition, a 193-nm chemically-amplified (CA) photoresist must be available that can enhance the performance of these tools. Also, 4-Gbit DRAM prototype designs with 0.10-?m resolution will require a tool with shorter (e.g. 157-nm) operating wavelengths for R&D or pilot production. In summary, the Y2K issues for optical lithography become: 193-nm step-and-scan productivity, the 9-in. reticle requirements, CA photoresist performance, and new tools for resolution below 100 nm.

The invited authors who address the Y2K issues in this special series were also recent presenters at the IEEE Lithography Workshop in Banff, Canada. Their articles will appear in Solid State Technology, and some in Microlithography World, over the coming months. The articles and authors are: "Nine-inch reticles: An analysis" by R.R. Singh, S. Vu, and J.R. Souza of Intel Corp., which identifies the timely requirements for 9-inch reticles; "Optical lithography below 100 nm" by J. Bruning of Tropel Corp., which reveals the future of tool designs for optical lithography below 100 nm; "Approaches to building 193-nm photoresists: Performance and prospects" by R.D. Allen of IBM Corp. and Almaden Research Center, which addresses the necessary optimization of CA photoresists at 193-nm wavelength for higher sensitivities and lower material complexities; and "Maintaining high throughput in advanced lithography systems" by S. Wittekoek of ASM Lithography, which characterizes a productive 193-nm step-and-scan tool for Y2K capital investments in DRAM or microprocessor fabs.

These articles inform readers about optical lithography`s future through the year 2000. The resolution limit is already being reduced to 0.08 ?m (80 nm) in production. Another paradigm shift in tool design is forecast for optical lithography, however, just as step-and-scan has replaced the stepper. This next tool design could use multiple scans/step and require an environmental load-lock interface for exposing wafers in helium. The design complexity and cost of this next tool could finally mitigate the traditional advantage of optical (4?) over x-ray (1?) for the further extension of Moore`s Law.

MICHAEL W. POWELL received his BSEE and MSEE from Purdue University, his PhD in electrical engineering from Arizona State University, and his MBA in finance from the College of Notre Dame. He is a semiconductor industry marketing consultant and is a member of IEEE, SPIE, and the IEEE Lithography Workshop organizing committee. Powell Consulting, P.O. Box 4360, Foster City, CA, 94404; ph 650/578-0818.