E-beam inspection detects hidden defectsq
09/01/1998
E-beam inspection detects hidden defects
Jeff Hamilton, KLA-Tencor, SEMSpec Division, San Jose, California
Arun Chatterjee, KLA-Tencor, Yield Management Consulting, San Jose, California
After years of being considered a technique of the future, automated electron-beam (e-beam) inspection of semiconductor wafers now offers clear benefits. New complexities in structures, materials, and fabrication techniques for sub-0.25-?m devices create the key challenges for inspection. Advanced automated e-beam systems detect process defects that cannot be captured by optical inspection or conventional e-beam techniques.
As IC makers adopt complex integration schemes and dual damascene, hidden defects such as voiding and post-etch trench residues will predominate and will be the most challenging to eliminate. An advanced e-beam approach directly addresses these issues in high-aspect ratio structures. Furthermore, it is particularly viable as a method for identifying defects historically found using short-loop and end-of-line electrical probe tests. E-beam methods can provide defect data to process development engineers in hours compared to the days or even weeks associated with conventional electrical probe tests.
New fabrication techniques and materials are being introduced at an unprecedented rate to overcome interconnect resistance capacitance delays in 0.25-?m and smaller devices. It is no surprise that the nature and type of defects are changing accordingly. Data suggests that, historically, >70% of the killer defects have been related to interconnect. As such new materials and fabrication techniques as low-k interlayer dielectric, copper metallization, and dual damascene are introduced, defects associated with fill (voids, blocked etches, and particulates) issues will predominate. Likewise, the shift from LOCOS-based isolation to shallow trench isolation (STI) changes the primary concerns from CD-related to fill-related (again, voids, blocked etches, and particulates). Even today, with 0.25-?m devices in production, the challenges of filling anisotropic contacts and vias are well known, as is the difficulty in detecting associated defects. These challenges are precursors to the anticipated problems with the structures created in dual-damascene processing (Figs. 1, 2).
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Figure 1. Current fill challenges, precursors to challenges faced when filling oxide trenches and vias in dual-damascene processing.
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Figure 2. With the migration to damascene-style processing, the long-standing metal etch step is eliminated in favor of CMP and oxide etch steps. Changes are illustrated for a five-metal-layer device: a) nondamascene interconnect process steps; b) damascene interconnect process steps; and c) process control/monitor (major yield deterrents).
With each progression in device generation, the increased via aspect ratios and material advances place a larger burden on the via etch and fill processes. Thus, detecting hidden defects inherent in these processes becomes more difficult.
Advanced e-beam inspection and application
Several leading-edge device manufacturers are actively investigating advanced e-beam inspection technology - a unique class of scanning electron microscopy (SEM) - as they seek to overcome limitations in conventional inspection methods and systems. This new inspection technology has emerged as a viable technique for finding small physical defects and for analyzing faults where the actual defect is hidden from the reaches of visible and optical inspection. It is applicable where electrical probe or standard e-beam approaches fail to identify defects. Studies at Fujitsu [1], AMD [2], Samsung [3], Motorola [4], and Texas Instruments [5] using advanced high-speed e-beam automated inspection systems (SEMSpec) attest that automated e-beam inspection identified process problems much faster than would have been possible with conventional tools.
Automated e-beam technology. SEMSpec technology combines a proprietary, high-brightness, thermal-field emission source, unique electron optics, and a high-speed image processor. Briefly described, the system inspects wafers using a low beam energy of 1.0 keV at scan speeds that are much faster than traditional SEMs. The SEM image is digitized and sent to a computer, where defect detection algorithms determine the acceptability of the pattern. This e-beam technology offers high resolution and large depth of focus; it can find defects as small as 0.10 ?m in size, even on densely packed, high-aspect-ratio, multilayer geometries. Wafers that are difficult to inspect by optical methods due to grainy polysilicon, metal, or other interconnect layers are easily tested because e-beam imaging is cleaner than optical techniques. Also, highly sensitive voltage-contrast imaging adds further defect detection capability.
Digital image processing also contributes a new dimension: important data from wafer mapping in terms of location, density, and distribution can add significantly to the quality of information in determining defect sources.
Voltage-contrast imaging. Voltages induced on the surface of the circuit elements by the high beam current give rise to voltage contrast. The same attributes that give rise to the speed of this technology, e.g., a bright electron source, high beam current, and a novel, energy-filtering secondary electron detection system, also produce a high sensitivity for voltage-contrast imaging and detection at the wafer level, identifying defects based on differences between properly and improperly formed structures (Fig. 3). This often allows detection of defects at both the surface and deeper layers. Similar contrasts are difficult to observe in conventional e-beam approaches.
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Figure 3. Electrons build up differently in features that are electrically defective; features that do not have a good path to ground will build up surface potential differently than those that do. Even the small amount of charge that is deposited on the device by the imaging electron beam can give rise to voltage-contrast effects.
Practical applications
Aluminum force fill. Process developers at one device manufacturer used e-beam-based defect detection to identify yield problems in a force-fill aluminum deposition process being transferred to a pilot line. The type, scope, and magnitude of the problem could not be identified using short-loop testing and bit mapping of defects. With conventional short-loop testing, they were not entirely convinced that the limited number of identifiable defects was a full representation of yield-limiting defects.
Advanced e-beam inspection and its voltage-contrast imaging very quickly identified the number, position, and distribution of defects. Once pinpointed, the defects were confirmed with focused ion beam (FIB) cross-sectioning and further analyzed for a visual representation of the problem (Fig. 4).
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Figure 4. Advanced e-beam inspection view with the corresponding FIB confirmation. Even though electrical contact is made, the defect is identified due to the difference in contact resistance.
Next, they evaluated a potential fix to the process. The quicker-than-traditional feedback of advanced e-beam-based inspection yielded an improved process with quantifiable results.
W plug fill. Tungsten plug is another process where effective fill becomes a challenge and defects are typically hidden. Voltage-contrast imaging can detect this, however. Figure 5 shows an example in which a poorly filled plug is easily identified because it appears markedly different from its properly filled neighbor. In a normal SEM, this via would appear well formed, with no apparent defects. Other examples show that even previous layer defects can be identified. Voiding, where electrical contact is still made, can often be detected due to the difference in contact resistance.
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Figure 5. Advanced e-beam inspection view of the partial fill as seen with voltage-contrast imaging. As seen from the top with optical methods or traditional SEM inspection, the fill would appear normal and the defects would go undetected.
Silicide contact defects. In a third instance, e-beam inspec tion technology was able to identify an anomaly in a silicide contact. Voltage-contrast imaging allowed identification of this very subtle defect. As in previous cases, FIB cross sections further evaluated the particular contact of interest.
At first glance, the problem was not evident, and engineers thought they had cross-sectioned the wrong site. However, a transmission electron microscopy (TEM) analysis of the bad contact compared to a good contact showed that there was only 200 ? of silicide in the bad contact compared to about 600 ? in the good contact (Fig. 6).
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Figure 6. The advanced e-beam technology easily identified a silicide anomaly only confirmed after careful TEM analysis.
The TEM analyses identified thinner silicide and apparent differences in local morphology under the affected contacts. Apparently the etch continued into the silicide, producing bad contacts. It would be difficult to estimate how long it would have taken to identify this subtle defect scenario using conventional methods.
Physical defects. The ability to detect small physical defects is equally important. High aspect ratios or grainy interconnects make optical detection difficult. Defect detection with SEM-based imaging to 0.10 ?m minimizes these issues. In this example (Fig. 7), a poly stringer problem could vary widely due to a narrow process window. The user baselined the process on its R&D inspection tool and quantified the transfer into production by comparing production lots to the R&D baseline on the production inspection tool. Matching the same inspection technique was valuable for quantifying a successful transfer. Additionally, advanced e-beam inspection identified several critical layers such as this poly layer for routine line auditing to minimize the risk of yield excursions.
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Figure 7. Small physical defects to the 0.10-?m level are detected. In this example, a poly stringer has been identified as a yield-limiting defect.
Shorter times for process development
The time available to initiate novel processes continues to shorten. The shorter time scale`s effects on defect reduction are also part of the 1997 National Technology Roadmap for Semiconductors` (NTRS) theme: the continued explosive growth of the semiconductor market has shortened the traditional three-year cycle to less than two years [6]. Time-to-process-solution is increasingly crucial, particularly in the yield-learning phase of process development.
It is not uncommon to allocate more than 80% of a typical learning cycle to root cause identification and analysis and only 20% to problem resolution. Electrical probe and end-of-line yield have long been used as primary methods for finding defects in high-aspect-ratio structures. Process engineers know well, however, that short-loop experimentation and end-of-line yield analysis carry with them severe limitations in time-to-results when used for process development and for analyzing introductory yield-level requirements at process transfer into production. This is especially troublesome, since process development requires quick feedback on design-of-experiment techniques or multiple iterations for process fine tuning. This often creates a critical delay in technology development, transfer, and production. The ability to reduce the root cause phase significantly with the quicker-than-traditional capabilities afforded by advanced e-beam inspection will have a great effect on reducing the typical learning cycle. Further, time-to-market plays a critical role in the ability of a semiconductor manufacturer to demand the price margins necessary to obtain return on investment for accelerated product life cycles.
Conclusion
Early users who have adopted this e-beam inspection technique have recognized the challenges associated with finding defects that are typically undetectable by other methods (i.e., fill issues, material anomalies, defects to 0.10 ?m) and are well poised to meet the greater challenges ahead. The improved time-to-results align with the anticipated technology timelines identified for the industry. This e-beam inspection technology is increasingly used for process module and technology development, technology transfer, and advanced engineering analysis in support of =0.25-?m device technology. In the examples reported here, early identification of these process problems and fast verification saved device manufacturers several months in process qualification time. For the semiconductor industry, judicious use of advanced e-beam inspection technology should save a significant amount of time in bringing new NTRS-charted processes on-line and on schedule.
References
1. K. Suzuki, "Advanced Applications of KLA SEMSpec to Quarter Micron DRAM Development," presented at the KLA Yield Management Seminar, December 5, 1996.
2. S. Zika, P.L. King, J. Pak, "Advanced Techniques for Contact Modules Development," presented at the 1997 IEEE International Symposium on Semiconductor Manufacturing, October 6-8, 1997.
3. Y. S. Kwak, Y.S. Sung, M. Heo, "Application of SEMSpec for Technology Transfer from R&D to Production Fab," presented at the KLA-Tencor Yield Management Seminar, February 25, 1998.
4. C. Apblett, "Inline Voltage Contrast Defect Detection," presented at the KLA-Tencor Yield Management Seminar, July 14, 1998.
5. J.F. Garvin Jr., M. Tinker, A. Anciso, and R. Guldi, "Use of SEMSpec for Defect Detection in Advanced Process Development, Transfer and Qualification," presented at the KLA-Tencor Yield Management Seminar, October 15, 1997.
6. "Defect Reduction," The National Technology Roadmap for Semiconductors, SEMATECH, PP. 163-168, 1997.
JEFF HAMILTON received his BSChE from the University of California, Davis, in 1979. Hamilton has spent more than ten years in process engineering and process management roles, and is now senior product marketing manager for the SEMSpec business unit at KLA-Tencor. SEMSpec Division, 160 Rio Robles, San Jose, CA 95134; ph 408/875-3000, fax 408/434-4270.
ARUN CHATTERJEE received his MS in materials science from the University of Washington, Seattle. He has worked in device development, process integration (CMOS, Bipolar, and BiCMOS), technology transfer, and fabless/foundry management for more than twenty years. His current interests include emerging technologies, process integration, and technology alliances and partnerships.