Issue



Ion implant equipment challenges for .18 um and beyond


06/01/1998







Ion implant equipment challenges for 0.18 ?m and beyond

David W. Duff, Leonard M. Rubin, Eaton Corporation, Semiconductor Equipment Operations, Beverly, Massachusetts

Ion implant manufacturers face process- and productivity-driven equipment performance challenges as device design rules shrink into the =0.18-?m regime and wafer size moves from 200 to 300 mm. These challenges apply to all three implanter segments (high current, medium current, and high energy) and can be separated into two distinct categories: process-level and productivity-level challenges. Approaches to these challenges vary among ion implant equipment manufacturers. Several key process- and productivity-level challenges will have the greatest effect on future equipment designs. These are the formation of ultrashallow junctions in the sub-100-nm range in production environments (high-current implanters); the cost-effective formation of high-dose, high-energy buried layers (high-energy implanters); and the precision placement of dopants in sub-0.25-?m channels (medium-current implanters).

Leading-edge IC, companies will implement four CMOS technology nodes (at 0.25, 0.18, 0.15, and 0.13 ?m) in manufacturing lines over the next six years. This will lead to a dramatic increase in the level of integration (required for the continued reduction of IC cost/function) and a corresponding increase in the technical challenges for semiconductor process equipment suppliers. In addition, the industry`s migration toward 300-mm wafers will further complicate the picture, since all evolving processes required for the increased level of integration must be manufactured with acceptable yield.

This next generation of ion implantation equipment will need to meet the productivity and process control requirements dictated by projected circuit scaling simultaneously. As the industry begins to understand implantation requirements at 0.25 ?m and below, it is clear that no single implanter type will address all applications for CMOS fabrication process flows. The applications required to support the next four CMOS technology nodes have migrated to the ultralow and ultrahigh extremes of the energy spectrum, and require novel ion species (Fig. 1). In addition, advanced channel engineering for sub-0.25-?m devices calls for implanted structures that are precisely aligned to the gate electrode, e.g., Halo, large-angle tilt implanted punchthrough stopper (LATIPS), and self-aligned pocket implant (SPI) [1-4]. Considered together, these technical drivers preclude the use of a single or even two implanter types, because of unacceptable performance trade-offs. Rather, optimized design of ion implantation equipment will be required to achieve superior productivity and process yield simultaneously for these emerging applications.

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Figure 1. High-current ion implant dose-energy application map showing growth of applications with time. In this map, solid lines = current application requirements of ion implantation for advanced CMOS fabrication; dotted lines = future application requirements. The arrows correspond to the transitions in a) poly doping and e) contact source/drain applications. The colors are added for clarification only.

High-current ion implanters

Since beam current is the primary driver determining wafer throughput, aggressive scaling of the source/drain junction and extension depths will require new ion implanters capable of high-beam current at ultralow energies. The evolution of the traditional high-current beamline has led to improved beam current performance for high-dose implant applications at 0.25 ?m (Fig. 1). Since its introduction in the early 1980s, there have been incremental enhancements to the traditional beamline: introduction of improved ion sources to provide longer life and increased beam current; triply indexed dipole magnets to improve mass analysis; magnetic quadrupole focusing to maintain ion beam integrity through the beamline; and more sophisticated charging-control technology, e.g., plasma flood (Fig. 2). However, the inability to generate and transport an energy-pure, ultralow-energy ion beam optimally has limited the extension of this traditional high-current beamline below 0.25 ?m. This limitation is not solely governed by engineering modification or optimization of the traditional beamline, but more by fundamental physics. Development and integration of new technologies provided a next-generation, ultralow-energy (ULE) beamline (Fig. 3a)

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Figure 2. Evolution of traditional high-current implanter beamline.

Ion source technology. The single-aperture, arc-discharge, filament-based ion source for high-current ion implantation has evolved over time to provide enhanced performance in both beam current and lifetime. However, generating ultralow-energy ion beams (=4 keV) that are effective and energy-pure requires a revolutionary new technology. The new technology incorporates a patented RF-based source and a static extraction electrode assembly, producing dramatically improved beam current and source lifetime performance relative to conventional arc discharge ion sources. A long-life RF antenna generates the ions within a cylinder lined with multicusp magnets, which provide a quiescent plasma environment by localizing the plasma away from the wall of the cylinder magnetically. The source also incorporates a patented magnetic filter separating the ionization region from the extraction region, to enhance the atomic fraction of the extracted beam (notably B+ in the BF2 spectrum) before it reaches the extraction apertures. In addition, the filter passes ions with a lower temperature, making the plasma in front of the plasma aperture extremely quiescent.

A new multi-aperture extraction electrode set has overcome the space-charge limitation associated with ultralow-energy beams (Child`s Law) in a single-aperture system using a high-density arc discharge. Since the conventional, single-slit extraction geometry of an arc-discharge source does not adequately address the space-charge issues, multiple apertures were incorporated into each of the five electrodes in the extraction assembly. The 2-D array of apertures is equivalent to a much larger single-slit system with a much lower plasma density. The result is a much higher extractable beam current relative to the traditional arc-discharge ion source/variable extraction assembly. For example, the energy-pure beam current for elemental boron at 5 keV is 12 mA for the ULE beamline compared to 5 mA for a traditional beamline. At 2 keV, a ULE beamline will produce >4 mA of energy-pure beam current, while a traditional beamline will produce ~1 mA.

The new pentode extraction assembly is a static, self-registered unit with no moving parts. The result is much faster tune times for both same-species changes in energy or beam current, and for transitions between species. In a traditional arc-discharge ion source with variable aperture extraction, the gap between the extraction and suppression/ground electrodes must change to optimize beam-current performance when changing the energy or current of the ion beam. The arc power must also change to maintain thermal equilibration in the arc chamber. During the gap movement, the arc-control current over- and undershoots until the plasma reaches equilibrium. The time constant for the arc-current adjustment closed-loop servo is longer than the thermal time constant of the filament, extending the settling time of the system from 5-10 min. In contrast, the new RF ion source/pentode assembly has no feedback control or associated thermal time constants and lacks thermal or mechanical hysteresis. The result is dramatically faster tune times: typically <2 min for beam-current or energy changes for the same species. The corresponding tune times from a cold start are equally improved. This new RF source requires only 10 min to tune to specified beam currents compared with 30-45 min for the traditional arc-discharge/variable extraction technology.

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Figure 3. a) Ultralow-energy (ULE) beamline. The magnetic analyzer (dipole) has integral magnetic quadrupole focusing (throughout the entire beam path); the RF ion source has lower-density, quiescent plasma and magnetic cusp containment. b) ULE mass analysis magnet.

In addition to high beam-current performance and short tune times, the RF source/electrode assembly has a long source life time (=200 hr) under maximum beam-current conditions, compared to the typical 80-100 hours for a traditional arc-discharge ion source. Certain preamorphizing species that enable ultrashallow junction formation, such as GeF4, present some challenges for traditional arc-discharge ion sources and can degrade the operational lifetime to well below 100 hr. The new RF ion source can easily exceed 200 hr of operation running a 5-keV Ge+ beam with 10 mA of beam current. This RF ion source will redefine the source lifetime metric by which high-current implanters are judged, requiring only a weekly preventative maintenance schedule even in the heaviest production environment (full week, three shifts, seven days operation), and promoting improved and more predictable RAM metrics.

Mass analysis. The susceptibility of an ion beam to expansion ("blow-up") as a result of space-charge effects increases with decreasing energy. Beam blow-up results in decreased beam current at the wafer and increased likelihood of the beam striking the beamline walls of the systems. At a fixed beam current, a beam of larger initial cross section will experience a less severe expansion. Preventing beam blow-up requires maintaining a large cross section along the entire mass analysis pathway. Conventional mass analysis technology is not suitable for transporting large-diameter beams, since it lacks active quadrupole focusing. A patented new magnet technology (Fig. 3b) can effectively transport a large-diameter beam. The 135? mass analysis dipole magnet is "split" in construction, allowing the use of the entire gap cross section for beam transport. In conventional magnets, only a fraction of the gap width is usable. The new magnet design also has three integral quadrupoles to focus the beam actively along the entire mass analysis pathway. The adjustable quadrupole strength can accommodate varying levels of space-charge defocusing, while the indexed magnets found in a traditional implanter provide only fixed quadrupole strength. The unique split magnet design also permits fast and easy maintenance of the removable, graphite-lined beamguide.

Charging control. Gate oxide thickness scaling and gate oxide integrity (GOI) are driving the requirements for more demanding charging control technology for high-current implanters. As gate oxide thicknesses approach 50 ? for 0.18-?m technology, oxides are increasingly vulnerable to breakdown from ion-implantation-induced charge buildup. The electrostatic potential of high-current positive ion beams may reach hundreds of volts unless electrons are present to compensate the space charges. As a result, all high-current implanters apply a charging-control technique near the wafer surface to eliminate or reduce the induced charge. The diameter of the ion beam generated from an RF source/pentode assembly and injected into the mass analysis system is relatively large compared with that from a traditional beamline. At an energy of 2 keV, the diameter of a ULE beam is ~85 mm, compared with ~50 mm for a traditional high-current beamline. This larger beam cross section leads to a decreased charge density/unit area, which in turn minimizes the level of ion beam potential intervention exerted by the applied charging-control technology.Charging-control technology for traditional high-current implanters has evolved to keep pace with the increased degradation-sensitivity of thinner gate oxides. Secondary electron flood (SEF) and plasma electron flood (PEF) technologies have successfully met the demands of new device generations. Due to space-charge limitations, however, these conventional neutralizers require a minimum potential difference between the beam and the electron source to extract a sufficient electron current. This has two undesirable effects:

1. the beam potential increases, resulting in increased beam blow-up, and

2. the electrons entering the beam have a higher electron temperature, possibly leading to higher negative charging of the target.

This can lead to spatial and velocity distribution for the electrons, causing local over- and undercompensation of the beam potential.

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Figure 4. 200-eV energy-pure (no decel) boron ULE implant, 4.3 ? 1014 dose.

In a newly designed and patented RF plasma cell, the ULE beam passes directly through a neutralizing plasma on its way to the wafer. The RF plasma cell produces a low-temperature, high-density plasma in the beam region near and up to the target. The high-electron (plasma) density results in sufficient flux to balance the highest ion beam density encountered. Since the ion density of the beam is considerably lower than the plasma density of the cell, this represents only a minor perturbation to the beam potential. In this environment, any local charging is compensated by charge flow driven by diffusion (statistical redistribution of particles from a region of higher density to a region of lower density) as opposed to a potential gradient established between the beam and an electron source. Whenever the electron density is locally reduced at the wafer, electrons diffuse to the wafer until the density equilibrates. The low-electron temperature of the cell plasma reduces the magnitude of possible negative charging, and avoids "heating" of the beam plasma. There is no electric field or beam potential intervention invoked in this charging-control mechanism. The RF plasma cell uses the same technology employed in the RF ion source - a multicusp magnetic field to maintain the plasma containing the neutralizing electrons in the beam region, and magnetic confinement to keep the electron temperature low within this region.

The culmination of all these design elements is the most revolutionary change in high-current ion implanter technology since the introduction of commercial high-current implanters in the early 1980s. The energy-pure, 200-eV boron implant shown in the secondary ion mass spectrometry plot in Fig. 4 illustrates the benefits of this new ULE technology.

High-energy ion implanters

Advanced technology also provides superior process performance in high-energy implanters. Most commercial high-energy ion implanters employ linear acceleration technology to obtain high-beam currents at energies exceeding 200 keV (Fig. 5a). Although it is costly to build, and requires more computing resources to tune than the simpler DC tandetron technology, the linear accelerator provides significant operation and process advantages that more than offset its cost and complexity. A linear accelerator consists of an alternating series of high-voltage RF electrodes and grounded quadrupole focusing lenses. The phase (timing) of the RF voltage between each electrode and grounded quadrupole lens is carefully adjusted to match the arrival of the desired ions at each gap. These ions are accelerated at each gap, with final energies up to 20 ? higher than the maximum acceleration voltage in the beamline. Ion energies in the MeV range are thus obtained without the use of ultrahigh-voltage terminals and their associated arcing problems. Since linear acceleration does not use electron stripping (with the associated current loss) to accelerate the ions, the beam current obtainable is limited only by the output of the source and the linear accelerator efficiency. The biggest advantage of RF linear accelerators is the filtering inherent in their operation. Since ions of different masses reach different velocities when traversing a given electric field, ions with masses other than the desired species fall out of sync with the phases of the electrodes, and are quickly filtered out of the beamline. This removal of beam contaminants and energy contaminants is inherent to the linear accelerator operation, and does not depend on tuning of the beamline. It is impossible to achieve this level of beam filtration using a DC tandetron-type accelerator. A traditional bending magnet is located at the end of the linear accelerator to further ensure that a pure, monoenergetic beam is implanted i

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Figure 5. a) Linear accelerator (LINAC) beamline; b) linear accelerator filtering of 10B in a high-dose P+++ implant run with a continuous, deliberate BF3 leak in the source.

Figure 5b shows the mass filtering of a linear accelerator. We implanted P+++ at 2500 keV, 2.5 ? 1015/cm2, while intentionally leaking 0.35-sccm natural abundance BF3 into the source region. Natural abundance BF3 contains about 22% 10B, whose mass-to-charge ratio differs from that of 31P+++ by one part in 31. Although barely resolvable by mass analysis techniques, this small difference is easily resolved by the velocity filtering in the linear accelerator. The total dose of 10B detected in the implanted wafer was about one millionth the dose of the desired phosphorus. The peak concentration of boron detected was about four orders of magnitude lower than the phosphorus concentration at that depth.

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Figure 6. CMOS cross section containing buried layer.

High-dose buried layers. The high beam currents and energy-pure beams from a linear accelerator-based ion implanter are essential to the fabrication of high-dose (5 ? 1014 to 1.5 ? 1015/cm2), high-energy (1.5-2.0 MeV) buried layer implants in silicon. Buried layers can significantly improve the material quality of Czochralski silicon substrates while keeping processing costs down. Figure 6 shows a cross section of a twin retrograde well CMOS inverter with a blanket p-type buried layer. The buried layer is implanted just after the LOCOS or shallow trench isolation step to avoid diffusion of the buried layer during initial thermal processing. Due to the reduced thermal budget available in advanced CMOS processes, the secondary defects resulting from the buried layer implant remain in the buried layer region. The combination of these defects and the high-doping levels in the buried layer provide effective gettering of metallic impurities, interstitial oxygen, and implant-induced defects that may arise during subsequent device processing. The removal of metallic impurities improves device leakage and gate oxide integrity (GOI). Reducing oxygen levels prevents the formation of oxygen precipitates in the device regions that can induce leakage and GOI failures. Buried layers can reduce the oxygen concentration in the near-surface region to levels equivalent to that of bare silicon, with a fraction of the thermal stresses and processing costs [5]. Implant-induced defects can lead to excessive source/drain junction leakage if not properly addressed. The high-dose buried layers can getter these defects [6] and dramatically reduce device leakage.

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Figure 7. Medium-current beamline with superior energy and species purity. The beam scan correction lens adjusts beamlines to make them parallel.

The highly doped buried layer is also extremely effective at latch-up suppression because current injected by the vertical bipolar transistor is shunted to ground. The buried layer takes the place of the highly doped substrate of an epi wafer and, because it is closer to the active device regions than an epi substrate, latch-up trigger currents can be two to three times higher for the buried layer structure [7]. Despite their high quality, epi wafers are limited by high costs. High-dose blanket buried layers can be integrated into modern CMOS devices for about 90% less than epi silicon, dramatically expanding the pool of economically feasible applications, and offering the potential for significant cost savings in current applications of epi wafers. A drop-in, high-dose buried layer process appears to match the metallic-impurity and dissolved-oxygen levels of an epi layer, while also providing superior latch-up resistance and gettering of damage introduced by etch, thermal oxidation, silicide formation, and implantation, which are completely unattainable with epi wafers [7].

Medium-current ion implanters

The evolving requirements for high-tilt punchthrough stop implants have forced yet another optimization of specific hardware for these specialized applications. These sub-0.25-?m implants require a serial medium-current implanter with an energy-pure and highly parallel beam, high-tilt capability, and in situ wafer repositioning.

Energy-pure beamline. A beamline incorporating an angular energy filter/neutral beam trap can deliver superior beam energy and chemical purity for the increasingly demanding applications below 0.25 ?m (Fig. 7). This unique filter secures beam energy and chemical contamination levels that are typically below metrology detection limits, addressing a major issue in all critical implantation applications used in advanced CMOS processes. Most importantly, neutral particles are completely removed from the ion beam, resulting in tighter process control (dose reproducibility, uniformity) in critical implants with photoresist-coated wafers. These wafers release hydrogen, nitrogen, and other gases when placed in the ion beam, dramatically raising the implanter beamline pressure. The dopant ions in the beam interact with this residual gas and can readily form neutral dopant particles in the ion beam that cannot be detected by the implanter`s dose measurement system. If not removed, these neutrals will cause significant dose variations (both uniformity and repeatability) on critical implants such as the threshold adjust. These neutrals can also cause significant cross-wafer variations in beam incidence angle (parallelism) on implanters without an energy filter. Neutrals formed in the magnetic field to adjust the ion beam scan angles after electrostatic scanning will not be correctly deflected to a parallel path. These variations in ion beam parallelism can significantly degrade transistor characteristics that are set by implantation steps self-aligned to the gate structure, or in which channeling variations must be tightly controlled.

If ion beam neutralization occurs before setting the final ion energy in the post-acceleration/deceleration electrodes in an implanter without an energy filter, there will be severe energy contamination in the ion beam. The final energy filter should be located between the wafer and these electrodes, completely removing all the neutrals that cause this energy contamination from the ion beam. A particularly common situation in which energy contamination can degrade devices is when using beam deceleration (decel) mode to obtain energies below 40 keV. This problem is most apparent when photoresist-coated wafers are processed with beam currents at (or near) decel specification limits. To reduce this problem, systems without an energy filter lower the beam current in decel mode (or use only drift mode, which also reduces beam current) when processing photoresist-coated wafers. Reducing the beam current decreases the beamline pressure, thus reducing neutrals contamination in the ion beam. However, the inevitable throughput reduction makes this a costly solution. An angular energy filter eliminates the compromise between wafer throughput and process quality.

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Figure 8. Constant focal length, closed-loop mechanical scanning system.

The same difficulty affects a medium-current implanter performing high-energy ion implantation applications (e.g., retrograde wells) with doubly or triply charged ions. Significant low-energy contamination in the ion beam will result from charge-state changes in beam ions due to interaction with beamline residual gas. This will degrade the implant process control of the transistor channel and well surface concentrations, resulting in degraded transistor threshold voltage control and increased source/drain junction capacitance (decreased circuit speed).

The use of a beamline with a final energy filter ensures the highest possible yield and productivity, particularly in advanced (0.25- and 0.18-?m geometry) IC processes. High-energy neutral contamination can distort the desired doping profile, diminish the uniformity and repeatability of the implant dose, and degrade the cross-wafer parallelism of the ion beam. This results in substantial variations in important transistor parameters that are set by critical channel engineering implants, such as threshold adjust, lightly doped drain or moderately doped drain MOSFETS, punchthrough stop, Halo or LATIPS, and large-angle tilt implant drain.

High-tilt-angle integrity and quad implants. Large tilt angles (15-60?) between the ion beam and the wafer normal are necessary to place the dopants at the appropriate locations under the gate electrode without using thermal diffusion. These implants must be done on both sides of all the gates, or the resulting transistors will have asymmetric electrical characteristics (although this is sometimes desirable). Rapid, in situ wafer repositioning will thus be necessary to manufacture sub-0.25-?m devices with high throughput. In situ wafer positioning also avoids the increased particle contamination that would result from additional cycling of the wafer through the implanter.

Superior angular control on high-tilt punchthrough-stop implants produces tighter transistor parametrics. The use of electrostatic optics produces fewer aberrations relative to a magnetically scanned system, resulting in very small angular deviations from the desired setting.

For optimal process performance and productivity in high-tilt quad implants, a constant focal length, closed-loop mechanical scanning system is desirable (Fig. 8). By keeping the beam focal point equidistant at all points across the wafer during the mechanical scan, even a single scan for high throughput in quad-implant mode can reach superior uniformity and beam parallelism. In addition, because this constant focal length design eliminates beam divergence errors, full 0-60? tilt capability is acquirable with the same superior uniformity.

Conclusions

Current and future design considerations are actively influencing solutions to equipment challenges for ion implantation suppliers. However, these challenges also involve the development of novel integrated processes that will surely impact final design elements. Ion implantation technology is an exciting area that will need to move forward through effective partnerships between leading-edge IC manufacturers and ion implant suppliers.n

References

1. T. Hori et al., "A New P-channel MOSFET with Large-angle Tilt Implanted Punchthrough Stopper (LATIPS)," IEEE Elec. Dev. Lett., Vol. 9, pp. 641-643, 1988.

2. T. Hori, "A 0.1-?m CMOS Technology with Tilt-Implanted Punchthrough Stopper (TIPS)," 1994 IEDM Tech. Digest, pp.75-78, 1994.

3. M. Rodder, S. Aur, I-C. Chen, "A Scaled 1.8-V, 0.18-?m Gate Length CMOS Technology: Device Design and Reliability Concerns," 1995 IEDM Tech. Digest, pp. 415-418, 1995.

4. A. Hori, A. Hiroki, H. Nakaoka, M. Segawa, T. Hori, "Quarter-Micrometer SPI (Self-aligned Pocket Implantation) MOSFETs and Its Application for Low-Supply Voltage Operation," IEEE Trans. Elec. Dev., Vol. 42, pp. 78-86, 1995.

5. L. Rubin et al., "Effective Gettering of Oxygen by High-Dose, High-Energy Boron Buried Layers," to be published.

6. J.Y. Cheng et al., "Formation of Extended Defects in Silicon by High-Energy Implantation of B and P," J. Appl. Phys., Vol. 80, p. 2105, August 15, 1996.

7. L. Rubin, W. Morris, "High-Energy Implanters and Applications Take Off," Semiconductor International, p. 77, April 1997.

DAVID W. DUFF received his BA degree in chemistry from Ohio Wesleyan and his PhD degree in physical chemistry from Colorado State University. He has held positions at General Scanning Inc., as marketing manager for memory repair and back-end equipment, and at Varian Associates, as marketing product manager for NMR spectrometers. Duff is high-current product line marketing manager for Eaton Semiconductor Equipment Operation`s Implant Systems Division. Eaton Corp., Semiconductor Equipment Operations, 55 Cherry Hill Drive, Beverly, MA 01915-1053, ph 978/232-4000, fax 978/232-4200.

LEONARD M. RUBIN received his BS degree in materials science and his MS and PhD degrees in electronic materials from Massachusetts Institute of Technology. Before joining Eaton, he was senior process integration engineer at Zilog Inc. Rubin is principal scientist for Eaton Semiconductor Equipment Operations, where his primary responsibility is in leading joint development programs with Eaton customers to implement integrated process solutions across Eaton`s product lines.