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06/01/1998







Technical Program

July 12-17, 1998

San Francisco and San Jose, CA

This year`s SEMICON West will offer more than 70 technical programs and courses, 35 of them new. Just like last year, the programs are divided between San Francisco and San Jose, with front-end wafer-processing programs in San Francisco and back-end test, assembly, and packaging programs in San Jose. Events begin July 12 and continue through July 17.

Programs in San Francisco will be held at the ANA Hotel San Francisco, the Moscone Convention Center, and the San Francisco Marriott. Programs in San Jose will be held at the San Jose Hilton, McEnery Convention Center, and the San Jose Fairmont. Standards workshops will be held at the San Francisco Marriott and the San Jose Hilton.

The exhibition at San Francisco`s Moscone Center runs from July 13-15, with show hours from 10:00 am to 6:00 pm on Monday and Tuesday, and from 10:00 am to 4:00 pm on Wednesday. The exhibition at the San Jose McEnery Convention Center runs from July 15-17, with show hours from 10:00 am to 6:00 pm on Wednesday and Thursday, and from 10:00 am to 4:00 pm on Friday.

To check for availability of courses or to register on-line, visit the SEMI web site at www.semi.org. Registration is encouraged before June 12 for best selection. If you register for a program or an event, you will automatically receive a badge allowing you to enter the exhibition. For more information, contact SEMI at ph 650/940-6905.

What follows is a chronological list of 1) technical programs and their locations for separately, San Francisco and San Jose; 2) tutorials and education courses; 3) business technology courses; and 4) standards meetings information. Registration fees for the events are listed with each entry. All fees refer to registration after June 12; before June 12, fees are lower.

Sunday

Vacuum Technology for Semiconductor Process Management

Sunday, July 12 - Monday, July 13,

8:00 am-5:00 pm

San Francisco Marriott

Topics to be explored will include the creation and control of vacuum environments, degrees of vacuum and process requirements, vacuum control systems including the appropriate uses of gauges, and troubleshooting techniques.

Registration: $595

Fundamentals and Process Characterization of Ion Implantation

Sunday, July 12 - Monday, July 13,

8:00 am-5:00 pm

San Francisco Marriott

This two-day course provides a technical introduction to the ion implanter, its operation, its general architecture, and how to troubleshoot the implant process. This is not a basics course.

Registration: $850

Workshop on Gas Distribution Systems

Sunday, July 12, 1:00-5:00 pm

Moscone Center

This is a workshop to exchange information and ideas on contamination control in gas distribution systems and to identify the need for new or improved standards. Technical presentations will be followed by panel discussion featuring experts from the user community.

Registration: $295

Workshop on Contamination in Liquid Chemical Distribution Systems

Sunday, July 12, 1:00-5:00 pm

Moscone Center

Industry experts present an in-depth look at distribution systems for liquid process chemicals, including flexibility, functions, design, performance monitoring, total

cost of ownership, and safety.

Registration: $295

Plasma Etch `98 - Processes and Equipment for the New Millennium

Sunday, July 12, 1:00-5:00 pm

Moscone Center

A group of world-renowned lecturers will track the evolution of plasma etching equipment and processes from the mid-1970s to the present and then focus on evolving trends.

Registration: $295

STEP: Semiconductor Manufacturing Equipment RAM and Productivity

Sunday, July 12, 1:00-5:00 pm

Moscone Center

This Standards Technical Education Program will focus on SEMI Standard E10, its benefits to equipment suppliers and end users, and the development of methods and metrics for the measurement of cluster tool RAM.

Registration: $295

STEP: CIM Factory Communications

Sunday, July 12, 1:00-5:00 pm

Moscone Center

This Standards Technical Education Program (STEP) will focus on establishing CIM systems for present and next generation IC or FPD factories. US and Japanese experts will discuss the scenario under consideration for establishing the optimum factory communication environment to support advances in equipment integration.

Registration: $295

Monday

Silicon-On-Insulator (SOI) Manufacturing Technology

Monday, July 13, 8:00 am-12:00 noon

San Francisco Marriott

A panel of experts from industry and academia will discuss progress in SOI manufacturing technology, a possible replacement for bulk Si substrates in an existing silicon line.

Registration: $295

Symposium on Contamination-Free Manufacturing (CFM) for Semiconductor Processing

Monday, July 13, 8:00 am-5:00 pm

San Francisco Marriott

This symposium takes a close look at contamination free manufacturing (CFM) as the primary approach for sustaining and improving yields in semiconductor manufacturing.

Registration: $395

Perfluorocompound (PFC) Technical Update in Cooperation with the Semiconductor Industry Association (SIA)

Monday, July 13, 1:00 pm-5:00 pm

Moscone Center

A panel of experts addresses the technical developments needed to attain the semiconductor industry`s PFC emission reduction objectives.

Registration: $295

Tuesday

STEP: SEMI E36, Specification for Electronic Documentation Interchange

Tuesday, July 14, 8:00 am-12:00 noon

San Francisco Marriott

This Standards Technical Education Program (STEP) introduces the SEMI Standard E36 that defines the information architecture (including schema and vocabulary) for the interchange of electronic documentation.

Registration: $295

Chemical Mechanical Polishing (CMP) Technology for ULSI Interconnection

Tuesday, July 14, 8:00 am-5:00 pm

San Francisco Marriott

Learn from industrial and academic researchers worldwide about current and future issues regarding CMP.

Registration: $395

Advanced Statistical Process Control (SPC) Techniques for Process Yield Improvement

Tuesday, July 14, 8:00 am-5:00 pm

San Francisco Marriott

Learn how to assess the effectiveness of existing SPC tools and procedures used to improve product yield in semiconductor manufacturing.

Registration: $495

Lithography at the Wavelength of Light

Tuesday, July 14, 8:30 am-5:30 pm

San Francisco Marriott

Gain a complete understanding of the major challenges facing 250-nm technologies and the requirement for optical imaging at the wavelength of light, including tools, resists, photomasks, and metrology.

Registration: $395

Fab Layout Design Methodology: Case of the 300-mm Fabs

Tuesday, July 14, 1:00-5:00 pm

Moscone Center

Effective facility layouts can reduce manufacturing operating expenses by at least 10-30%.

Registration: $495

Wednesday

Workshop on Manufacturing Execution Systems (MES) for Semiconductor Processes

Wednesday, July 15, 8:00 am-12:00 noon

Moscone Center

Speakers from the vendor community and users tell how MES contribute to better equipment utilization, improved yields, and quality products.

Registration: $295

Flat Panel Display Manufacturing Technology Conference

Wednesday, July 15

Session 1-E7: 8:00 am-12:00 noon

Session 2-E8: 1:00-5:30 pm

San Francisco Marriott

Gain insight into the latest manufacturing and design challenges of the FPD market with a full market and technology update.

Registration: One session: $295; both sessions: $395

STEP: EHS for the 300-mm Era

Wednesday, July 15, 8:00 am-12:00 noon

San Francisco Marriott

This open forum will explore the efforts and policies of two large IC manufacturers to improve the safety of the semiconductor manufacturing process, reduce the discharge of hazardous materials into the environment, and conserve scarce energy and natural resources.

Registration: $295

Symposium on Advanced Lithography for 130 ?m and Below

Wednesday, July 15, 8:30 am-5:30 pm

San Francisco Marriott

A distinguished panel of experts will examine the promise and problems of developing optical lithography useful in the manufacture of semiconductors at geometries smaller than 180 ?m.

Registration: $395

MEMS Producers Discuss Future Equipment and Materials Needs

Wednesday, July 15, 1:00-5:00 pm

San Francisco Marriott

The market for miniaturization of microelectronic manufacturing systems (MEMS) is growing, but manufacturers face significant problems.

Registration: $295

Materials Characterization Strategy for the Giga-Bit DRAM Era II

Wednesday, July 15, 1:00-5:00 pm

San Francisco Marriott

Topics include trace and surface analysis, defect-free manufacturing, and particle measurement techniques.

Registration: $295

Tuesday

Semiconductor Packaging Symposium - Session 1: High Density Organic Packaging

Tuesday, July 14

8:30 am-12:00 noon

San Jose Hilton and Towers

A panel of industry experts will review topics such as: high density silicon platforms, electronic packaging, flip chip BGA applications, interconnect technology, laminated chip package technology, microBGA on printed wiring boards, and high-performance laminated chip package technology.

Registration: $485. Note: Fee includes admission to all sessions. Sessions are interchangeable.

Semiconductor Packaging Symposium - Session 2: Reliability and Performance

Tuesday, July 14, 8:30 am-12:00 noon

San Jose Hilton and Towers

A panel of experts will explore topics on thermal, electrical, and mechanical reliability and the performance of various package types from surface mount plastic packages to BGAs.

Registration: $485. Note: Fee includes admission to all sessions. Sessions are interchangeable.

Wednesday

Semiconductor Packaging Symposium - Session 3: New Developments in Packaging Interconnection

Wednesday, July 15, 8:30 am-12:00 noon

San Jose Hilton and Towers

Learn about the latest developmentsand trends in interconnect technology at this symposium, ranging from ultra fine pitch wirebond to direct chip attach and flip chip alternatives.

Registration: $485. Note: Fee includes admission to all sessions. Sessions are interchangeable.

Semiconductor Packaging Symposium - Session 4: Advances in Ball Grid Array

Wednesday, July 15

8:30 am-12:00 noon

San Jose Hilton and Towers

This session reports on the latest developments in BGA technology from the viewpoints of component manufacturers, suppliers, and end users.

Registration: $485. Note: Fee includes admission to all sessions. Sessions are interchangeable.

Jitter Analysis 101 - A Foundation for Jitter Measurements

Wednesday, July 15, 8:00 am-5:00 pm

San Jose Fairmont

Improve your ability to track the source of signal jitter, measure it, and limit its impact on overall device performance.

Registration: $495

Strategies for Rapid Technology Implementation Workshop

Wednesday, July 15, 1:00-5:00 pm

San Jose Fairmont

Join other packaging experts and users in a discussion of the major technical and commercial barriers to the use of new technologies in the electronics industry.

Registration: $295

Thursday

Semiconductor Packaging Symposium - Session 5: Chip Scale Packaging

Thursday, July 16, 8:30 am-12:00 noon

San Jose Hilton and Towers

Acquire advanced knowledge of the latest manufacturing and cost developments and trends in chip scale packaging. A panel of experts explores equipment, processing, inspection, and materials issues pertaining to high-volume manufacturing.

Registration: $485. Note: Fee includes admission to all sessions. Sessions are interchangeable.

Semiconductor Packaging Symposium - Session 6: Material Challenges in Packaging

Thursday, July 16, 8:30 am-12:00 noon

San Jose Hilton and Towers

A panel of industry and research institute experts will focus on the new materials being developed in reponse to the IC packaging and assembly challenges posed by the computer, telecommunication, and automotive industries. This session will specifically address new adhesives, interfaces, encapsulants, substrates, and other applications.

Registration: $485. Note: Fee includes admission to all sessions. Sessions are interchangeable.

Seventh Annual Manufacturing Test Conference - Session 1: Strategic Management of Test

Thursday, July 16, 8:30 am-12:30 pm

San Jose Hilton and Towers

Session I focuses on the testing challenges and issues facing semiconductor companies, ATE suppliers, and subcontract vendors. Included in this session will be discussions of strategies for the handling of complex advanced packages; the economic considerations of outsource testing; and ATE vendor views of the testing challenges for the new millenium.

Registration: $295

Test, Assembly and Packaging (TAP) Vision Conference

Thursday, July 16, 1:00-5:00 pm

San Jose Hilton and Towers

This session presents the latest use of vision applications in TAP along with case studies that will help personnel meet cost, quality, and customer satisfaction goals.

Registration: $295

Step: EHS for the 300-mm Era

Thursday, July 16, 1:00-5:00 pm

San Jose Hilton and Towers

See listing under San Francisco Events, Wednesday.

Registration: $295

Friday

Seventh Annual Manufacturing Test Conference - Session 2: Emerging Technologies for System-On-A-Chip

Friday, July 17, 8:30 am-12:30 pm

San Jose Hilton and Towers

Session 2 will focus on the trend in the semiconductor industry toward more complex mixed-signal chips, and ultimately, to system-on-a-chip.

Registration: $295

Semiconductor Processing Technology

Thursday, July 9 - Saturday, July 11,

8:00 am-5:00 pm

ANA Hotel San Francisco &

Thursday, July 16 - Saturday, July 18,

8:00 am-5:00 pm

San Jose Fairmont

To measure the downstream impact of equipment and materials problems, you need to know the fundamental steps in semiconductor processing technology from front end through final test. This course will familiarize you with each step so you can support your customers and their problems.

Registration: $1350

Design Practices for Higher Equipment Reliability Tutorial

Monday, July 13, 8:00 am-12:00 noon

San Francisco Marriott

Learn how to improve the reliability of equipment at the design stage, including classroom presentation and hands-on experience. A seven-step design improvement process will be introduced.

Registration: $395

Resolution Enhancement Technologies (RET) in Optical Lithography Tutorial

Monday, July 13, 8:00 am-5:00 pm

San Francisco Marriott

This day-long tutorial aims to teach you everything you need to know to form your own opinion about the feasibility of RET and its impact on your own specific IC manufacturing process or technology.

Registration: $495

Microlectronic Manufacturing Systems (MEMS) Technology

Tuesday, July 14, 8:00 am-5:00 pm

San Francisco Marriott

This introduction to miniaturization of MEMS technology will show you how semiconductor materials and equipment suppliers can help to advance it.

Registration: $495

Chemical Vapor Deposition (CVD) for Integrated Circuits Tutorial

Tuesday, July 14, 8:30 am-5:30 pm

San Francisco Marriott

This course will provide you with the concepts and models necessary for a comprehensive understanding of CVD.

Registration: $450

IC Trends, Packaging, and Testing Issues: An Introduction for Test Engineers Tutorial

Tuesday, July 14 - Wednesday, July 15,

8:00 am-5:00 pm

San Jose Hilton and Towers

This course gives a comprehensive look at the difficult challenges facing IC packaging and testing such as business and technology trends and technical aspects.

Registration: $875

Advanced Packaging Technologies Tutorial

Tuesday, July 14 - Wednesday, July 15,

8:30 am-5:30 pm

San Jose Hilton and Towers

This intensive tutorial covers all aspects of modern semiconductor packaging from materials selection and interconnect technologies to manufacturing, quality, and reliability considerations.

Registration: $695

Process Integration and Device Characterization in Microelectronic Manufacturing Tutorial

Wednesday, July 15, 8:00 am-5:00 pm

San Francisco Marriott

Acquire a comprehensive understanding of the potential manufacturing and integration problems involved in submicron manufacturing technologies, such as integration issues, device characterization, and yield and reliability considerations.

Registration: $495

Integrated Circuit Yields Tutorial

Wednesday, July 15, 8:00 am-5:00 pm

San Francisco Marriott

Practical examples and theoretical information are combined to provide the skills and information you need for a fuller understanding of IC manufacturing yields.

Registration: $495

Digital IC Test Engineering Tutorial

Wednesday, July 15, 8:00 am-5:00 pm

San Jose Fairmont

This course is designed for users of digital VLSI test systems. The experienced instructor will present the latest developments in today`s state-of-the-art testers, and their hardware and software attributes.

Registration: $530

Planarization Processes for ULSI Fabrication to the Year 2003

Wednesday, July 15, 8:30 am-5:00 pm

Moscone Center

Gain a global understanding of the challenges facing current process technology for planarizing semiconductor devices, and the paths of likely technological evolution.

Registration: $495

Benchmarking: A Tool for Success Tutorial

Wednesday, July 15

1:00-5:00 pm

San Francisco Marriott

Learn how to apply benchmarking concepts and tools to your specific area of interest.

Registration: $395

Polymers for Electronic Packaging Tutorial

Thursday, July 16, 8:30 am-5:30 pm

San Jose Fairmont

Acquire a thorough understanding of polymeric materials and their importance in the advances of electronic packaging and interconnect technologies.

Registration: $495

High Performance Multichip Module (MCM) Materials and Technologies Tutorial

Thursday, July 16, 1:00-5:30 pm

San Jose Hilton and Towers

Learn about the latest and most basic materials and process technologies involved in high-performance MCMs. The characteristics and properties of those materials and technologies will be examined.

Registration: $395

DC Test Methodologies for Digital Circuits (DC) Tutorial

Friday, July 17, 8:00 am-5:00 pm

San Jose Fairmont

This course explains the concepts and techniques of DC testing used to verify the DC characteristics of digital semiconductor circuits. The purpose of each test is explained first, then the step-by-step process of the test is defined. Actual test results are then used to illustrate the possible pass/fail results.

Registration: $499

Flip Chip Technologies Tutorial

Friday, July 17, 8:30 am-5:30 pm

San Jose Fairmont

In this tutorial, you will learn all aspects of flip chip technology, including different interconnect, underfill and wafer bumping methods; cost, quality and reliability considerations; as well as equipment and assembly variables.

Registration: $495

Making Major Sales (Spin Selling)

Sunday, July 12 - Monday, July 13

8:00 am-5:00 pm

San Francisco Marriott

Learn new behaviors and a sales methodology that will help you develop more profitable relationships in business-to-business selling. A questioning strategy is featured that will help uncover customers` needs.

Registration: $1195

Ergonomic Design for the Semiconductor Industry

Sunday, July 12, 8:30 am-5:00 pm and

Monday, July 13, 8:30 am-12:30 pm

San Francisco Marriott &

Friday, July 17, 8:30 am-5:00 pm

& Saturday, July 18, 8:30 am-12:30 pm

San Jose Fairmont

This course introduces you to SEMI S8-95 "Safety Guidelines for Ergonomics/ Human Factors Engineering of Semiconductor Manufacturing Equipment," the industry-established guideline for the application of ergonomics in the design and evaluation of semiconductor tools.

Registration: $695

Winning Customer Satisfaction

Sunday, July 12, 8:30 am-5:30 pm and

Monday, July 13, 8:30 am-4:30 pm

ANA Hotel San Francisco

This workshop gives technically oriented personnel the interpersonal skills needed for success in sales, service, and marketing.

Registration: $1,095

SEMI Enabling Products and Services Section (EPSS) Meeting

Monday, July 13, 8:00 am-9:30 am

San Francisco Marriott

The EPSS is concentrating on a program that generates information and insight on how suppliers can more effectively communicate with their chipmaker customers.

Registration Fee: Free. Preregistration is not required. To guarantee your seat, please arrive at least 15 minutes prior to the meeting.

EHS International Compliance and Regulatory Update

Monday, July 13, 8:30 am-12:00 noon

Moscone Center

This update presents the regional health, safety, and environmental compliance and regulatory requirements for the semiconductor industry.

Registration: $295

Working Effectively with Asia: Cross-Cultural Awareness and Skills

Monday, July 13, 8:30 am-3:00 pm

San Francisco Marriott

This course covers issues such as cultural awareness and expected protocol in business and social situations.

Registration: $395

Overall Equipment Effectiveness: Improving Equipment Productivity

Monday, July 13, 9:00 am-5:00 pm

ANA Hotel San Francisco

Gain the tools necessary to benchmark and communicate equipment productivity to IC manufacturers.

Registration: $650

The Global 300-mm Transition

Tuesday, July 14

8:00 am-5:00 pm

Moscone Center

Presentations by key industry representatives will give updates on the success of the industry`s transition to 300 mm.

Registration: $395

Equipment and Materials Market Briefing

Tuesday, July 14, 8:30-9:30 am

Moscone Center

SEMI senior market analyst Elizabeth Schumann offers a mid-year look at the worldwide semiconductor equipment and materials markets.

Registration: $150

Competitive Marketing Strategy: The Lanchester Equation

Tuesday, July 14, 9:00 am-5:00 pm

ANA Hotel San Francisco

This class covers all aspects of the "Lanchester" sales and marketing strategy developed by F.W. Lanchester in 1916 and modified for marketing by Japanese researchers.

Registration: $650

SEMI Chemical and Gas Manufacturers Group

Tuesday, July 14, 10:00-11:30 am

San Francisco Marriott

Join other SEMI chemical and gas manufacturers in a discussion.

Registration: Free. Preregistration is not required. To guarantee your seat, please arrive 15 minutes prior to the meeting.

Forecasting Techniques for the SEM Industry

Tuesday, July 14, 1:00-5:00 pm

San Francisco Marriott

Review major forecasting techniques used in the semiconductor equipment and materials industry. Learn how to locate your current position in the business cycle.

Registration: $350

EHS Interest Group Meeting

Tuesday, July 14, 3:00-6:00 pm

San Francisco Marriott

Obtain an up-to-date status report on the recent development and design of semiconductor manufacturing equipment offering increased levels of fire protection.

Registration: Free. Preregistration is not required.

Software Management for Senior Executives Course

Wednesday, July 15, 1:00-5:00 pm

San Francisco Marriott

Learn how to improve the management and development of software-intensive systems for semiconductor manufacturing.

Registration: $395

Equipment and Materials Market Briefing

Thursday, July 16, 8:30-9:30 am

San Jose Convention Center

SEMI market analyst John Schuler offers a mid-year look at the worldwide semiconductor equipment and materials markets.

Registration: $150

International Packaging Strategy Symposium

Thursday, July 16, 8:30 am-5:00 pm

San Jose Fairmont

This symposium serves to improve communication among system integrators, IC device manufacturers, and equipment and materials suppliers.

Registration: $395

This year, SEMI is celebrating the 25th anniversary of its standards programs. The more than 120 standards workshops at SEMICON West are open to all interested parties, at no charge, and do not require preregistration. In order to guarantee your seat, please arrive 30 minutes before the workshop begins. A full list of standards is available on the web at this address: dom.semi.org/web/wstandards.nsf/

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