Advanced IC packaging and market trends
06/01/1998
Advanced IC packaging markets and trends
Sandra Winkler, Electronic Trend Publications, San Jose, California
Advanced IC packaging strives to further industry goals of reducing the amount of space consumed by electrical components while increasing system performance.
For some markets, such as the medical industry, reduction in component size is critical. Portable computers, watches, and telecommunications devices also require small, lightweight parts, as do many applications in the automotive arena.
ICs are steadily improving, and the package or attachment method must facilitate their performance. The packaging world made a technological breakthrough with the introduction of surface mount technology, and another with the introduction of ball grid arrays. Direct chip attach (no package needed) and chip scale packages (CSP) are logical steps in furthering a process already begun.
Today, the IC packaging world is moving toward flip chip technology, whether as a direct attachment method or internally within a BGA or CSP. A logical transition for semiconductor companies is the move toward wafer-level packaging. This technology is similar to wafer production itself and uses much of the same equipment.
 |
Figure 1. Forecast for direct chip attach production for chip on board, flip chip on board, tape automated bonding, and other methods.
 |
Figure 2. Forecast for chip scale packaging unit sales for flex, rigid, leadframe, wafer-level assembly, and other designs.
Direct chip attach
Direct chip attach (DCA) is a method of attaching a bare IC die to the printed circuit board (PCB) without the benefit of an IC package. Bare die provides the highest level of electrical performance possible. Absent is the package, which can contribute inductance, capacitance, and other undesirable characteristics.
The electrical performance of a bare die is very high. Packaging of a die causes stress on the chip, which alters device parameters. The result is that a packaged chip will have different device parameters than a bare die. However, bare die have problems and issues that are quite different from those of packaged ICs.
DCA has been used practically since the beginning of the semiconductor industry. However, the many problems inherent in its use have limited it to certain critical applications. Still, its use is substantial and growing. The three methods by which DCA is accomplished are chip on board (COB), flip chip on board (FCOB), and tape automated bonding (TAB), which is also called tape carrier package (TCP).
Figure 1 presents the forecast for DCA production. The number of units will grow from 1.9 billion in 1996 to 3.7 billion in 2001. The growth rate is strong, at a 15% CAGR (compound annual growth rate) for the forecast period, which is a reflection of both a healthy semiconductor market and a strong need for a smaller device with superior electrical performance. This 15% CAGR can be compared to the 8% unit CAGR of the entire IC industry, for the same years. However, the DCA growth rate slows over the period, as CSPs provide more viable alternatives to DCA.
Chip scale packaging
Although DCA may be the "ultimate" IC package, being no package at all, it causes many problems, such as no standard size or footprint, reduced protection for the die, and compromised ability to test prior to placement. CSP, however, will be making a big splash. This package is not much bigger than the die itself, but offers robustness, ability to test, and, in most cases, ability to achieve a standardized footprint on a PCB.
CSPs are extremely small, presenting an opportunity to reduce the material costs associated with IC packaging. Their small size also requires less board space, resulting in an opportunity to reduce the size of the board. These minute packages present opportunities and challenges unique to a packaged part, and at times are closely aligned with bare die.
 |
Figure 3. Forecast for chip scale packaging revenue.
There are more than 40 different CSP designs, and more are being developed every day. Given that current use is minuscule, developing a forecast is very difficult. To forecast the market for these devices, we have grouped them into the following families: flex-circuit interposer, rigid substrate, custom leadframe, and wafer-level assembly (Fig. 2).
We estimate that CSPs will grow from less than 7 million commercial units in 1996 to 3.5 billion by 2001 at a CAGR of over 250%. This represents about a 5% market share penetration of the 70 billion ICs forecast for 2001. Some readers will believe that this is the forecast of the CSP hype machine that is currently in vogue. Others may see the forecast as low. In fact, it is based on interviews with over 100 semiconductor companies regarding their plans for CSP use.
The unit forecast can be used along with data collected from assembly companies to forecast CSP packaging revenue (Fig. 3). Packaging revenue from CSPs should grow from $31 million in 1996 to $2.1 billion in 2001, representing a substantial market. However, only time will show whether reality upholds this forecast.n
Sandra Winkler is a senior analyst for Electronic Trend Publications. She has focused exclusively on the IC packaging industry for the last three years. Electronic Trend Publications, 1975 Hamilton Ave., Suite 6, San Jose, CA 95125; ph 408/369-7000, fax 408/369-8021.