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Understanding hydrogen silsesquioxane-based dielectric film processing


05/01/1998







Understanding hydrogen silsesquioxane-based dielectric film processing

Mark J. Loboda, George A. Toskey, Dow Corning Corp., Midland, Michigan

Hydrogen silsesquioxane (HSQ) resin has demonstrated unique performance as a precursor for the formation of interlayer dielectrics (ILDs) used in manufacturing ICs with multilevel metallization schemes. Commercially available HSQ-based films routinely provide dielectric constants lower than PECVD silicon dioxide films in submicron devices, with high degrees of planarization. Understanding HSQ film properties is key to successful integration of this material into current and future wafer processing lines.

For planarized ILD applications, engineers at several IC manufacturers have reported on spin-coating solutions of HSQ resin as a proven production technology. The forums have typically been VMIC and DUMIC, the ULSI/VLSI Multilevel Interconnections Conference, and the Dielectrics for ULSI/VLSI Multilevel Interconnections Conference.

Data from various reports show that oxide formation using HSQ produces greater planarization and gap fill than standard plasma processes for SiO2, while providing the option to eliminate etch-back techniques [1-2]. In addition, HSQ offers a lower dielectric constant (k <3.0) than standard plasma deposited SiO2, which is so crucial in reducing capacitance between adjacent metal interconnections, paving the way to decreased electrical delay and higher information processing rates on ICs [3-4].

Chemical structure

HSQ, which is commercially available in solution as FOx Flowable Oxide, is a silicon-based resin related to a family of ordered three-dimensional polymers explored previously [5]. The structure of these siloxanes resembles a cage (Fig. 1a), but the chemical reactions that produce HSQ resins do not fully form these cages, resulting in random structures of various sizes (Fig. 1b).

Standard siloxane spin-on glasses and organic materials used as spin-on dielectrics contain silicon-carbon or carbon-carbon bonds. HSQ resins do not have carbon bonds. HSQ exhibits good solubility in most hydrocarbon and siloxane solvents, with the exception of alcohols and water, which can promote gelation.

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Figure 1. HSQ polymers are three-dimensional molecules whose structure resembles a) a cage; however, formation of HSQ resins results in b), random structures.

HSQ film properties

Fourier transform infrared (FTIR) spectroscopic analysis of HSQ-based films deposited on silicon clearly identifies the H-Si-O molecular bonding network. Figure 2 shows a typical IR spectrum of an oxide film deposited using an HSQ-resin solution. Assignments to the absorption peaks that describe the molecular structure are shown in Table 1. Table 2 lists relevant properties of HSQ-based oxide films for applications requiring intermetal dielectric isolation layers.

Successful processing schemes for HSQ films control the reactions that result in dissociation of the Si-H bond and subsequent molecular rearrangement and formation of SiO2 bonds. The reactions are promoted by thermal decomposition and oxidation. Furnace temperature and oxygen concentration are two key processing variables that influence these reactions.

Changes in the film during processing are easily tracked using infrared spectroscopy. Dow Corning research shows that as the material is heated, the Si-H stretch absorption area decreases, and the Si-O stretch absorption area increases. A simple way to illustrate this behavior is to view the material as a composite mixture of HdSiO2-d and SiO2 components. As the amount of SiO2 bonding in the film increases, the film takes on more SiO2 character, which includes increased permittivity and hydroxyl (Si-OH and H-OH) content. Maximizing the HdSiO2-d content produces the lowest possible film density, which in turn helps produce low permittivity.

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Figure 2. A typical IR spectrum of a HSQ-deposited oxide film.

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Process integration

For spin-coating processes, the deposited HSQ film thickness is easily controlled by manipulating the spin recipe and resin concentration in solution. Typical HSQ film processing uses a commercial spin-on glass track system with integrated hot plates and either an integrated or stand-alone quartz-lined furnace. The precursor material is dispensed onto wafers using spin recipes that are optimized for planarity, uniformity, and dispense volume. The wafer is then passed over three hot plates in succession at temperatures of 150, 200, and 350?C, for one minute each. The hot plates expel residual carrier solvent and initiate structural changes in the film to stabilize it prior to furnace annealing.

Deposited HSQ films may be exposed to ambient moisture while waiting for further processing. Moisture uptake in oxides has been linked to dielectric reliability problems such as high permittivity, via poisoning, and hot carrier injection failures [8]. When the film is rich in the H-Si-O component, its interaction with moisture is with a value of x only fractionally different from 1. The reaction is an example of so-called water blocking: The Si-H bond interacts with water and forms oxide, an effect similar to that documented on hydrogenated oxide films deposited by electron cyclotron resonance (ECR) PECVD [9]. The small amount of water absorbed from the atmosphere via hydration is dissociated, thus precluding reliability problems. This beneficial character of the HSQ-based film is reduced when significant numbers of Si-H bonds are dissociated during furnace processing.

2HxSiO(4-x)/2 + H2O ? 2SiO(5-x)/2 + (1+x)H2

Control of temperature and ambient atmosphere are important for integration schemes using HSQ in the ILD structures. The standard furnace annealing process is performed at a temperature of 400?C in a nitrogen atmosphere. Push-and-pull temperatures and ramp rates are optimized to maximize wafer throughput, while minimizing oxidation of the film. Annealing temperature influences the mechanical stability of the film and, more importantly, the potential for oxidation.

Figure 3 shows the temperature dependence of the steady-state decomposition of Si-H bonds by oxygen. Below the vicinity of 350?C there is little change in the stoichiometry of the HSQ film, while above 360?C the amount of Si-H bond dissociation due to oxidation increases very rapidly with temperature. As Si-H bonds are broken, the molecular structure begins to include SiO2 bonds. Work at Dow Corning has shown that even low concentrations of oxygen (e.g., 100 ppm) can oxidize the HSQ film at temperatures above 350?C [10].

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Figure 3. Temperature dependence of Si-H bond decomposition by oxygen.

Subsequent wafer processing steps should minimize wafer exposure to temperatures higher than the anneal temperature. This avoids additional thermal pyrolysis, which tends to increase the SiO2 component in the film. An HSQ-based dielectric film could be subject to an interaction during the following processes:

 SiO2 deposition

 resist deposition and patterning

 via etch

 chemical or plasma-ash resist strip

 via metallization

 metal deposition

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Figure 4. Gap fill and planarization achieved with standard HSQ-based spin-on oxide processes for a), submicron features and b), in a multilevel metal structure. (Photo courtesy of Philips Semiconductors)

Preserving Si-H bonding in the film throughout all subsequent wafer processing steps is key to maintaining a low dielectric constant material. As noted previously, the Si-H bonds are broken with oxidation or temperature. Processes to deposit PECVD oxides, metal vias, and metal interconnects can expose HSQ films to a highly oxidative environment or high temperatures (>400?C). Both silane and TEOS-based PECVD oxide processes have been integrated with HSQ films. Optimal PECVD oxide processes applied to the HSQ film surface should operate at 350?C, using silane to minimize thermally initiated and oxidative reactions from changing the HSQ film [11].

An HSQ process is often integrated as a replacement for a PECVD oxide process. Intermetal via formation processes developed for PECVD SiO2 involve steps that can potentially degrade the HSQ film. Plasma-etch rates of the HSQ can differ from PECVD oxides and other spin-on dielectrics, so resist thickness should be adjusted to compensate for HSQ etch rate. This helps minimize potential damage to the HSQ layer during resist strip.

HSQ users must take care in applying via formation processes that have been developed for PECVD-based oxide ILDs. Resist, patterning, and etch processes must be adjusted to minimize the negative effects of the strip procedure on HSQ films. Fluorine and oxygen plasma-etch chemistries are typically used to etch vias through the oxide interlayer dielectric. A critical parameter in this process is the concentration of oxygen in the plasma. Excessive amounts of oxygen can interact with the HSQ in the via sidewalls. Oxygen radicals attack the Si-H bond, leading to the formation of a porous oxide and increased hydroxyl content. As an alternative, neat carbon tetra fluoride etch chemistry has been successfully used to open vias in HSQ-based films [12].

The considerations that apply to the via etch process will also apply to the resist strip process. Even though most integration schemes protect the HSQ layer with an oxide overcoat, oxygen-plasma ashing must be performed with care to prevent excessive heating of the wafer and to minimize the material modification of the via sidewall. Wet chemical stripping solutions containing amine-based solvents such as aminoethoxy ethanol and hydroxylamine will result in chemical attack of the Si-H bond in the HSQ-film sidewall. The chemical reaction between the amine-based solvent and the Si-H bond will break the bond and incorporate hydroxyl contamination into the material adjacent to the via sidewall. This contamination can degrade via performance through oxidation of the via metal during deposition, a process known as via poisoning.

Via fill processing should be tailored to minimize temperature excursion, thus suppressing undesirable changes in the HSQ oxide. The via metallization process is usually performed at temperatures in excess of 450?C, using aluminum or tungsten. A degas procedure is often used beforehand to remove weakly bound moisture in the oxide ILD, which would otherwise escape from the via sidewalls during metal deposition. This moisture has been linked with high resistance vias if not eliminated prior to metal deposition. Via etch and strip processes that have not been optimized for HSQ materials can result in significant outgassing of water and hydrogen from the HSQ film during this stage of device fabrication. At metal deposition temperatures >400?C, further hydrogen loss from the HSQ layer is also likely, but should not degrade via-fill processes. Minimizing exposure of the HSQ film to temperatures greater than 400?C in subsequent processes will help to maintain a low dielectric constant and high film integrity.

Performance and cost-of-ownership

Figures 4a and 4b illustrate typical gap-fill and planarization performance in a multilevel IC design. Key performance features include etch back elimination and reduced interconnect capacitance relative to SiO2 [1, 3, 13]. Customer testing has shown reliability of dielectric interlayers deposited using HSQ materials to be comparable with PECVD processes, including standard and fluorinated silicon oxide films [14, 15].

In a previous issue of Solid State Technology, cost-of-ownership (COO) analysis of HSQ films and other spin-on, low-k dielectric film technologies has been reported at $12-$14/layer [16]. COO results can vary considerably, depending on specific inputs to the model used. For HSQ processes, a COO reduction to $7-$9/layer is achievable through more efficient material usage, such as optimized dispensing volumes, as well as film processing (e.g., improved anneal methods and maximized coater throughput). Forthcoming technologies such as closed-cup spin-coaters show promise for additional COO benefits.

Conclusion

HSQ-based spin-on dielectrics offer improvements in the processing and electrical characteristics associated with multilevel metal IC designs. The HSQ film process is easily integrated as a substitute for a traditional oxide process, and the benefits have been regularly demonstrated in high-volume IC manufacturing. For the use of HSQ-based films as dielectric interlayers, an overall process strategy has been described that helps minimize oxidation of the HSQ film during post-deposition processing steps, ensuring optimal performance.

Acknowledgments

HSQ-based FOx Flowable Oxide is a registered trademark of Dow Corning Corp.

References

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2. B.K. Hwang, et al., "New Spin-on Glass Based on Hydrogen Silsesquioxane for Inter-metal Planarization," Proc. 12th ULSI/VLSI Multilevel Interconnections Conference, p. 113, 1995.

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11. M.J. Loboda, I. Goswami, "PECVD Oxide Cap Integration for Optimal HSQ Performance," Proc. 14th ULSI/VLSI Multilevel Interconnections Conference, p. 632, 1997.

12. M.J. Loboda, et al., "Chip Scale Packaging with High Reliability for MCM Applications," Proc. of the Fifth ISHM Int`l Conf. on Multichip Modules, pp. 257-262, 1996.

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15. E. Sabin, G. Albrecht, "Reliability Concerns Integrating Hydrogen Silsesquioxane Into a BiCMOS Process," 2nd Int`l Symp. on Low and High Dielectric Constant Materials, 1997 Spring Meet of the Electrochem Soc, Montreal.

16. E. Korczynski, "Low-k Dielectric Integration Cost Modeling," Solid State Technology, pp. 123-128, October 1997.

MARK J. LOBODA received his BS degree in physics in 1983 and MS degree in applied physics in 1985 from De Paul University. In 1989, he joined Dow Corning, where he works on spin-on and CVD dielectrics, process integration and characterization of thin films. He has obtained six US patents and has published more than 30 technical papers in the areas of spectroscopy, frequency control, and thin film materials science. Dow Corning Corp., 2200 W. Salzburg Rd., Midland, MI 48686; ph 517/496-6249, fax 517/496-5121.

GEORGE A. TOSKEY received his BS degree in electrical engineering from Michigan State University in 1982, and his MBA degree from University of Michigan-Flint in 1988. In 1982, he joined Dow Corning, serving as an application engineer and engineering manager for silicon-based dielectric materials. He is now market manager of IC interconnect in the Semiconductor Fabrication Materials department.