Tokyos VLSI center adds foundries

02/01/1998

Tokyo`s VLSI center adds foundries

With several large firms already signed up as foundry partners, the University of Tokyo`s VLSI Design Education Research Center (VDEC), Hongo, Tokyo, is eyeing the addition of two additional foundries to its program next year. Sony Corp., Atsugi, will provide foundry services for gate arrays, and Rohm Co. Ltd., Kyoto, will join the program as a foundry for 0.6-?m CMOS processes.

Last year, NTT Electronics, a subsidiary of Nippon Telegraph & Telephone, and Nippon Motorola served as foundries for the program. At the NTT facility, 21 different types of VLSIs were produced using a 0.5-?m CMOS process. Ten universities were involved in the work, which cost about 24,000 yen($190.46)/mm2. Some 16 universities worked through the Nippon Motorola facility, where 45 different kinds of VLSIs were produced using a 1.2-?m CMOS process. The fabrication charge at this facility was just 6000 yen/($47.64) mm2.

Founded at the University of Tokyo in May 1996, VDEC has a variety of tools on hand, including an electron beam prober, a 320-pin 100-MHz/200-MHz logic tester, focused ion beam systems, and CAD tools from Cadence Design Systems, Synopsys, Avant!, and Mentor Graphics. VDEC also rents a variety of CAD tools for VLSI design to participating universities. To date, 117 professors and research associates from 96 universities in Japan are listed as registered users; students also have access to VDEC through the faculty members.

Nine national universities have established VDEC subcenters on campus, including Hokkaido University, Tohoku University, Tokyo Institute of Technology, Nagoya University, Kanazawa University, Kyoto University, Osaka University, Hiroshima University, and Kyushu University. - WaferNews