Issue



Technology News


12/01/1999







Significant progress with pilot-line 300mm lithography

Engineers currently testing an initial 300mm lithography tool set — scaled up from 200mm i-line and DUV — have highlighted elements of their success on the Semiconductor300 (SC300) 64Mbit pilot line in Dresden, Germany. Wafer lots with measurable yield have produced data on overlay, critical dimensions (CDs, Fig. 1), and run-to-run, wafer-to-wafer, and within-wafer performance. "In addition," said Alain Charles, contributing engineer reporting at SPIE's Microelectronic Manufacturing conference (Sept. 1999), "we have preliminary data on 300mm tool footprint, throughput, reliability, and productivity gains. We can start to predict what performance we should expect from 300mm manufacturing lithography tools."

  • The targeted 1.3x 200-300mm footprint and chemical consumption for track systems has not been achieved, but is close at 1.39x for a double coat, double develop-configured tool.
  • For exposure tools, where the aggressive goal is the same footprint on both 200mm and 300mm scanners or steppers, to date SC300 has achieved 1.3x with an exposure tool that does not need a front opening unified pod (FOUP) interface.
  • Low contact, metal-free wafer handling on track systems has achieved defect specifications comparable with 200mm performance data.
  • Three-sigma values observed on hot plates at different temperature ranges are below 0.4°C, which is sufficient for 0.25µm process capability.
  • The combination of well-known 200mm processing techniques, such as pre-wet and variable rate dispense, has helped to hold resist dispense volume for a 300mm wafer at 1.5x of that required for 200mm; however, wafer topography could increase this in the future.
  • Both a meniscus-like soft impact and a spray-type develop process have been sufficient to meet CD uniformity specifications. The challenges for these processes, however, involve chemical consumption, defects, and degrees of freedom for designing improved processes.


Figure 1. Percent deviation from target CD; data from 30 wafer lots.
Click here to enlarge image

300mm exposure tools require a larger wafer chuck and a heavier wafer stage, which dictates larger linear motors to achieve stage acceleration and speed equivalent to 200mm systems. These motors dissipate more heat and need longer bar mirrors. "We predicted an impact on overall performance due to these changes. In addition, wafer local flatness and overall flatness is harder to achieve on 300mm wafers due to processing effects on the wafer and backside contamination. We have evaluated both ring and pin chucks. While the overall backside defect density is comparable to 200mm tools, pin chucks are essential to reduce sensitivity to incoming and embedded backside particles," said Charles.


Figure 2. Cps on typical 0.25µm layers from stepper and scanner exposure tools.
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The transition from 200mm to 300mm wafers dictates reduced maximum track spin speeds, typically <2500 rpm. This imposes a limitation on resist and ARC thickness specifications and the rate of solvent evaporation. Charles said, "The ability to coat two significantly different thicknesses with one resist viscosity is limited, thus we have increased the number of resist dispense systems. In addition, our use of specially designed grades of photoresist for low spin speeds has influenced overall throughput by increasing dry time." The SC300 engineers have been able to achieve within-wafer coat uniformity of 1.14nm for i-line and 1.16nm for DUV resists on 50 consecutive wafers.

So far, the SC300 process uses a 90s resist process time dictated by the higher thermal mass of the wafer, which needs more time to stabilize in heat and chill processes. This equates to a track throughput around 40 wafers/hr, which is low compared to 200mm processing, but currently matches the approximate throughput of exposure tools. With its maximum image field of 22 x 22mm, the SC300 stepper (0.6 NA, 0.65 sigma, conventional illumination) requires a minimum of 120 shots to cover a 300mm wafer when using 8 alignment sites, yielding ~30 wafer/hr with a typical DUV resist exposure dose. The SC300 DUV scanner (0.6 NA, 0.75 sigma, conventional illumination) is capable of up to 42 wafers/hr with a typical DUV resist exposure, but because SC300 uses mix-and-match lithography, the scanner matches the stepper field and its throughput is limited to 30 wafers/hr.

"Obviously, we need to more fully utilize the scanner's larger field size," said Charles. "Next generation scanners target 65 to 70 wafers/hr and >100 wafers/hr within 2 to 3 years. Throughput of tracks can easily be improved by increasing the number of process module units available for each step, even though this is made at the expense of the tool footprint."

At the SPIE conference, Charles revealed data gathered using 0.24µm ground rules on a 64Mbit DRAM that showed CDs — from lot-to-lot and within-a-lot for a critical DUV process layers — fairly stable and easily within ±7% of the CD target. "Most of the variability is within-wafer," noted Charles. "Currently with this process, most layers do achieve Cps above 1.30 (Fig. 2), and we have achieved improvements over time with both the stepper and scanner. To achieve these results, it is necessary to carefully monitor and control wafer warpage due to hot processes, layer induced stress, and wafer backside contamination."

At SC300, the first 300mm exposure tools were expected to have slightly reduced performance in stage orthogonality, scaling, and precision compared to 200mm due to longer wafer stage travel distances (i.e., 200mm linear error generates a 1.5x larger 300mm overlay error). "In fact, we expected that overlay could become the main lithography-performance limiter on 300mm wafers, where 0.25µm processes require <100nm overlay on critical layers," said Charles.

SC300 work on overlay issues has identified and corrected two significant problems. The first was nonlinear grid distortion from wafer temperature variation due to misplacement on the track's chill transfer plate. The second was overlay offset and grid orthogonality drift due to stage mirror expansion caused by heat generated from the stage linear motor movement.

"In summary, mean-plus-three-sigma data reveal that our scanner can achieve an overlay below 80nm on a consistent basis without requiring send ahead wafers. Using a 100nm specification, the x and y axis Cpk capability indices are above 1.5," said Charles. "So far, our stepper, reflecting its early maturity, has less stability and greater difficulty in achieving <100nm overlay consistently."

Despite anticipation of relatively low reliability with alpha and beta tools, once the initial equipment problems were corrected, systems have often been up over 90% of the time. "This is a very encouraging sign that the maturity of the next 300mm generation lithography tools will approximate the current 200mm tool set performance," said Charles. — P.B.

Semi session shows standards emerging for 300mm tools

How smooth will be the coming global transition to 300mm wafers? Companies such as Intel and Texas Instruments have announced plans for new 300mm fabs over the next couple of years, and others are expected to follow. But an efficient and economical shift will depend critically on standards, and how faithfully tool and equipment vendors adhere to them. This will enable chipmakers to mix and match equipment from different vendors, and ensure that materials handling and automated systems work well with all tools and loadports, for example. So far, the picture is mixed, according to Lorn Christal, of International Sematech's I300I committee.

Compliance to standards and guidelines was measured by tests conducted at Sematech's Process & Metrology Center in Austin, TX, on a wide range of tools and equipment. Testing followed procedures defined in a thick manual, the Factory Integration Maturity Assessment (FIMA) document, developed to help in assessing production equipment conformance to Semi Standards and I300I Factory Guidelines. Average conformance ranged widely, with buffering scoring 79%, loadports 52%, materials handling 31%, and ES&H (environment, safety & health) only 26%, according to Christal (see figure), speaking at a Semi-sponsored STEP (Standards Technical Education Program) briefing in Nashua, NH.

Will compliance increase now that the FIMA document, one of the most complex ever developed by Sematech, has been assembled? One deterrent, Christal acknowledged, is the complexity of the organization of the present manual, which was assembled in a matter of weeks. There are three major sections of the FIMA document. One covers procedures, or assessment methods; the second covers physical testing results, including worksheets; and the third is intelligent inquiry. A manufacturer of cassettes, for example, would have to find appropriate detail scattered at various places throughout the document. The material is being reformatted to make it more accessible to users, and all applicable sections for any equipment will be found together, he said.

Will tool and equipment vendors follow standards and guidelines in their designs? This will be heavily dependent on whether semiconductor fabs require compliance.

"The fabs are requiring full compliance, not only to these standards and guidelines, but to additional requirements of their own, " explained three engineers from Varian who attended the Nashua briefing.

How about global acceptance? Christal said that a Sematech group met with 10 engineers working with the Japanese SELETE consortium to discuss standards. "When they saw the size of the FIMA document they almost fell over," he said. He indicated that the Japanese Group had not been working closely with their toolmakers on standards, but they wanted to do something like it for their companies, and expected to have something by next April or so.


300mm production equipment standard automation compliances.
Click here to enlarge image

SELETE has been collaborating with I300I for three years. I300I's Productivity and Infrastructure group, for example, is working with SELETE to establish methods for cutting silicon costs, and they have agreed to partner on developing models for 300mm cost of ownership and defect analysis. They also are discussing other areas of cooperation and expect to partner in the area of automated materials handling systems (AMHS). International Sematech is also expanding its collaboration with SELETE and other international consortia. They are exploring partnership possibilities for areas such as resource conservation and mask inspection and repair as well as for the 300mm transition.

While many standards areas are still evolving, in several types of software, for example, many others have been codified, such as for wafers, carriers, equipment interfaces, and 300mm facilities. These standards appear in I300I Factory Guidelines: Version 4.1, which can be read and downloaded from www.sematech.org. Numerous task forces under Semi's International Standards Program continue to develop pertinent standards, with work beginning recently on back end issues. Many standards also appear on the Semi web-site, at www.semi.org. Registered users can download them from the Semi OnLine bookstore. — B.H.

SVGL puts up fight for 130nm node

Earlier this year, Silicon Valley Group's lithography (SVGL) division seemed to have conceded defeat for its Micrascan 193 exposure tool, at least for 130nm production. Now, however, Werner Rust, director of marketing, says "Not so."

Based on improved lithography results obtained with new resist, SVGL believes that its proven 0.60 numerical aperture ArF system is superior to high NA 248nm and 193nm exposure tools for the 130nm node. The improvement in imaging results from better resist and processing. As recently as March, the best DOF for 140nm line space patterns was 300nm, and that in 290nm thick resist. Now, 130nm L/S patterns print in 390nm of JSR AT-108 resist (coated over NFC B101 BARC) with 600nm DOF. PAR-101-A4 resist prints 180nm and 160nm L/S patterns in 475nm resist films with 500nm DOF. Isolated lines also print well, with 300nm DOF even when overexposed to give 100nm linewidth.

Across Field Linewidth variation is also now well within specs, 3s = 8.7nm at for 140nm L/S patterns and <12nm for isolated 130nm lines. Even though the imaging lens contains 5 CaF2 optical elements, the optical distortion is <6.4nm half range and the tool-to-itself overlay is <32nm (mean +3s). Stage repeatability is better than 15nm 3s.

While no one has yet compared the SVGL 193nm system directly to a high-NA 248nm scanner (which benefits from highly developed resist formulations), aerial image modeling suggests that the resolution should be about 10% better for the shorter wavelength system at 500nm DOF. What has been proved is that the new resists give the SVGL MS193 a common process window for 100nm isolated lines and 100nm semi-dense L/S patterns as big as 10% exposure latitude and 220nm DOF. While that is not good enough yet for production, no one is talking about producing 100nm circuit features with conventional masks just yet.

To prepare for 100nm production, Rust says SVGL is going ahead with a high-NA 193-nm exposure tool, expected to be offered in a 300mm version. Beyond that, 157nm and EUV tools are in the works. However, Rust concedes that SVGL needs to sell some 193nm tools to be in business when the market develops for those new systems. — M.D.L., C.L.

TECH BRIEFS

Cree's bigger wafers. After less than a year of development, silicon carbide wafer maker Cree Research, Durham, NC, has unveiled samples of its high-quality 100mm (4-inch) SiC wafers. The larger wafer size is expected to offer economies of scale by accommodating more chips/wafer than current 2-inch and 3-inch SiC wafers. In addition, Cree said it has begun offering 4H and 6H n-type, on axis, 2-inch SiC wafers at $495/wafer.

Antibacterial biochip. Chosen by the National Institute of Standards and Technology (NIST), Motorola Labs is developing a biochip-based device that would enable the rapid diagnosis of life-threatening bacterial infections. The project is expected to take three years to complete and has a budget of $9 million. Development stages will take place at Motorola Labs' Physical Science Research Laboratories (PRSL) in Tempe, AZ. Aiding in the development process are researchers from Arizona State University, CFD Research Corporation, Huntsville, AL, and Motorola BioChip Systems. "Once successfully developed, this device will be sufficiently sensitive, specific, rapid and low in cost to enable its use in broad medical and scientific applications plus agriculture, food sciences and pharmaceuticals," said Jim Prendergast, Motorola VP and PRSL director.

Koch files patent application. Koch Microelectronic Service Co. Inc. (KMSC) has filed a patent application for its proprietary copper reclamation system used in CMP processes. The technology extracts copper residue from fab wastewater, returning the copper and solids for disposal or resale. This allows the purified water to be reused in the fab or safely discharged to the sewer. The water produced by KMSC's process meets or exceeds all regulatory standards for wastewater discharge.