MARKET WATCH: Emerging markets for wafer-cleaning technologies
11/01/1999
Neil Fernandes, GaSonics International Corp., San Jose, California
The total available market (TAM) for wafer cleaning is experiencing rapid growth due to a number of industry factors. In 1998, the TAM for wafer-cleaning capital equipment was greater than $1.0 billion and is projected to be more than $2.6 billion by 2003*. The move to 0.18µm and below device geometries is driving this growth, most evident in the backend-of-line (BEOL) post-etch clean segment. At the 0.18µm technology node, the introduction of new materials such as copper and low-k dielectrics, new plasma source technologies and etch chemistries, and increasing sensitivity to device damage complicate the post-etch residue removal process. The increasing number of metal layers in advanced logic devices is also fueling growth in the BEOL post-etch clean market.
 The total available market for wafer-cleaning technologies. |
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This growing complexity is occurring at the same time that residue removal is becoming more critical for attaining the required process results. In the case of post-metal etch, for example, galvanic-induced corrosion increases with wet cleans due to the misalignment of photomasks, which exposes the tungsten plugs during the clean process. In this and a number of advanced applications, wet clean processes of record are no longer capable of achieving adequate defect densities. In an effort to address these issues, equipment suppliers are increasingly combining photoresist removal and clean in an integrated process sequence. This segment is projected to exceed $3.5 billion by 2003* (see figure).
Clean market segmentation *** Wafer cleaning is typically defined as any processing step that removes unwanted materials from the wafer and prepares it for subsequent processes. For example, following etch and during interconnect formation, the photoresist is removed and the wafer is cleaned — eliminating organic, inorganic, and metallic residuals and preparing the wafer for metal deposition.
Some sort of cleaning step follows every photoresist removal process in the fab. Unlike dry photoresist removal, sometimes referred to as stripping or ashing, these subsequent process steps are primarily accomplished by using wet chemistries. The typical cleaning processes can be broken down into four broad categories: BEOL post-etch clean, front-end-of-line (FEOL) post-ash clean, prediffusion clean, and others (post-CMP and specialty cleans). The first three segments will be analyzed separately below.
1. BEOL post-etch clean. The purpose of BEOL post-etch clean is to remove any organic, inorganic, and metallic residues remaining on the wafer after etch and prior to deposition. This market segment represents approximately 25% of the total cleaning market and is growing more quickly than the total market due to the increase in the number of metal levels. In this area, there are a number of technical, cost, and environmental issues that are universal to most IC manufacturing processes.
BEOL post-etch clean applications include post-metal etch, involving the removal of organometallic residues to provide a clean surface for dielectric deposition; post-via etch, which entails the removal of organometallic residues from high-aspect-ratio vias to minimize via contact resistance; photoresist removal with low-k dielectric, involving the removal of photoresist with high selectivity to low-k; and post-via etch with copper and low-k dielectric, which further compounds the difficulty of the post-via etch clean process with higher-aspect-ratio, dual damascene vias.
The challenges of residue formation as devices shrink below 0.18µm are forcing manufacturers to look at alternative clean methods. The current processes use proprietary hydroxylamine-based solvents to remove the residues. Use and disposal of these solvents is expensive and must meet environmental rules.
This is one of several reasons why there is a significant drive to transition to dry clean for BEOL post-etch clean. There has been a steady migration from wet to dry wafer processing as technology advances. Etch and photoresist removal are cases in point. Historically, all photoresist removal steps were performed wet processed in large tanks with chemicals. Later, wafers were processed in barrel reactors in batches of 25 to increase cleanliness. Finally, as the speed of plasma processing improved and the levels of allowable particles on wafers decreased, single-wafer dry plasma reactors became standard.
Today, BEOL wafer cleaning is following the same technological path. As wet chemistries reach their technological limits (<0.18µm), these clean processes are migrating to single-wafer dry plasma processes. The wafers emerge cleaner and with fewer defects, and the process can be performed at lower cost.
Another key issue in traditional BEOL post-etch clean is the inability of a single supplier to provide a complete cleaning solution. Customers must get the solvents from one supplier and the equipment (immersion or spray tool) from another. Further, there is no standard methodology for the photoresist and residue removal, so users must develop their own unique process sequences. Combining photoresist and residue removal will offer a significant improvement in the efficiency of the process steps between etch and deposition.
2. FEOL post-ash clean. The purpose of FEOL post-ash clean is to remove particles, organics, metallics, and residues (implant and oxide) following photoresist removal. This market segment represents approximately 15% of the total cleaning market. Currently, most customers use a combination of ammonium hydroxide-peroxide (SC1), hydrochloric acid-peroxide (SC2), and sulfuric acid-peroxide (SPM) mixture in an immersion wet bench or spray system. There are no major technical, cost, or environmental problems to solve. There is, however, potential for improvement, since each photoresist removal step is followed by a wet clean step, and as separate processes, they are suboptimal. There are opportunities to integrate the two processes and reduce the number of wet clean steps. The integration may or may not be on the same tool, but must certainly be from the same supplier. Through integration, the customer can optimize the process sequence between implant and anneal to lower the cost/wafer.
3. Prediffusion clean. The purpose of prediffusion clean is to prepare the wafer for a diffusion step. This market segment represents about 40% of the total cleaning market and is growing somewhat more slowly. The specifications for prediffusion clean are stringent, but are typically accomplished using a combination of SC1, SC2, and SPM in an immersion wet bench (a methodology referred to as RCA clean). Chemical mixtures and processing steps are targeted toward the removal of particles, organics, and metals from the substrate surface. Prediffusion clean has changed very little over the years. The equipment is dominated by in-line immersion wet benches, which are now quite reliable. Development is targeted at using more dilute chemistries to reduce cost, at further increasing equipment reliability, and at reducing footprint.
Conclusion
As the industry transitions to 0.18µm and below design rules and the number of metal levels in devices increases, the TAM for wafer-cleaning capital equipment is growing at an unprecedented rate. Along with an increasing migration from wet to dry methodologies in certain clean applications, the new plasma sources, chemistries, and materials being implemented for 0.18µm manufacturing are creating a need for increased efficiency. This, in turn, is driving the integration of clean and photoresist removal in a single process sequence on either a single tool or by a single supplier.
* Market projections are a compilation of data from VLSI Research Inc., Dataquest, and GaSonics International Corp.
Nancy Fernandes is director of customer technology at GaSonics International Corp., 2730 Junction Ave., San Jose, CA 95134; ph 408/570-7182; fax 408/570-7059