Self-planarizing dielectric layer

10/01/1999

July's Solid State Technology carried an article "Simplified Interconnect Processing for Cost-Sensitive Chips" (p. 99), in which Seiko Epson Corp. describes the economic benefits of Flowfill's self-planarizing dielectric layer (requiring no CMP) and its integration into a 0.25µm, three-metal-level consumer IC.*

Because of NMD's editorial policy of not giving manufacturers' names in technical articles, and subsequent translation from Japanese, the article omitted that (without detracting from the work our customer has carried out) the section "Self-planarizing dielectrics" (p. 102), describes Flowfill, a patented process (US 5,874,367) running on a standard commercially available Trikon Technologies Inc. Flowfill CVD system.

We have more recently extended the Flowfill process to include low-k self-planarizing dielectrics that have been integrated for advanced IC production.

While CMP is now a "standard" process, it is not always required and alternative strategies reduce manufacturing costs, as Seiko and our other customers have demonstrated.

Carl Brancher
VP Corporate Development
Trikon Technologies Inc.
[email protected]

*Editor's note: The article was a translated version of a similar article in Nikkei Microdevices (NMD), SST's partner in Japan.

Addendum on sputtering

Some of the experiments published in the July article "Tailoring Sputtered Cr Films on Large Wafers" (p. 135) took place in Motorola's Tempe, Arizona, corporate research lab (PSRL) with the cooperation of William Dauksher, senior scientist at Motorola. This is particularly true of data cited in Tables 1 and 2.

The author and Sputtered Films are grateful to Mr. Dauksher and Motorola for assistance in applying the technology approaches developed at Sputtered Films to Motorola's Endeavor AT, and sincerely regret that this was not mentioned in the article.
Valery Felmetsger
Sputtered Films Inc.

Clarifications

The article "Particle Measurement in Semiconductor Process Gases," August, p. 65, was based on a similar version that was first presented at Semicon Singapore's IC Seminar this year.

Due to a printer's error, pages 82 and 87 of the September article "Paths to Assembly Automation: Different Data for Different Objectives" were inadvertently switched.